Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TPS65917-Q1 SLVSD22 – JULY 2015 TPS65917-Q1 Power Management Unit (PMU) for Processor 1 Device Overview 1.1 Features 1 • Qualified for Automotive Applications • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range – Device HBM Classification Level 2 – Device CDM Classification Level C4B • System Voltage Range from 3.135 V to 5.25 V • Low-Power Consumption – 20 μA in Off Mode – 90 μA in Sleep Mode With Two SMPSs Active • Five Step-Down Switched-Mode Power Supply (SMPS) Regulators: – 0.7- to 3.3-V Output Range in 10- or 20-mV Steps – Two SMPS Regulators With 3.5-A Capability, With the Ability to Combine into 7-A Output in Dual-Phase Configuration, With Differential Remote Sensing (Output and Ground) – Three Other SMPS Regulators with 3-A, 2-A, and 1.5-A Capabilities – Dynamic Voltage Scaling (DVS) Control and Output Current Measurement in 3.5-A and 3-A SMPS Regulators – Hardware and Software Controlled Eco-mode™ Supplying up to 5 mA – Short-Circuit Protection – Power-Good Indication (Voltage and Overcurrent Indication) – Internal Soft-Start for In-Rush Current Limitation – Ability to Synchronize to External Clock between 1.7 MHz and 2.7 MHz 1.2 • • • Five Low-Dropout (LDO) Linear Regulators: – 0 .9- to 3.3-V Output Range in 50-mV steps – Two With 300-mA Capability and Bypass Mode – One With 100-mA Capability and Capable of Low-Noise Performance up to 50 mA – Two Other LDOs With 200-mA Current Capability – Short-Circuit Protection • 12-Bit Sigma-Delta General-Purpose ADC (GPADC) With 8 Input Channels (2 external) • Thermal Monitoring With High Temperature Warning and Thermal Shutdown • Power Sequence Control: – Configurable Power-Up and Power-Down Sequences (OTP) – Configurable Sequences Between the SLEEP and ACTIVE State Transition (OTP) – Three Digital Output Signals that can be Included in the Startup Sequence • Selectable Control Interface: – One SPI for Resource Configurations and DVS Control – Two I2C Interfaces. • One Dedicated for DVS Control • One General Purpose I2C Interface for Resource Configuration and DVS Control • OTP Bit-Integrity Error Detection With Options to Proceed or Hold Power-Up Sequence and RESET_OUT Release • Package Option: – 7- × 7-mm 48-pin VQFN With 0.5-mm Pitch Applications Automotive Infotainment Automotive Digital Cluster • • 1.3 Automotive Advanced Driver Assistance System (ADAS) Automotive Navigation Systems Description The TPS65917-Q1 device is an integrated PMIC with AEC-Q100 qualification. The device provides 5 configurable step-down converters with up to 3.5 A of output current for memory, processor core, I/O, or preregulation of LDOs. These step-down converters can be synchronized to an external clock between 1.7 MHz and 2.7 MHz, or an internal fallback clock at 2.2 MHz. Two of these configurable step-down converters can be combined together to allow up to 7 A of output current. The device also contains 5 LDO regulators for external use. These LDOs can be supplied from either the system supply or an external preregulated supply. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS65917-Q1 SLVSD22 – JULY 2015 www.ti.com The power-up and power-down controller is configurable and can support any power-up and power-down sequences (OTP based). As an additional safety feature, the OTP bit-integrity error-detection feature provides the option to stop the power-up sequence if an error is detected. The TPS65917-Q1 device includes an internal 32-kHz RC oscillator to sequence all resources during power up and power down. All LDOs and SMPS converters can be controlled by the SPI or I2C interface, or by power request signals. In addition, voltage scaling registers allow transition of the SMPS to different voltages by SPI, I2C, or roofand-floor control. GPIO functionality is available and 3 GPIOs can be configured as part of the power-up sequence to control external resources. The fallback clock of the step-down converters can be output through the SYNCCLKOUT pin to provide synchronization clock to external resources. Power request signals enable power mode control for power optimization. The device includes a general-purpose sigmadelta analog-to-digital converter (ADC) with 8 channels (2 with external access). The TPS65917-Q1 device is available in a 48-pin VQFN package with a 0.5-mm pitch. Device Information (1) PART NUMBER TPS65917-Q1 (1) 2 PACKAGE VQFN (48) BODY SIZE (NOM) 7.00 mm × 7.00 mm For all available packages, see the orderable addendum at the end of the data sheet. Device Overview Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPS65917-Q1 TPS65917-Q1 www.ti.com 1.4 SLVSD22 – JULY 2015 Functional Diagram VCCA VCCA I2C and SPI VSYS Monitor VCC_SENSE INT First Supply Detection 32-kHz RC Oscillator Interrupt Handler PWRON SYNCCLKOUT Bandgap REFSYS VBG 1.23-V Vref REFGND PWRDOWN POWERHOLD RESET_IN NSLEEP NRESWARM BBS Independent Bandgap ÷6 Event Handler RC15M OSC SYNCDCDC PLL I2C/SPI OFF2ACT ACT2OFF ACT2SLP SLP2ACT NRESWARM Watchdog Timer OSC + PLL LDOVRTC OTP LDOVRTC_OUT Power Sequencer LDO1, Bypass CRC SMPS1 VIN Monitor, Thermal SD, Short Circuit Monitor Registers LDO1_OUT SMPS1_IN SMPS1_FDBK Short Circuit Monitor Dual Phase or Single Phase LDO12_IN VCCA LDO2, Bypass Thermal Monitor Short Circuit Monitor LDO2_OUT VIN Monitor, Thermal SD, Short Circuit Monitor SMPS/LDO POWERGOOD/SHORT/ VINLOW LDO3 LDO3_IN SMPS2 SMPS2_IN Resource Controller SMPS2_FDBK Short Circuit Monitor LDO3_OUT I2C and SPI SMPS3 GPADC Controller LDO4 LDO4_IN CNTRL Short Circuit Monitor Registers VIN Monitor, Thermal SD, Short Circuit Monitor LDO4_OUT SMPS3_IN SMPS3_FDBK LDO5, LN LDO5_IN SMPS4_IN Short Circuit Monitor SMPS4 LDO5_OUT VIN Monitor, Short Circuit Monitor I2C and SPI I/O 12-Bit GPADC LDOVANA SMPS4_FDBK LDOVANA_OUT VANA (1.5 V) GPIO6 NSLEEP REGEN3 POWERGOOD I2C1_SDA_SDO I2C2_SCL_SCE I2C1_SDA_SDI I2C1_SCL_CLK ADCIN2 VIN Monitor, Thermal SD, Short Circuit Monitor ADCIN1 GPIO_6 GPIO5 REGEN3 POWERHOLD GPIO_5 GPIO_4 DVFS_CLK SMPS5 GPIO4 REGEN2 I2C2_SCL_SCE GPIO3 ENABLE2 REGEN1 SYNCDCDC GPIO_3 GPIO_2 GPIO2 ENABLE1 I2C2_SDA_SDO DVFS_DAT GPIO1 RESET_IN NRESWARM VBUS_SENSE VIO GPIO_1 VIO_IN GPIO_0 GPIO0 ENABLE2 PWRDOWN REGEN1 VCC_SENSE 7x GPIO POWERGOOD Monitor SMPS5_IN SMPS5_FDBK POWERGOOD Figure 1-1. Functional Diagram Device Overview Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPS65917-Q1 3 TPS65917-Q1 SLVSD22 – JULY 2015 www.ti.com 2 Device and Documentation Support 2.1 2.1.1 Documentation Support Related Documentation For related documentation see the following: Guide to Using the GPADC in TPS65903x and TPS6591x Devices, SLIA087 2.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 2.3 Trademarks Eco-mode, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 2.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 3 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 4 Mechanical, Packaging, and Orderable Information Submit Documentation Feedback Product Folder Links: TPS65917-Q1 Copyright © 2015, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR O917A130TRGZRQ1 PREVIEW VQFN RGZ 48 O917A131TRGZRQ1 ACTIVE VQFN RGZ 48 O917A132TRGZRQ1 PREVIEW VQFN RGZ 48 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR O917A133TRGZRQ1 PREVIEW VQFN RGZ 48 2500 TBD Call TI Call TI Op Temp (°C) Device Marking (4/5) TPS65917 OTP 30 1.1 -40 to 125 TPS65917 OTP 31 1.1 TPS65917 OTP 32 1.1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jul-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device O917A131TRGZRQ1 Package Package Pins Type Drawing VQFN RGZ 48 SPQ 0 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 7.3 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.3 1.1 12.0 16.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jul-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) O917A131TRGZRQ1 VQFN RGZ 48 0 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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