Datasheet
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24G64xxx-5 Series
General Description
Key Specifications
BR24G64xxx-5 Series is a 64Kbit serial EEPROM of I2C
BUS Interface.
Features
All Controls Available by 2 Ports of Serial Clock
(SCL) and Serial Data (SDA)
1.6V to 5.5V Wide Limit of Operating Voltage,
Possible 1MHz Operation
Page Write Mode 32Byte
Bit Format 8K x 8bit
Low Current Consumption
Prevention of Miswriting
WP (Write Protect) Function Added
Prevention of Miswriting at Low Voltage
Noise Filter Built-in SCL / SDA Pin
Initial Delivery State FFh
Write Cycles:
Data Retention:
Write Cycle Time:
Supply Voltage:
Packages
SOP8
SOP-J8
TSSOP-B8
MSOP8
VSON008X2030
Applications
4 Million Times (Ta=25°C)
200 Years (Ta=55°C)
5ms (Max)
1.6V to 5.5V
W(Typ) x D(Typ) x H(Max)
5.00mm x 6.20mm x 1.71mm
4.90mm x 6.00mm x 1.65mm
3.00mm x 6.40mm x 1.20mm
2.90mm x 4.00mm x 0.90mm
2.00mm x 3.00mm x 0.60mm
SOP8
MSOP8
SOP-J8
VSON008X2030
Ordinary Electronic Equipment (such as AV equipment,
OA equipment, telecommunication equipment, home
electronic appliances, amusement equipment, etc.).
Typical Application Circuit
VCC
*
A0
VCC
A1
WP
A2
SCL
GND
SDA
Microcontroller
TSSOP-B8
Figure 2
0.1µF
* Connect A0, A1, A2 to VCC or GND.
These pins have pull-down elements inside the IC.
If pins are open, they are the same as when they are connected to GND.
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Key Specifications........................................................................................................................................................................... 1
Packages ........................................................................................................................................................................................ 1
Contents ......................................................................................................................................................................................... 2
Pin Configuration ............................................................................................................................................................................ 3
Pin Description................................................................................................................................................................................ 3
Block Diagram ................................................................................................................................................................................ 3
Absolute Maximum Ratings ............................................................................................................................................................ 4
Thermal Resistance ........................................................................................................................................................................ 4
Operating Conditions ...................................................................................................................................................................... 5
Input / Output Capacitance ............................................................................................................................................................. 5
Input Impedance ............................................................................................................................................................................. 5
Memory Cell Characteristics ........................................................................................................................................................... 5
Electrical Characteristics................................................................................................................................................................. 6
AC Characteristics .......................................................................................................................................................................... 6
AC Characteristics Condition .......................................................................................................................................................... 6
Input / Output Timing ...................................................................................................................................................................... 7
Typical Performance Curves ........................................................................................................................................................... 8
I2C BUS Communication............................................................................................................................................................... 17
Write Command ............................................................................................................................................................................ 18
Read Command............................................................................................................................................................................ 19
Method of Reset ........................................................................................................................................................................... 20
Acknowledge Polling ..................................................................................................................................................................... 20
WP Valid Timing (Write Cancel) .................................................................................................................................................... 21
Command Cancel by Start Condition and Stop Condition ............................................................................................................. 21
Application Examples ................................................................................................................................................................... 22
Caution on Power-Up Conditions.................................................................................................................................................. 24
Low Voltage Malfunction Prevention Function .............................................................................................................................. 24
I/O Equivalence Circuits................................................................................................................................................................ 25
Operational Notes ......................................................................................................................................................................... 26
Ordering Information ..................................................................................................................................................................... 27
Lineup ........................................................................................................................................................................................... 27
Marking Diagrams ......................................................................................................................................................................... 28
Physical Dimension and Packing Information ............................................................................................................................... 29
Revision History ............................................................................................................................................................................ 34
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Pin Configuration
(TOP VIEW)
A0
1
A1
(TOP VIEW)
8
VCC
A0 1
2
7
WP
A1
A2
3
6
SCL
A2 3
GND
4
5
SDA
GND 4
8
Figure 3-(a). Pin Configuration
(SOP8, SOP-J8, TSSOP-B8, MSOP8)
8 VCC
7 WP
2
6 SCL
EXP-PAD
5 SDA
Figure 3-(b). Pin Configuration
(VSON008X2030)
Pin Description
Pin No.
Pin Name
Input / Output
Descriptions
setting(Note 1)
1
A0
Input
Slave address
2
A1
Input
Slave address setting(Note 1)
3
A2
Input
Slave address setting(Note 1)
4
GND
-
Reference voltage of all input / output, 0V
5
SDA
Input / Output
Serial data input / serial data output(Note 2)
6
SCL
Input
Serial clock input
7
WP
Input
Write protect pin(Note 3)
8
VCC
-
Connect the power source
-
EXP-PAD
-
Leave as OPEN or connect to GND
(Note 1) Connect to VCC or GND. There are pull-down elements inside the IC. If pins are open, they are the same as when they are connected to GND.
(Note 2) SDA is NMOS open drain, so it requires a pull-up resistor.
(Note 3) Connect to VCC or GND, or control to 'HIGH' level or 'LOW' level. There are pull-down elements inside the IC. If this pin is open, this input is recognized
as 'LOW'.
Block Diagram
A0
1
64Kbit EEPROM Array
8
VCC
7
WP
6
SCL
5
SDA
8bit
A1
2
Address
Decoder
13bit
Word
Address Register
START
A2 3
Data
Register
STOP
Control Circuit
ACK
GND 4
High Voltage
Generating Circuit
Supply Voltage
Detection
Figure 4. Block Diagram
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Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
VCC
-0.3 to +6.5
V
Ta=25°C
Supply Voltage
‐
-0.3 to VCC+1.0
V
Ta=25°C.The maximum value of input voltage/
output voltage is not over than 6.5V. When the
pulse width is 50ns or less, the minimum value
of input voltage/output voltage is -1.0V.
VESD
-3000 to +3000
V
Ta=25°C
IOLMAX
10
mA
Ta=25°C
Tjmax
150
°C
Tstg
-65 to +150
°C
Input Voltage / Output Voltage
Electro Static Discharge
(Human Body Model)
Maximum Output Low Current
(SDA)
Maximum Junction Temperature
Remark
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 4)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 6)
2s2p(Note 7)
Unit
SOP8
Junction to Ambient
θJA
197.4
109.8
°C/W
Junction to Top Characterization Parameter(Note 5)
ΨJT
21
19
°C/W
Junction to Ambient
θJA
149.3
76.9
°C/W
Junction to Top Characterization Parameter(Note 5)
ΨJT
18
11
°C/W
θJA
251.9
152.1
°C/W
ΨJT
31
20
°C/W
θJA
284.1
135.4
°C/W
ΨJT
21
11
°C/W
SOP-J8
TSSOP-B8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 5)
MSOP8
Junction to Ambient
Junction to Top Characterization
Parameter(Note 5)
(Note 4) Based on JESD51-2A(Still-Air)
(Note 5) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 6) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 7) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
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Thermal Resistance(Note 8) - continued
Parameter
Thermal Resistance (Typ)
Symbol
Unit
1s(Note 10)
2s2p(Note 11)
θJA
308.3
69.6
°C/W
ΨJT
43
10
°C/W
VSON008X2030
Junction to Ambient
Junction to Top Characterization
Parameter(Note 9)
(Note 8) Based on JESD51-2A(Still-Air)
(Note 9) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 10) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 11) Using a PCB board based on JESD51-5, 7.
Thermal Via(Note 12)
Layer Number of
Measurement Board
Material
Board Size
4 Layers
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
Pitch
Diameter
1.20mm
Φ0.30mm
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
(Note 12) This thermal via connects with the copper pattern of all layers.
Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VCC
1.6
-
5.5
V
Ambient Operating Temperature
Ta
-40
-
+85
°C
Bypass capacitor(Note 13)
C
0.1
-
-
µF
(Note 13) Connect a bypass capacitor between the IC’s VCC and GND pin.
Input / Output Capacitance (Ta=25°C, f=1MHz)
Parameter
Input / Output Capacitance
(SDA)(Note 14)
Input Capacitance
(SCL, A0, A1, A2, WP)(Note 14)
Symbol
Min
Typ
Max
Unit
Conditions
CI/O
-
-
8
pF
VI/O=GND
CIN
-
-
8
pF
VIN=GND
(Note 14) Not 100% TESTED.
Input Impedance (Unless otherwise specified, Ta=-40°C to +85°C, VCC=1.6V to 5.5V)
Parameter
Symbol
Min
Typ
Max
Unit
Input Impedance 1
ZIH
500
-
-
kΩ
Input Impedance 2
ZIL
30
-
-
kΩ
Unit
Conditions
0.7VCC≤VIN (A0, A1, A2, WP)
Period from Start Condition to
Stop Condition
VIN≤0.3VCC (A0, A1, A2, WP)
Period from Start Condition to
Stop Condition
Memory Cell Characteristics (VCC=1.6V to 5.5V)
Parameter
Symbol
Min
Typ
Max
Write
Cycles(Note 15,16)
Conditions
-
4,000,000
-
-
Times Ta=25°C
Data
Retention(Note 15)
-
200
-
-
Years Ta=55°C
(Note 15) Not 100% TESTED.
(Note 16) The Write Cycles is defined for unit of 4 data bytes with the same address bits of WA12 to WA2.
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Electrical Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, VCC=1.6V to 5.5V)
Parameter
Symbol
Min
Typ
Max
Unit
VIH1
0.7VCC
-
VCC+1.0
V
1.7V≤VCC≤5.5V
Input Low Voltage 1
VIL1
-0.3(Note 17)
-
+0.3VCC
V
1.7V≤VCC≤5.5V
Input High Voltage 2
VIH2
0.8VCC
-
VCC+1.0
V
1.6V≤VCC<1.7V
Input Low Voltage 2
VIL2
-0.3(Note 17)
-
+0.2VCC
V
1.6V≤VCC<1.7V
Output Low Voltage 1
VOL1
-
-
0.4
V
IOL=3.2mA, 2.5V≤VCC≤5.5V (SDA)
Output Low Voltage 2
VOL2
-
-
0.2
V
Input Leakage Current 1
ILI1
-1
-
+1
µA
Input Leakage Current 2
ILI2
-1
-
+1
µA
IOL=1.0mA, 1.6V≤VCC<2.5V (SDA)
VIN=0 or VCC (A0, A1, A2, WP)
Standby Mode
VIN=0 to VCC (SCL)
Output Leakage Current
ILO
-1
-
+1
µA
Supply Current (Write)
ICC1
-
-
2.0
mA
Supply Current (Read)
ICC2
-
-
2.0
mA
Standby Current
ISB
-
-
2.5
µA
Input High Voltage 1
Conditions
VOUT=0 to VCC (SDA)
VCC=5.5V, fSCL=1MHz, tWR=5ms,
Byte Write, Page Write
VCC=5.5V, fSCL=1MHz
Random Read, Current Read,
Sequential Read
VCC=5.5V, SDA, SCL=VCC
A0, A1, A2, WP=GND
(Note 17) When the pulse width is 50ns or less, it is -1.0V.
AC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, VCC=1.6V to 5.5V)
Parameter
Symbol
Min
Typ
Max
Unit
Clock Frequency
fSCL
-
-
1
MHz
Data Clock High Period
tHIGH
260
-
-
ns
Data Clock Low Period
tLOW
500
-
-
ns
SDA, SCL (input) Rise
Time(Note 18)
tR
-
-
120
ns
tF1
-
-
120
ns
tF2
-
-
120
ns
Start Condition Hold Time
tHD:STA
250
-
-
ns
Start Condition Setup Time
tSU:STA
200
-
-
ns
Input Data Hold Time
tHD:DAT
0
-
-
ns
Input Data Setup Time
tSU:DAT
50
-
-
ns
tPD
50
-
450
ns
SDA, SCL (input) Fall Time(Note 18)
SDA (output) Fall
Time(Note 18)
Output Data Delay Time
Output Data Hold Time
tDH
50
-
-
ns
tSU:STO
250
-
-
ns
Bus Free Time
tBUF
500
-
-
ns
Write Cycle Time
tWR
-
-
5
ms
tI
-
-
50
ns
WP Hold Time
tHD:WP
1.0
-
-
μs
WP Setup Time
tSU:WP
0.1
-
-
μs
WP High Period
tHIGH:WP
1.0
-
-
μs
Stop Condition Setup Time
Noise Suppression Time (SCL, SDA)
(Note 18) Not 100% TESTED.
AC Characteristics Condition
Parameter
Symbol
Conditions
Unit
Load Capacitance
CL
100
pF
Input Rise Time
tR
20
ns
Input Fall Time
tF1
20
ns
VIL/VIH
0.2VCC/0.8VCC
V
-
0.3VCC/0.7VCC
V
Input Voltage
Input / Output Data Timing Reference Level
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Input / Output Timing
tR
70%
70% 70%
70%
SCL
tHIGH
tF1
30%
30%
tHD:STA
70%
70%
70%
SDA
(input)
tHD:DAT
tLOW
tSU:DAT
70%
30%
30%
70%
30%
30%
tDH
tPD
tBUF
SDA
(output)
70%
70%
30%
30%
30%
tF2
○Input read at the rise edge of SCL
○Data output in sync with the fall of SCL
Figure 5-(a). Input / Output Timing
SCL
70%
70%
70%
tSU:STA
tSU:STO
tHD:STA
70%
SDA
30%
30%
STOP condition
START condition
Figure 5-(b). Start-Stop Condition Timing
SCL
70%
70%
D0
SDA
ACK
write data
tWR
(n-th address)
START condition
STOP condition
Figure 5-(c). Write Cycle Timing
DATA(n)
SCL
70%
DATA(1)
ACK
SDA
70%
tWR
WP
70%
30%
tHD:WP
tSU:WP
STOP condition
Figure 5-(d). WP Timing at Write Execution
SCL
DATA(n)
DATA(1)
SDA
D1
D0
ACK
ACK
tWR
tHIGH:WP
70%
WP
70%
70%
Figure 5-(e). WP Timing at Write Cancel
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Typical Performance Curves
6
Ta=-40°C
Ta=+25°C
Ta=+85°C
5
Input Low Voltage 1,2 : VIL1,2[V]
Input High Voltage 1,2 : VIH1,2[V]
6
4
SPEC
3
2
5
4
3
2
1
1
SPEC
0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 6. Input High Voltage 1,2 vs Supply Voltage
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 7. Input Low Voltage 1,2 vs Supply Voltage
1.0
1.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
Output Low Voltage 2 : VOL2[V]
Output Low Voltage 1 : VOL1[V]
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.6
SPEC
0.4
0.2
0.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
SPEC
0.2
0.0
0
1
2
3
4
5
Output Low Current : IOL[mA]
6
0
Figure 8. Output Low Voltage 1 vs Output Low Current
(VCC=2.5V)
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1
2
3
4
5
Output Low Current : IOL[mA]
6
Figure 9. Output Low Voltage 2 vs Output Low Current
(VCC=1.6V)
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Typical Performance Curves - continued
1.2
SPEC
SPEC
1.0
Input Leakage Current 2 : ILI2[µA]
Input Leakage Current 1 : ILI1[µA]
1.2
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
0.2
0.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
Input Voltage : VIN[V]
5
6
0
Figure 10. Input Leakage Current 1 vs Input Voltage
(Standby Mode)
1
2
3
4
Input Voltage : VIN[V]
5
6
Figure 11. Input Leakage Current 2 vs Input Voltage
1.2
2.5
SPEC
1.0
Supply Current (Write) : ICC1[mA]
Output Leakage Current : ILO[µA]
1.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
0.2
0.0
SPEC
2.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
1.5
1.0
0.5
0.0
0
1
2
3
4
Output Voltage : VOUT[V]
5
6
0
Figure 12. Output Leakage Current vs Output Voltage
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 13. Supply Current (Write) vs Supply Voltage
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Typical Performance Curves - continued
2.5
SPEC
2.0
Standby Current : ISB[µA]
Supply Current (Read) : ICC2[mA]
2.5
Ta=-40°C
Ta=+25°C
Ta=+85°C
1.5
1.0
1.0
0.5
0.0
0.0
1
2
3
4
Supply Voltage : VCC[V]
5
Ta=-40°C
Ta=+25°C
Ta=+85°C
1.5
0.5
0
SPEC
2.0
0
6
Figure 14. Supply Current (Read) vs Supply Voltage
(fSCL=1MHz)
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 15. Standby Current vs Supply Voltage
10.0
300
1.0
Data Clock High Period : tHIGH[ns]
Clock Frequency : fSCL[MHz]
SPEC
SPEC
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.1
250
200
150
100
Ta=-40°C
Ta=+25°C
Ta=+85°C
50
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 16. Clock Frequency vs Supply Voltage
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 17. Data Clock High Period vs Supply Voltage
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Typical Performance Curves - continued
140
SPEC
500
SDA (OUTPUT) Fall Time : tF2[ns]
Data Clock Low Period : tLOW[ns]
600
400
300
200
Ta=-40°C
Ta=+25°C
Ta=+85°C
100
0
Ta=-40°C
Ta=+25°C
Ta=+85°C
100
80
60
40
20
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 18. Data Clock Low Period vs Supply Voltage
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 19. SDA (OUTPUT) Fall Time vs Supply Voltage
300
250
SPEC
Start Condition Setup Time : t SU:STA[ns]
Start Condition Hold Time : t HD:STA[ns]
SPEC
120
250
Ta=-40°C
Ta=+25°C
Ta=+85°C
200
150
100
50
0
SPEC
200
Ta=-40°C
Ta=+25°C
Ta=+85°C
150
100
50
0
-50
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 20. Start Condition Hold Time vs Supply Voltage
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 21. Start Condition Setup Time vs Supply Voltage
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Typical Performance Curves - continued
50
Input Data Hold Time : t HD:DAT[ns]
Input Data Hold Time : t HD:DAT[ns]
50
SPEC
0
-50
-100
Ta=-40°C
Ta=+25°C
Ta=+85°C
-50
-100
Ta=-40°C
Ta=+25°C
Ta=+85°C
-150
-150
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 22. Input Data Hold Time vs Supply Voltage
(SDA 'LOW' to 'HIGH')
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 23. Input Data Hold Time vs Supply Voltage
(SDA 'HIGH' to 'LOW')
60
60
SPEC
50
Input Data Setup Time : t SU:DAT[ns]
Input Data Setup Time : t SU:DAT[ns]
SPEC
0
Ta=-40°C
Ta=+25°C
Ta=+85°C
40
30
20
10
0
SPEC
50
Ta=-40°C
Ta=+25°C
Ta=+85°C
40
30
20
10
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 24. Input Data Setup Time vs Supply Voltage
(SDA 'LOW' to 'HIGH')
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 25. Input Data Setup Time vs Supply Voltage
(SDA 'HIGH' to 'LOW')
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Typical Performance Curves - continued
500
500
SPEC
Ta=-40°C
Ta=+25°C
Ta=+85°C
400
Output Data Delay Time : tPD[ns]
Output Data Delay Time : tPD[ns]
SPEC
300
200
100
Ta=-40°C
Ta=+25°C
Ta=+85°C
400
300
200
100
SPEC
SPEC
0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 26. Output Data Delay Time vs Supply Voltage
(SDA 'LOW' to 'HIGH')
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 27. Output Data Delay Time vs Supply Voltage
(SDA 'HIGH' to 'LOW')
500
500
Ta=-40°C
Ta=+25°C
Ta=+85°C
400
Output Data Hold Time : t DH[ns]
Output Data Hold Time : t DH[ns]
1
300
200
100
Ta=-40°C
Ta=+25°C
Ta=+85°C
400
300
200
100
SPEC
SPEC
0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 28. Output Data Hold Time vs Supply Voltage
(SDA 'LOW' to 'HIGH')
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 29. Output Data Hold Time vs Supply Voltage
(SDA 'HIGH' to 'LOW')
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Typical Performance Curves - continued
600
SPEC
Ta=-40°C
Ta=+25°C
Ta=+85°C
200
150
100
200
0
0
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 30. Stop Condition Setup Time vs Supply Voltage
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 31. Bus Free Time vs Supply Voltage
200
6
Noise Suppression Time : t I[ns]
SPEC
5
Write Cycle Time : tWR[ms]
300
100
1
Ta=-40°C
Ta=+25°C
Ta=+85°C
400
50
0
SPEC
500
250
Bus Free Time : t BUF[ns]
Stop Condition Setup Time : t SU:STO[ns]
300
4
3
2
Ta=-40°C
Ta=+25°C
Ta=+85°C
1
Ta=-40°C
Ta=+25°C
Ta=+85°C
150
100
50
SPEC
0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 32. Write Cycle Time vs Supply Voltage
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 33. Noise Suppression Time vs Supply Voltage
(SCL 'HIGH')
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Typical Performance Curves - continued
200
Ta=-40°C
Ta=+25°C
Ta=+85°C
Noise Suppression Time : t I[ns]
Noise Suppression Time : t I[ns]
200
150
100
50
SPEC
150
100
50
SPEC
0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 34. Noise Suppression Time vs Supply Voltage
(SCL 'LOW')
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 35. Noise Suppression Time vs Supply Voltage
(SDA 'HIGH')
1.2
200
Ta=-40°C
Ta=+25°C
Ta=+85°C
SPEC
1.0
WP Hold Time : t HD:WP[µs]
Noise Suppression Time : t I[ns]
Ta=-40°C
Ta=+25°C
Ta=+85°C
150
100
50
SPEC
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
0.2
0.0
0
0
1
2
3
4
Supply Voltage : VCC[V]
5
0
6
Figure 36. Noise Suppression Time vs Supply Voltage
(SDA 'LOW')
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TSZ22111 • 15 • 001
1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 37. WP Hold Time vs Supply Voltage
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Typical Performance Curves - continued
0.2
1.2
WP Setup Time : t SU:WP[µs]
WP High Period : tHIGH:WP[µs]
SPEC
0.1
0.0
-0.1
-0.2
-0.3
-0.4
Ta=-40°C
Ta=+25°C
Ta=+85°C
-0.5
SPEC
1.0
Ta=-40°C
Ta=+25°C
Ta=+85°C
0.8
0.6
0.4
0.2
-0.6
0.0
0
1
2
3
4
Supply Voltage : VCC[V]
5
6
0
Figure 38. WP Setup Time vs Supply Voltage
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1
2
3
4
Supply Voltage : VCC[V]
5
6
Figure 39. WP High Period vs Supply Voltage
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I2C BUS Communication
1. I2C BUS Data Communication
(1) I2C BUS data communication begins with start condition input, and ends at the stop condition input.
(2) The data is always 8bit long, and acknowledge is always required after each byte.
(3) I2C BUS data communication with several devices connected to the BUS is possible by connecting with 2
communication lines: serial data (SDA) and serial clock (SCL).
(4) Among the devices, there is a “master” that generates clock and control communication start and end. The rest
become “slave” which are controlled by an address peculiar to each device. EEPROM is a “slave”.
(5) The device that outputs data to the bus during data communication is called “transmitter”, and the device that
receives data is called “receiver”.
SDA
1 to 7
SCL
8
S
START ADDRESS R/W
condition
1 to 7
9
ACK
8
DATA
9
ACK
1 to 7
DATA
8
9
ACK
P
STOP
condition
Figure 40. Data Transfer Timing
2. Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) where SDA goes down from 'HIGH' to 'LOW' while SCL
is 'HIGH' is necessary.
(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition
is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is
'HIGH'.
4. Acknowledge (ACK) Signal
(1) This acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally.
In both master and slave communication, the device at the transmitter (sending) side releases the bus after
outputting 8-bit data. When a slave address of a write command or a read command is input, microcontroller is the
device at the transmitter side. When data output for a read command, this IC is the device at the transmitter side.
(2) The device on the receiver (receiving) side sets SDA 'LOW' during the 9th clock cycle, and outputs an ACK signal
showing that the 8-bit data has been received. When a slave address of a write command or a read command is
input, this IC is the device at the receiver side. When data output for a read command, microcontroller is the device
at the receiver side.
(3) This IC, after recognizing start condition and slave address (8bit), outputs ACK signal 'LOW'.
(4) Each write operation outputs ACK signal 'LOW' every 8bit data (a word address and write data) reception.
(5) During read operation, this IC outputs 8bit data (read data) and detects the ACK signal 'LOW'. When ACK signal is
detected, and no stop condition is sent from the master (microcontroller) side, this IC will continue to output data. If
the ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the
read operation. Then this IC becomes ready for another transmission.
5.
Device Addressing
(1) From the master, input the slave address after the start condition.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to '1010'.
(3) The next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and multiple devices can be used
on a same bus according to the number of device addresses. It is possible to select and operate only device whose
'VCC' 'GND' input conditions of the A0, A1, A2 pin match the 'HIGH' 'LOW' input conditions of slave address sent
from the master.
(4) The least significant bit ( R / W --- READ/ WRITE ) of slave address is used for designating write or read operation,
and is as shown below.
Setting R / W to 0 ------- write (setting 0 to word address setting of random read)
Setting R / W to 1 ------- read
Slave address
1
0
1
0
A2
A1
A0 R / W
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Maximum number of
Connected buses
8
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BR24G64xxx-5 Series
Write Command
1.
Write
(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when writing
continuous data of 2 bytes or more, simultaneous write is possible by Page Write. Up to 32 arbitrary bytes can be
written.
SLAVE
WRITE
ADDRESS
START
SDA
LINE
1st WORD
ADDRESS
2nd WORD
ADDRESS
WAWA
＊ ＊ ＊ 12 11
1 0 1 0 A2 A1 A0
DATA
WA
0
D0
ACK
ACK
R/W ACK
D7
STOP
* Don't Care bit
ACK
Figure 41. Byte Write
SLAVE
ADDRESS
START
SDA
LINE
1 0 1
0
1st WORD
ADDRESS(n)
WRITE
A2 A1 A0
＊ ＊
2nd WORD
ADDRESS(n)
WA WA
＊ 12 11
DATA(n)
WA
0
R/W ACK
ACK
D7
ACK
DATA(n+63)
D0
STOP
* Don't Care bit
D0
ACK
ACK
Figure 42. Page Write
(2)
(3)
(4)
(5)
(6)
During internal write execution, all input commands are ignored, therefore ACK is not returned.
Data is written to the address designated by word address (n-th address)
By issuing stop bit after 8bit data input, internal write to memory cell starts.
When internal write is started, command is not accepted for tWR (5ms at maximum).
Using page write, it is possible to write one lump sum up to 32 bytes. When data of more than 32 bytes is sent, the
excess of the bytes is overwritten the data sent already from first byte. (Refer to "Internal Address Increment").
(7) As for page write where 2 or more bytes of data is intended to be written, after the word address are designated
arbitrarily, only the value of 5 least significant bits in the address is incremented internally, so that data up to 32
bytes of memory only can be written.
(8) When VCC is turned off during tWR, data at the designated address is not guaranteed, please write it again.
1 page=32bytes, but the write time of page write is 5ms at maximum for 32byte batch write.
It is not equal to 5ms at maximum x 32byte=160ms(Max).
2.
Internal Address Increment
Page write mode
WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0
0
0
0
1Eh
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
1
1
1
0
0
1
0
Increment
For example, when starting from address 1Eh, then,
1Eh→1Fh→00h→01h···. Please take note that it will be
incremented.
0
1
0
*1Eh···1E in hexadecimal, therefore, 00011110 becomes a
binary number.
Significant bit is fixed.
No digit up
3.
Write Protect (WP) Function
When WP pin is set at VCC ('HIGH' level), data rewrite of all addresses is prohibited. When it is set GND ('LOW' level),
data rewrite of all address is enabled. Be sure to connect this pin to VCC or GND, or control it to 'HIGH' level or 'LOW'
level. If WP pin is open, this input is recognized as 'LOW'.
In case of using it as ROM, by connect it to pull-up or VCC, write error can be prevented.
At extremely low voltage at power ON/OFF, by setting the WP pin 'HIGH', write error can be prevented.
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4.
ECC Function
This IC has ECC bits for Error Correction every 4 bytes with the same address bits of WA12 to WA2. In read operation,
if 1 bit of error data exists in 4 bytes, this error data will be corrected by the ECC function and outputs the correct data.
In write operation, only 1 byte of data is to be written, 4 bytes of data will be written as one group with the same
address bits of WA12 to WA2 (the data to be written in the remaining 3 bytes will be the same as its previous stored
data). Therefore, the number of write cycle times is guaranteed every 4 bytes with the same address bits of WA12 to
WA2.
Initial Delivery State
Address
Number of remaining
write cycles
0000h
400M
times
0001h
400M
times
0002h
400M
times
0003h
400M
times
0004h
400M
times
0005h
400M
times
···
0002h
300M
times
0003h
300M
times
0004h
400M
times
0005h
400M
times
···
···
After 100M times using byte write in address 0000h
Address
Number of remaining
write cycles
0000h
300M
times
0001h
300M
times
···
Even if only 1 byte of data is to be written in address 0000h,
the addresses 0000h to 0003h are written as one group.
Therefore, the number of write cycle times at addresses 0001h to
0003h decreases.
Figure 43. Example of data write and number of remaining write cycles
Read Command
Read the EEPROM data. Read has a random read and a current read functions. Random read is commonly used in
commands that specify addresses and read data. The current read is a command to read data of the internal address
register without specifying an address. In both read functions, sequential read is possible where the next address data
can be read in succession.
SLAVE
1st WORD
ADDRESS WRITE ADDRESS（ｎ）
START
SDA
LINE
1 0 1 0 A2A1A0
0
0
* * *
2nd WORD
SLAVE
ADDRESS（ｎ） START ADDRESS READ
WA
0
WAWA
12 11
R/W ACK
ACK
ACK
1 0 1 0 A2 A1A0
0
DATA(n)
D7
STOP
D0
* Don’t Care bit
0
ACK
R/W ACK
Figure 44. Random Read
START
SDA
LINE
SLAVE
ADDRESS
DATA(n)
READ
1 0 1 0 A2A1A0
STOP
D7
D0
0
R/W ACK
ACK
Figure 45. Current Read
SLAVE
START ADDRESS
SDA
LINE
READ
1 0 1 0 A2 A1A0
0
0
DATA(n)
D7
R/W ACK
DATA(n+x)
D0
ACK
D7
ACK
STOP
D0
ACK
Figure 46. Sequential Read (in the Case of Current Read)
(1) In random read, data of designated word address can be read.
(2) When the command just before current read is random read or current read (each including sequential read), if last
read address is (n)-th, data of the incremented address (n+1)-th is outputted.
(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (microcontroller) side, the
next address data can be read in succession.
(4) Read is ended by stop condition where 'HIGH' is input to ACK signal after D0 and SDA signal goes from 'LOW' to
'HIGH' while at SCL signal is 'HIGH'.
(5) When 'LOW' is input at ACK signal after D0 without 'HIGH' input, sequential read gets in, and the next data is
outputted. Therefore, read command cannot be ended. To end read command, be sure to input 'HIGH' to ACK
signal after D0, and the stop condition where SDA goes from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.
(6) Sequential read is ended by stop condition where 'HIGH' is input to ACK signal after arbitrary D0 and SDA goes
from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.
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BR24G64xxx-5 Series
Method of Reset
This IC can be reset by sending the stop condition after executing the start condition. Please execute it when it is necessary
to reset after power-up, or during command input timing. However, the start condition and stop condition could not be
applied because 'HIGH' input of microcontroller and 'LOW' output of EEPROM collide when EEPROM is 'LOW' in ACK
output section and data reading. In that case, input SCL clock until SDA bus is released ('HIGH' by pull-up). After confirming
that SDA is released, send the stop condition after inputting the start condition. If SDA bus could not be confirmed whether
released or not in microcontroller, input the software reset. If software reset is run, EEPROM can be reset without
confirming the SDA state because SDA bus is always released in either of the two start conditions. The method of reset is
shown in the table below.
Status of SDA
Method of reset
SDA bus released
('HIGH' by pull-up)
Send the stop condition after executing the start condition.
'LOW'
Input SCL clock until SDA bus is released, confirm that SDA bus is released, and send the
stop condition after inputting start condition.
Microcontroller cannot
confirm SDA bus is
released or not
Using the software reset shown in the figure below, the start condition can be always
excuted. Within the dummy clock input area, the SDA bus is needed to be released ('HIGH'
by pull-up). For normal commands, start with the start condition input.
SCL
Start
Dummy clock×9
Start
1
2
8
Stop
Normal command
9
SDA
Normal command
Figure 47. Input timing of software reset
Acknowledge Polling
During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic
write execution after write input, next command (slave address) is sent. If the first ACK signal sends back 'LOW', then it
means end of write operation, else 'HIGH' is returned, which means writing is still in progress. By the use of acknowledge
polling, next command can be executed without waiting for tWR = 5ms.
To write continuously, slave address with R / W = 0, then to carry out current read after write, slave address with R / W = 1
is sent. If ACK signal sends back 'LOW', then execute word address input and data output and so forth.
During internal write,
ACK = HIGH is returned.
First write command
START
STOP
START
START
Write Command
Slave
Slave
Address
Address
ACK
=HIGH
tWR
···
ACK
=HIGH
Second write command
START
···
STOP
START
Slave
Slave
Address
Address
tWR
ACK
=HIGH
Word
Data
Address
ACK
=LOW
ACK
=LOW
ACK
=LOW
After completion of internal write,
ACK=LOW is returned, so input next
word address and data in succession.
Figure 48. The Case of Continuous Write by Acknowledge Polling
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BR24G64xxx-5 Series
WP Valid Timing (Write Cancel)
WP is usually fixed to 'HIGH' or 'LOW', but when WP is controlled and used for write cancel and so on, pay attention to the
following WP valid timing. Write can be cancelled by setting WP='HIGH' while it is executed and in WP valid area. In both
byte write and page write, the area from the first start condition of command to the rise of clock which take in D0 of data(in
page write, the first byte data) is the WP invalid area. WP input in this area becomes ‘Don't care’. The area from the rise of
clock to take in D0 to the stop condition input is the WP valid area. Furthermore, after the execution of forced end by WP,
the IC enters standby status.
·Rise of SDA
·Rise of D0 taken clock
SCL
SCL
SDA
D1
D0
ACK
SDA
D0
Enlarged view
Enlarged view
STOP
START
SDA
ACK
Slave
Word
Address
Address
ACK
=LOW
tWR
D7 D6 D5 D4 D3 D2 D1 D0
ACK
=LOW
Data
ACK
=LOW
WP Invalid Area
ACK
=LOW
WP Valid Area
WP
WP Invalid Area
If WP='HIGH' in this area,
data is not written
Figure 49. WP Valid Timing
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. However,
within ACK output area and during data read, SDA bus may output 'LOW'. In this case, start condition and stop condition
cannot be inputted, so reset is not available. Therefore, execution of reset is needed referring ‘Method of Reset’. When
command is cancelled by start-stop condition during random read, sequential read, or current read, internal setting address
is not determined. Therefore, it is not possible to carry out current read in succession. To carry out read in succession, carry
out random read.
SCL
SDA
1
0
1
0
Start Condition
Stop Condition
Figure 50. The Case of Cancel by Start, Stop Condition during Slave Address Input
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BR24G64xxx-5 Series
Application Examples
1. I/O Peripheral Circuit
(1) Pull-up Resistance of SDA Pin
SDA is NMOS open drain, so it requires a pull-up resistor. As for this resistor value (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The
smaller the RPU increases the supply current.
(2) Maximum Value of RPU
The maximum value of RPU is determined by the following factors.
(a) SDA rise time determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(b) The bus electric potential ○
A to be determined by input current leak total (IL) of the device connected to bus at
output of 'HIGH' to SDA line and RPU should sufficiently secure the input 'HIGH' level (VIH) of microcontroller and
EEPROM including recommended noise margin of 0.2VCC.
VCC - ILRPU -0.2 VCC VIH
∴RPU
VCC
Microcontroller
0.8VCC -VIH
IL
Ex.) VCC=3V
from (b)
∴RPU
IL
EEPROM
RPU
SDA Pin
A
IL1
IL=10µA VIH=0.7VCC
IL2
Bus line
Capacitance
CBUS
0.8 3 -0.7 3
10 10 -6
Figure 51. I/O Circuit Diagram
30 [ kΩ ]
(3) Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
(a) When IC outputs 'LOW', the bus electric potential ○
A should be equal to or less than output 'LOW' level (VOL)
of EEPROM.
VCC -VOL
IOL
RPU
VCC -VOL
∴RPU
IOL
Ex.) VCC=3V, VOL=0.4V, IOL=3.2mA, microcontroller, EEPROM VIL=0.3VCC
3 - 0.4
3.2 10 -3
812 .5 [ Ω ]
∴ RPU
(4) Pull-up Resistance of SCL Pin
When SCL control is made at the CMOS output port, there is no need for a pull-up resistor. But when there is a time
where SCL becomes 'Hi-Z', add a pull-up resistor. As for the pull-up resistor value, decide with the balance with drive
performance of output port of microcontroller.
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2. Cautions on Microcontroller Connection
(1) RS
In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input/output of
tri state to SDA port, insert a series resistance RS between the pull-up resistor RPU and the SDA pin of EEPROM. This
is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA pin against surge. Therefore, even when SDA port is open
drain input/output, RS can be used.
ACK
VCC
SCL
RPU
RS
SDA
'HIGH' output of microcontroller
'LOW ' output of EEPROM
Microcontroller
EEPROM
Over current flows to SDA line by 'HIGH'
output of microcontroller and 'LOW'
output of EEPROM.
Figure 52. I/O Circuit Diagram
Figure 53. I/O Collision Timing
(2) Maximum Value of RS
The maximum value of RS is determined by the following relations.
(a) SDA rise time to be determined by the capacitance (CBUS) of bus line of SDA and RPU should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(b) The bus electric potential ○
A to be determined by RPU and RS when EEPROM outputs 'LOW' to SDA bus should
sufficiently secure the input 'LOW' level (VIL) of microcontroller including recommended noise margin of 0.1VCC.
(VCC -VOL) RS
VOL 0.1VCC VIL
RPU RS
VIL -VOL -0.1VCC
∴ RS
RPU
1.1VCC -VIL
VCC
RPU A
RS
VOL
IOL
Ex.) VCC=3V
Bus line
capacitance
CBUS
VIL
RS
EEPROM
Microcontroller
Figure 54. I/O Circuit Diagram
VIL=0.3VCC
VOL=0.4V
RPU=20kΩ
0.3 3 - 0.4 - 0.1 3
20 10 3
1.1 3 - 0.3 3
1.67 [ kΩ ]
(3) Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power
source line and instantaneous power failure of power source may occur. When allowable over current is defined as I,
the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power
source line in set and so forth.
VCC
I
RS
VCC
RPU
RS
'LOW'
output
Rs
Ex.) VCC=3V I=10mA
Over current I
'HIGH'
output
Microcontroller
Rs
EEPROM
3
10 10
-3
300 [ Ω ]
Figure 55. I/O Circuit Diagram
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VCC
I
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Caution on Power-Up Conditions
At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal
circuit not completely reset, hence, malfunction may occur. To prevent it, this IC is equipped with Power-on Reset (P.O.R.)
circuit and LVCC circuit. In order to ensure its operation, observe the following three conditions at power-up.
1.
Set SDA = 'HIGH' and SCL ='LOW' or 'HIGH'.
2.
In order to operate the P.O.R. function, please turn on the power supply so as to satisfy the power-up conditions below.
In order to start its normal operation, set the power supply rise so that the supply voltage constantly increases from
Vbot to VCC level. Also, do not input commands during tINIT from power supply stabilized.
tR:VCC
tPOFF
tINIT
Command
start
VCC
VCC(Min)
Vbot
0V
Figure 56. Rise Waveform Diagram
Power-Up Conditions
Parameter
Supply Voltage at Power OFF
Power OFF
Time(Note 19)
Initialize Time(Note 19)
Supply Voltage Rising
Time(Note 19)
Symbol
Min
Typ
Max
Unit
Vbot
-
-
0.3
V
tPOFF
1
-
-
ms
tINIT
0.1
-
-
ms
tR:VCC
0.001
-
100
ms
(Note 19) Not 100% TESTED
3.
Set SDA and SCL so as not to be 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, please take the following measures.
Be sure to observe condition 3.
(1) When the above condition 1 cannot be observed and SDA becomes 'LOW' at power-up.
→Control SCL and SDA as shown below, and set both SCL and SDA to 'HIGH'.
VCC
tLOW
VCC
SCL
SCL
SDA
SDA
tINIT tHD:DAT tSU:DAT
Figure 57. When SCL='HIGH' and SDA='LOW'
tINIT
tSU:DAT
Figure 58. When SCL='LOW' and SDA='LOW'
(2)
In the case when the above condition 2 cannot be observed.
→Set WP = 'HIGH' at power-up and then execute reset.
(3)
In the case when the above conditions 1 and 2 cannot be observed.
→Set WP = 'HIGH' at power-up, perform (1) and then (2).
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ =1.2V) or below,
data rewrite is prevented.
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I/O Equivalence Circuits
1. Input (A0, A1, A2, WP)
Pull-down elements
Figure 59. Input Pin Circuit Diagram (A0, A1, A2, WP)
2. Input (SCL)
Figure 60. Input Pin Circuit Diagram (SCL)
3. Input / Output (SDA)
Figure 61. Input / Output Pin Circuit Diagram (SDA)
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the operating conditions. The
characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
11. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
12. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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Ordering Information
B
R
2
4
G
6
4
x
x
x
-
5
x
x
BUS Type
24 : I2C
Ambient Operating Temperature
/ Supply Voltage
-40°C~+85°C
/ 1.6V~5.5V
Capacity
64=64Kbit
Package
F : SOP8
FJ : SOP-J8
FVT : TSSOP-B8
FVM : MSOP8
NUX : VSON008X2030
Process Code
Packaging and Forming Specification
E2 : Embossed tape and reel (SOP8, SOP-J8, TSSOP-B8)
TR : Embossed tape and reel (MSOP8, VSON008X2030)
Lineup
Package
Type
Quantity
Orderable Part Number
SOP8
Reel of 2500
BR24G64F
-5E2
SOP-J8
Reel of 2500
BR24G64FJ
-5E2
TSSOP-B8
Reel of 3000
BR24G64FVT
-5E2
MSOP8
Reel of 3000
BR24G64FVM
-5TR
VSON008X2030
Reel of 4000
BR24G64NUX
-5TR
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BR24G64xxx-5 Series
Marking Diagrams
SOP8(TOP VIEW)
MSOP8(TOP VIEW)
Part Number Marking
Part Number Marking
4
G
6
4
4
G
G
LOT Number
5
Pin 1 Mark
Pin 1 Mark
SOP-J8(TOP VIEW)
VSON008X2030 (TOP VIEW)
Part Number Marking
Part Number Marking
4
G
6
LOT Number
4G6
4
LOT Number
4
LOT Number
5
Pin 1 Mark
Pin 1 Mark
Part Number Marking
4
G
6
4
TSSOP-B8(TOP VIEW)
LOT Number
Pin 1 Mark
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BR24G64xxx-5 Series
Physical Dimension and Packing Information
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT: mm)
PKG: SOP8
Drawing No.: EX112-5001-1
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Physical Dimension and Packing Information - continued
Package Name
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SOP-J8
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Physical Dimension and Packing Information - continued
Package Name
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TSSOP-B8
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Physical Dimension and Packing Information - continued
Package Name
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MSOP8
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Physical Dimension and Packing Information – continued
Package Name
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VSON008X2030
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BR24G64xxx-5 Series
Revision History
Date
Revision
30.Nov.2017
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BR24G64F-5 - Web Page
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BR24G64F-5
SOP8
2500
2500
Taping
inquiry
Yes