LINER LTC3637 76v, 1a step-down regulator Datasheet

LTC3637
76V, 1A Step-Down
Regulator
FEATURES
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DESCRIPTION
Wide Operating Input Voltage Range: 4V to 76V
Internal 350mΩ Power MOSFET
No Compensation Required
Adjustable 100mA to 1A Maximum Output Current
Low Dropout Operation: 100% Duty Cycle
Low Quiescent Current: 12µA
Wide Output Range: 0.8V to VIN
0.8V ±1% Feedback Voltage Reference
Precise RUN Pin Threshold
Internal and External Soft-Start
Programmable 1.8V, 3.3V, 5V or Adjustable Output
Few External Components Required
Programmable Input Overvoltage Lockout
Low Profile (0.75mm) 3mm × 5mm DFN and
Thermally-Enhanced MSE16 Packages
The LTC®3637 is a high efficiency step-down DC/DC
regulator with an internal high side power switch that
draws only 12μA DC supply current while maintaining a
regulated output voltage at no load.
The LTC3637 can supply up to 1A load current and features
a programmable peak current limit that provides a simple
method for optimizing efficiency and for reducing output
ripple and component size. The LTC3637’s combination
of Burst Mode® operation, integrated power switch, low
quiescent current, and programmable peak current limit
provides high efficiency over a broad range of load currents.
With its wide input range of 4V to 76V, and programmable
overvoltage lockout, the LTC3637 is a robust regulator
suited for regulating from a wide variety of power sources.
Additionally, the LTC3637 includes a precise run threshold
and soft-start feature to guarantee that the power system
start-up is well-controlled in any environment.
APPLICATIONS
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Industrial Control Supplies
Medical Devices
Distributed Power Systems
Portable Instruments
Battery-Operated Devices
Automotive
Avionics
The LTC3637 is available in the thermally-enhanced
3mm × 5mm DFN and the MSE16 packages.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
Efficiency and Power Loss vs Load Current
12.5V to 76V Input to 12V Output, 1A Regulator
100
90
2.2µF
SW
LTC3637
RUN
200k
VFB
SS
VPRG1
VPRG2
ISET
OVLO
FBO
35.7k
47µF
VOUT
12V
1A
80
EFFICIENCY (%)
10µH
VIN
70
60
40
100
POWER LOSS
30
10
3637 TA01a
1000
50
20
GND
EFFICIENCY
0
0.1
VIN = 24V 10
VIN = 48V
VIN = 76V
0
1.0
10
100
1000
LOAD CURRENT (mA)
3637 TA01b
For more information www.linear.com/LTC3637
POWER LOSS (mW)
VIN
12.5V TO 76V
VOUT = 12V
3637fa
1
LTC3637
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN Supply Voltage...................................... –0.3V to 80V
RUN Voltage............................................... –0.3V to 80V
SS, FBO, ISET Voltages.................................. –0.3V to 6V
VFB, VPRG1, VPRG2, OVLO Voltages............... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC3637E, LTC3637I.......................... –40°C to 125°C
LTC3637H........................................... –40°C to 150°C
LTC3637MP........................................ –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP................................................................ 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
SW 1
16 GND
VIN 3
14 RUN
FBO 5
VPRG2 6
VPRG1 7
GND 8
17
GND
12
11
10
9
OVLO
ISET
SS
VFB
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
SW
1
16 GND
NC
2
15 NC
VIN
3
14 RUN
NC
4
FBO
5
VPRG2
6
11 ISET
VPRG1
7
10 SS
GND
8
9
17
GND
13 NC
12 OVLO
VFB
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
(NOTE 6)
TJMAX = 150°C, θJA = 43°C/W, θJC = 5°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3637EMSE#PBF
LTC3637EMSE#TRPBF
3637
16-Lead Plastic MSOP
–40°C to 125°C
LTC3637IMSE#PBF
LTC3637IMSE#TRPBF
3637
16-Lead Plastic MSOP
–40°C to 125°C
LTC3637HMSE#PBF
LTC3637HMSE#TRPBF
3637
16-Lead Plastic MSOP
–40°C to 150°C
LTC3637MPMSE#PBF
LTC3637MPMSE#TRPBF
3637
16-Lead Plastic MSOP
–55°C to 150°C
LTC3637EDHC#PBF
LTC3637EDHC#TRPBF
3637
16-Lead (5mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3637IDHC#PBF
LTC3637IDHC#TRPBF
3637
16-Lead (5mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3637HDHC#PBF
LTC3637HDHC#TRPBF
3637
16-Lead (5mm × 3mm) Plastic DFN
–40°C to 150°C
LTC3637MPDHC#PBF
LTC3637MPDHC#TRPBF
3637
16-Lead (5mm × 3mm) Plastic DFN
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
3637fa
For more information www.linear.com/LTC3637
LTC3637
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (VIN)
VIN
Input Voltage Operating Range
4
76
V
VOUT
Output Voltage Operating Range
0.8
VIN
V
UVLO
VIN Undervoltage Lockout
3.65
3.5
150
3.85
3.70
V
V
mV
IQ
DC Supply Current (Note 5)
Active Mode
Sleep Mode
Shutdown Mode
165
12
3
350
20
10
µA
µA
µA
VIN Rising
VIN Falling
Hysteresis
l
l
3.45
3.30
No Load
RUN = 0V
RUN and OVLO Pin Threshold Voltage
Rising
Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
RUN Pin Leakage Current
RUN = 1.3V
–10
0
10
nA
V
V
Output Supply (VFB)
Feedback Comparator Threshold Voltage
(Adjustable Output)
VFB Rising, VPRG1 = VPRG2 = 0V
LTC3637E, LTC3637I
LTC3637H, LTC3637MP
l
l
0.792
0.788
0.800
0.800
0.808
0.812
Feedback Comparator Hysteresis
(Adjustable Output)
VFB Falling, VPRG1 = VPRG2 = 0V
l
2.5
5
7
mV
Feedback Pin Current
VFB = 1V, VPRG1 = 0V, VPRG2 = 0V
–10
0
10
nA
Feedback Comparator Threshold Voltages
(Fixed Output)
VFB Rising, VPRG1 = SS, VPRG2 = 0V
VFB Falling, VPRG1 = SS, VPRG2 = 0V
l
l
4.940
4.910
5.015
4.985
5.090
5.060
V
V
VFB Rising, VPRG1 = 0V, VPRG2 = SS
VFB Falling, VPRG1 = 0V, VPRG2 = SS
l
l
3.250
3.230
3.310
3.290
3.370
3.350
V
V
VFB Rising, VPRG1 = VPRG2 = SS
VFB Falling, VPRG1 = VPRG2 = SS
l
l
1.775
1.765
1.805
1.795
1.835
1.825
V
V
Feedback Voltage Line Regulation
VIN = 4V to 76V
Peak Current Comparator Threshold
ISET Floating
100k Resistor from ISET to GND
ISET Shorted to GND
Power Switch On-Resistance
ISW = –200mA
0.35
Switch Pin Leakage Current
VIN = 65V, SW = 0V
0.001
%/V
Operation
Soft-Start Pin Pull-Up Current
SS Pin < 2.5V
Internal Soft-Start Time
SS Pin Floating
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3637 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3637E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3637I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3637H is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3637MP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
l
l
l
2
0.9
0.17
3
2.4
1.2
0.24
2.8
1.5
0.31
A
A
A
0.1
1
μA
5
6
0.8
Ω
μA
ms
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA)
where θJA is 43°C/W for the DFN or 45°C/W for the MSOP.
3637fa
For more information www.linear.com/LTC3637
3
LTC3637
ELECTRICAL CHARACTERISTICS
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device. The overtemperature protection level is not production tested.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSOP package should be used. See
Applications Information.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency and Power Loss
vs Load Current, VOUT = 3.3V
Efficiency and Power Loss
vs Load Current, VOUT = 5V
100
VOUT = 3.3V
90 FIGURE 13 CIRCUIT
VOUT = 5V, FIGURE 13 CIRCUIT
90
50
POWER LOSS
40
100
30
VIN = 12V 10
VIN = 24V
VIN = 70V
0
1.0
10
100
1000
LOAD CURRENT (mA)
20
10
0
0.1
EFFICIENCY (%)
1000
60
80
80
70
70
60
100
40
30
VIN = 12V 10
VIN = 24V
VIN = 68V
0
1.0
10
100
1000
LOAD CURRENT (mA)
20
10
0
0.1
3637 G01
∆VOUT/VOUT (%/V)
EFFICIENCY (%)
80
70
ILOAD = 1A
ILOAD = 100mA
ILOAD = 10mA
ILOAD = 1mA
10
20
30 40
50 60
INPUT VOLTAGE (V)
20
10
0
0.1
VIN = 12V 10
VIN = 24V
VIN = 67V
0
10
100
1000
1.0
LOAD CURRENT (mA)
3637 G03
Load Regulation vs Load Current
5.02
0.02
0.01
0
–0.01
–0.02
–0.03
VIN = 12V
VOUT = 5V
FIGURE 13 CIRCUIT
5.01
5.00
4.99
–0.04
70
80
3637 G04
4
100
POWER LOSS
30
OUTPUT VOLTAGE (V)
0.03
0
40
VOUT = 5V
ILOAD = 1A
FIGURE 13 CIRCUIT
0.04
90
50
1000
50
Line Regulation vs Input Voltage
0.05
VOUT = 5V
FIGURE 13 CIRCUIT
60
60
3637 G02
Efficiency vs Input Voltage
100
1000
POWER LOSS
50
EFFICIENCY
POWER LOSS (mW)
EFFICIENCY
VOUT = 1.8V
90 FIGURE 13 CIRCUIT
POWER LOSS (mW)
70
POWER LOSS (mW)
EFFICIENCY (%)
80
100
EFFICIENCY
EFFICIENCY (%)
100
Efficiency and Power Loss
vs Load Current, VOUT = 1.8V
–0.05
5
15
45
35
25
55
INPUT VOLTAGE (V)
65
75
3637 G05
4.98
0 100 200 300 400 500 600 700 800 900 1000
LOAD CURRENT (mA)
3637 G06
3637fa
For more information www.linear.com/LTC3637
LTC3637
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V
0.802
0.800
0.798
0.796
–55
–25
5.5
95
5
35
65
TEMPERATURE (°C)
125
5.4
VIN = 12V
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
–55
155
–25
65
35
5
95
TEMPERATURE (°C)
125
3637 G07
2000
1600
1200
800
400
50
100
150
RISET (kΩ)
200
VIN = 12V
2400
1600
RISET = 100k
1200
800
400
ISET = GND
0
–55
250
12
8
SHUTDOWN
4
–25
1.08
1.06
–55
75
3637 G13
–25
5
35
65
95
TEMPERATURE (°C)
95
5
65
35
TEMPERATURE (°C)
125
2000
1600
RISET = 100k
1200
800
400
0
155
ISET = 0V
0
10
20 30 40 50 60
INPUT VOLTAGE (V)
UVLO Threshold Voltages
vs Temperature
3.70
RISING
3.65
20
SLEEP
10
0
–55 –25
70
3637 G12
25
15
155
125
ISET OPEN
2400
VIN = 12V
5
65
FALLING
1.10
UVLO THRESHOLD (V)
VIN SUPPLY CURRENT (µA)
VIN SUPPLY CURRENT (µA)
SLEEP
45
35
25
55
INPUT VOLTAGE (V)
1.12
Quiescent VIN Supply Current
vs Temperature
30
15
1.14
3637 G11
20
5
1.16
2800
2000
Quiescent VIN Supply Current
vs Input Voltage
0
1.20
1.18
Peak Current Trip Threshold
vs Input Voltage
ISET OPEN
3637 G10
16
RISING
3637 G09
PEAK CURRENT TRIP THRESHOLD (mA)
PEAK CURRENT TRIP THRESHOLD (mA)
PEAK CURRENT TRIP THRESHOLD (mA)
2800
VIN = 12V
0
1.22
Peak Current Trip Threshold
vs Temperature
2400
0
155
1.24
3637 G08
Peak Current Trip Threshold
vs RISET
2800
RUN and OVLO Comparator
Threshold Voltages vs Temperature
RUN AND OVLO COMPARATOR THRESHOLD (V)
0.804
Feedback Comparator Hysteresis
vs Temperature
FEEDBACK COMPARATOR HYSTERESIS (mV)
FEEDBACK COMPARATOR TRIP VOLTAGE (V)
Feedback Comparator Trip
Voltage vs Temperature
3.55
FALLING
3.50
SHUTDOWN
65
35
95
5
TEMPERATURE (°C)
3.60
125
155
3637 G14
3.45
–55
–25
65
35
5
95
TEMPERATURE (°C)
125
155
3637 G15
3637fa
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5
LTC3637
TYPICAL PERFORMANCE CHARACTERISTICS
Switch Leakage Current
vs Temperature
1.0
VIN = 65V
SWITCH ON-RESISTANCE (Ω)
25
15
SW = 65V
5
SW = 0V
–5
–15
–55
–25
65
35
5
95
TEMPERATURE (°C)
155
125
0.55
0.8
150°C
0.6
0.4
25°C
–55°C
0.2
0
0
10
20 30 40 50
INPUT VOLTAGE (V)
60
70
Load Step Transient Response
LOAD
CURRENT
500mA/DIV
VIN = 12V
100µs/DIV
VOUT = 5V
5mA TO 1A LOAD STEP
FIGURE 13 CIRCUIT
3637 G19
0.45
0.35
0.25
0.15
–55
–25
95
5
35
65
TEMPERATURE (°C)
125
155
3637 G18
Operating Waveforms, VIN = 76V
OUTPUT
VOLTAGE
50mV/DIV
SWITCH
VOLTAGE
25V/DIV
INDUCTOR
CURRENT
2A/DIV
OUTPUT
VOLTAGE
50mV/DIV
VIN = 12V
3637 G17
3637 G16
6
Switch On-Resistance
vs Temperature
SWITCH ON-RESISTNACE (Ω)
SWITCH LEAKAGE CURRENT (µA)
35
Switch On-Resistance
vs Input Voltage
Short Circuit and Recovery
OUTPUT
VOLTAGE
2V/DIV
INDUCTOR
CURRENT
1A/DIV
VOUT = 5V
10µs/DIV
IOUT = 1A
FIGURE 13 CIRCUIT
3637 G20
VIN = 12V
200µs/DIV
VOUT = 5V
IOUT = 50mA (NON SHORT CIRCUIT)
FIGURE 13 CIRCUIT
3637 G21
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LTC3637
PIN FUNCTIONS
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
NC (Pins 2, 4, 13, 15 DHC Package Only): No Internal
Connection. Leave these pins open.
VIN (Pin 3): Main Input Supply Pin. A ceramic bypass
capacitor should be tied between this pin and GND.
FBO (Pin 5): Feedback Comparator Output. The typical
pull-up current is 20µA. The typical pull- down impedance is 70Ω.
VPRG2, VPRG1 (Pins 6, 7): Output Voltage Selection. Short
both pins to ground for an external resistive divider programmable output voltage. Short VPRG1 to SS and short
VPRG2 to ground for a 5V output voltage. Short VPRG1 to
ground and short VPRG2 to SS for a 3.3V output voltage.
Short both pins to SS for a 1.8V output voltage.
GND (Pins 8, 16, Exposed Pad Pin 17): Ground. The exposed backside pad must be soldered to the PCB ground
plane for optimal thermal performance.
VFB (Pin 9): Output Voltage Feedback. When configured
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration, directly connect this pin to the output supply.
ISET (Pin 11): Peak Current Set Input and Voltage Output
Ripple Filter. A resistor from this pin to ground sets the
peak current comparator threshold. Leave floating for the
maximum peak current (2.4A typical) or short to ground
for minimum peak current (0.24A typical). The maximum
output current is one-half the peak current. The 5µA current
that is sourced out of this pin when switching, is reduced
to 1µA in sleep. Optionally, a capacitor can be placed from
this pin to GND to trade off efficiency for light load output
voltage ripple. See Applications Information.
OVLO (Pin 12): Overvoltage Lockout Input. Connect to
the input supply through a resistor divider to set the overvoltage lockout level. A voltage on this pin above 1.21V
disables the internal MOSFET switch. Normal operation
resumes when the voltage on this pin decreases below
1.10V. A transient exceeding the OVLO threshold triggers
a soft-start reset, resulting in a graceful recovery from
an input supply transient. Connect this pin to ground to
disable the overvoltage lockout.
RUN (Pin 14): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3637, reducing quiescent
current to approximately 3µA. Optionally, connect to the
input supply through a resistor divider to set the undervoltage lockout.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 16.5nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 0.8ms soft-start.
3637fa
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7
LTC3637
BLOCK DIAGRAM
1.3V
11
ACTIVE: 5µA
SLEEP: 1µA
ISET
+
–
RUN
+
–
1.21V
LOGIC
SW
+
12
VIN
3
CIN
PEAK CURRENT
COMPARATOR
14
VIN
+
VOUT
D1 C
OUT
GND
OVLO
L1
1
–
16
+
INTVCC*
20µA
5
FEEDBACK
COMPARATOR
FBO
+
+
–
70Ω
8
17
VOLTAGE INTVCC*
REFERENCE
0.800V
START-UP: 50µA
NORMAL: 5µA
SOFTSTART
R1
R2
GND
GND
–
REVERSE CURRENT
COMPARATOR
VPRG2 VPRG1
GND
GND
SS
SS
GND
SS
GND
SS
VOUT
ADJUSTABLE
5V FIXED
3.3V FIXED
1.8V FIXED
R1
VFB
VPRG1
VPRG2
R2
1.0M ∞
4.2M 800k
2.5M 800k
1.0M 800k
SS
10
9
7
6
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
3637 BD
*WHEN VIN > 5V, INTVCC = 5V
WHEN VIN ≤ 5V, INTVCC FOLLOWS VIN
8
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LTC3637
OPERATION
(Refer to Block Diagram)
The LTC3637 is a step-down DC/DC regulator with an
internal high side power switch that uses Burst Mode
control. The low quiescent current and high switching
frequency results in high efficiency across a wide range
of load currents. Burst Mode operation functions by using short “burst” cycles to switch the inductor current
through the internal power MOSFET, followed by a sleep
cycle where the power switch is off and the load current
is supplied by the output capacitor. During the sleep cycle,
the LTC3637 draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency. Figure 1 shows an example
of Burst Mode operation. The switching frequency and the
number of switching cycles during Burst Mode operation
are dependent on the inductor value, peak current, load
current, input voltage and output voltage.
SLEEP
CYCLE
BURST
CYCLE
SWITCHING
FREQUENCY
INDUCTOR
CURRENT
BURST
FREQUENCY
OUTPUT
VOLTAGE
∆VOUT
3637 F01
Figure 1. Burst Mode Operation
reducing the VIN pin supply current to only 12µA. As the
load current discharges the output capacitor, the voltage
on the VFB pin decreases. When this voltage falls 5mV
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak current
comparator threshold or the voltage on the VFB pin exceeds
800mV, at which time the high side power switch is turned
off and the external catch diode turns on. The inductor
current ramps down until the reverse current comparator trips, signaling that the current is close to zero. If the
voltage on the VFB pin is still less than the 800mV reference, the high side power switch is turned on again and
another cycle commences. The average current during a
burst cycle will normally be greater than the average load
current. For this architecture, the maximum average output
current is equal to half of the peak current.
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near
zero, the LTC3637 inherently switches at a lower frequency
during start-up or short-circuit conditions.
Main Control Loop
Start-Up and Shutdown
The LTC3637 uses the VPRG1 and VPRG2 control pins to
connect internal feedback resistors to the VFB pin. This
enables fixed outputs of 1.8V, 3.3V or 5V without increasing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
External feedback resistors (adjustable mode) can still
be used by connecting both VPRG1 and VPRG2 to ground.
If the voltage on the RUN pin is less than 0.7V, the LTC3637
enters a shutdown mode in which all internal circuitry is
disabled, reducing the DC supply current to 3µA. When the
voltage on the RUN pin exceeds 1.21V, normal operation
of the main control loop is enabled. The RUN pin comparator has 110mV of internal hysteresis, and therefore
must fall below 1.1V to stop switching and disable the
main control loop.
In adjustable mode the feedback comparator monitors
the voltage on the VFB pin and compares it to an internal 800mV reference. If this voltage is greater than the
reference, the comparator activates a sleep mode in which
the power switch and current comparators are disabled,
An internal 0.8ms soft-start function limits the ramp rate
of the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
supply droop is desired, a capacitor can be placed from
For more information www.linear.com/LTC3637
3637fa
9
LTC3637
OPERATION
(Refer to Block Diagram)
the SS pin to ground. The 5µA current that is sourced
out of this pin will create a smooth voltage ramp on the
capacitor. If this ramp rate is slower than the internal
0.8ms soft-start, then the output voltage will be limited
by the ramp rate on the SS pin instead. The internal and
external soft-start functions are reset on start-up and after
an undervoltage or overvoltage event on the input supply.
The peak inductor current is not limited by the internal or
external soft-start functions; however, placing a capacitor
from the ISET pin to ground does provide this capability.
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 2.4A. This peak inductor current can
be adjusted by placing a resistor from the ISET pin to
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak current comparator threshold.
During sleep mode, the current sourced out of the ISET pin
is reduced to 1µA. The ISET current is increased back to 5µA
on the first switching cycle after exiting sleep mode. The
ISET current reduction in sleep mode, along with adding
a filtering capacitor, CISET, from the ISET pin to ground,
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly degraded load step transient response.
Dropout Operation
When the input supply decreases toward the output supply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3637 allows
the duty cycle to increase all the way to 100%. At 100%
duty cycle, the P-channel MOSFET stays on continuously,
providing output current equal to the peak current, which
can be greater than 2A. The power dissipation of the
LTC3637 can increase dramatically during dropout operation especially at input voltages less than 10V. The increased
power dissipation is due to higher potential output current
and increased P-channel MOSFET on-resistance. See
the Thermal Considerations section of the Applications
Information for a detailed example.
10
Input Voltage and Overtemperature Protection
When using the LTC3637, care must be taken not to
exceed any of the ratings specified in the Absolute Maximum Ratings section. As an added safeguard, however,
the LTC3637 incorporates an overtemperature shutdown
feature. If the junction temperature reaches approximately
180°C, the LTC3637 will enter thermal shutdown mode.
Both power switches will be turned off and the SW node
will become high impedance. After the part has cooled
below 160°C, it will restart. The overtemperature level is
not production tested.
The LTC3637 additionally implements protection features
which inhibit switching when the input voltage is not within
a programmed operating range. By using a resistive divider from the input supply to ground, the RUN and OVLO
pins can serve as a precise input supply voltage monitor.
Switching is disabled when either the RUN pin falls below
1.1V or the OVLO pin rises above 1.21V, which can be
configured to limit switching to a specific range of input
supply voltage. Pulling the RUN pin below 700mV forces
a low quiescent current shutdown (3µA). Furthermore, if
the input voltage falls below 3.5V typical (3.7V maximum),
an internal undervoltage detector disables switching.
When switching is disabled, the LTC3637 can safely sustain
input voltages up to the absolute maximum rating of 80V.
Input supply undervoltage or overvoltage events trigger a
soft-start reset, which results in a graceful recovery from
an input supply transient.
High Input Voltage Considerations
When operating with an input voltage to output voltage differential of more than 65V, a minimum output load current
of 10mA is required to maintain a well-regulated output
voltage under all operating conditions, including shutdown
mode. If this 10mA minimum load is not available, then
the minimum output voltage that can be maintained by
the LTC3637 is limited to VIN – 65V.
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LTC3637
APPLICATIONS INFORMATION
The basic LTC3637 application circuit is shown on the front
page of the data sheet. External component selection is
determined by the maximum load current requirement and
begins with the selection of the peak current programming
resistor, RISET. The inductor value L can then be determined,
followed by capacitors CIN and COUT.
Peak Current Resistor Selection
The peak current comparator has a guaranteed peak current
limit of 2A (2.4A typical), which guarantees a maximum
average load current of 1A. For applications that demand
less current, the peak current threshold can be reduced to
as little as 200mA (240mA typical). This lower peak current
allows the use of lower value, smaller components (input
capacitor, output capacitor, and inductor), resulting in
lower supply ripple and a smaller overall DC/DC regulator.
The threshold can be easily programmed using a resistor (RISET) between the ISET pin and ground. The voltage
generated on the ISET pin by RISET and the internal 5µA
current source sets the peak current. The voltage on the
ISET pin is internally limited within the range of 0.1V to
1.0V. The value of resistor for a particular peak current can
be selected by using Figure 2 or the following equation:
RISET = 140k • IPEAK – 24k
RISET (kΩ)
where 200mA < IPEAK < 2A.
260
240
220
200
180
160
140
120
100
80
60
40
20
0
The internal 5μA current source is reduced to 1μA in sleep
mode to maximize efficiency and to facilitate a trade-off
between efficiency and light load output voltage ripple, as
described in the Optimizing Output Voltage Ripple section
of the Applications Information. For maximum efficiency,
minimize the capacitance on the ISET pin and place the
RISET resistor as close to the pin as possible.
The typical peak current is internally limited to be within the
range of 240mA to 2.4A. Shorting the ISET pin to ground
programs the current limit to 240mA, and leaving it float
sets the current limit to the maximum value of 2.4A. When
selecting this resistor value, be aware that the maximum
average output current for this architecture is limited to
half of the peak current. Therefore, be sure to select a value
that sets the peak current with enough margin to provide
adequate load current under all conditions. Selecting the
peak current to be 2.2 times greater than the maximum
load current is a good starting point for most applications.
Inductor Selection
The inductor, input voltage, output voltage, and peak current determine the switching frequency during a burst
cycle of the LTC3637. For a given input voltage, output
voltage, and peak current, the inductor value sets the
switching frequency during a burst cycle when the output
is in regulation. Generally, switching between 50kHz and
250kHz yields high efficiency, and 200kHz is a good first
choice for many applications. The inductor value can be
determined by the following equation:
 V
  V

L =  OUT  • 1– OUT 
VIN 
 f •IPEAK  
The variation in switching frequency during a burst cycle
with input voltage and inductance is shown in Figure 3. For
lower values of IPEAK, multiply the frequency in Figure 3
by 2.4A/IPEAK.
0
400
600
800
200
MAXIMUM LOAD CURRENT (mA)
1000
3637 F02
Figure 2. RISET Selection
An additional constraint on the inductor value is the
LTC3637’s 150ns minimum on-time of the high side switch.
Therefore, in order to keep the current in the inductor
well-controlled, the inductor value must be chosen so that
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11
LTC3637
APPLICATIONS INFORMATION
VOUT = 5.0V
ISET OPEN
1000
L = 5.6µH
200
L = 10µH
100
L = 22µH
INDUCTOR VALUE (µH)
SWITCHING FREQUENCY (kHz)
300
100
10
L = 47µH
0
0
10
20
30
40
50
60
1
100
70
VIN INPUT VOLTAGE (V)
1000
PEAK INDUCTOR CURRENT (mA)
3637 F03
3637 F04
Figure 3. Switching Frequency for VOUT = 5.0V
Figure 4. Recommended Inductor Values for Maximum Efficiency
it is larger than a minimum value which can be computed
as follows:
larger cores can be used, which extends the recommended
range of Figure 4 to larger values.
L>
VIN(MAX) • tON(MIN)
• 1.2
IPEAK
Inductor Core Selection
where VIN(MAX) is the maximum input supply voltage when
switching is enabled, tON(MIN) is 150ns, IPEAK is the peak
current, and the factor of 1.2 accounts for typical inductor
tolerance and variation over temperature. For applications
that have large input supply transients, the OVLO pin can
be used to disable switching above the maximum operating voltage, VIN(MAX), so that the minimum inductor value
is not artificially limited by a transient condition. Inductor
values that violate the above equation will cause the peak
current to overshoot and permanent damage to the part
may occur.
Although the above equation provides the minimum inductor value, higher efficiency is generally achieved with
a larger inductor value, which produces a lower switching
frequency. For a given inductor type, however, as inductance
is increased, DC resistance (DCR) also increases. Higher
DCR translates into higher copper losses and lower current
rating, both of which place an upper limit on the inductance.
The recommended range of inductor values for small surface mount inductors as a function of peak current is shown
in Figure 4. The values in this range are a good compromise
between the trade-offs discussed above. For applications
where board area is not a limiting factor, inductors with
12
Once the value for L is known, the type of inductor must
be selected. High efficiency regulators generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly
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APPLICATIONS INFORMATION
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Würth, Coilcraft, TDK,
Toko, and Sumida.
CIN and COUT Selection
The input capacitor, CIN, is needed to filter the trapezoidal
current at the source of the top high side MOSFET. CIN
should be sized to provide the energy required to charge
the inductor without causing a large decrease in input
voltage (∆VIN). The relationship between CIN and ∆VIN
is given by:
CIN >
L •IPEAK 2
2 • VIN • ∆VIN
It is recommended to use a larger value for CIN than
calculated by the above equation since capacitance decreases with applied voltage. In general, a 4.7µF X7R
ceramic capacitor is a good choice for CIN in most LTC3637
applications.
To minimize large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used.
RMS current is given by:
IRMS = IOUT(MAX) •
VOUT
VIN
•
–1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
The output capacitor, COUT, filters the inductor’s ripple
current and stores energy to satisfy the load current when
the LTC3637 is in sleep. The output ripple has a lower limit
of VOUT/160 due to the 5mV typical hysteresis of the feedback comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC3637 continues to
switch and supply current to the output. The output ripple
can be approximated by:
I
 4 • 10 –6 VOUT
∆VOUT ≈  PEAK – ILOAD  •
+
 2
 COUT
160
The output ripple is a maximum at no load and approaches
lower limit of VOUT/160 at full load. Choose the output
capacitor COUT to limit the output voltage ripple ∆VOUT
using the following equation:
COUT ≥
IPEAK • 2 • 10 –6
V
∆VOUT – OUT
160
The value of the output capacitor must be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
COUT
 IPEAK 2
> 50 • L • 

 VOUT 
Typically, a capacitor that satisfies the voltage ripple
requirement is adequate to filter the inductor ripple. To
avoid overheating, the output capacitor must also be sized
to handle the ripple current generated by the inductor.
The worst-case ripple current in the output capacitor is
given by IRMS = IPEAK/2. Multiple capacitors placed in
parallel may be needed to meet the ESR and RMS current
handling requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and longterm reliability. Ceramic capacitors have excellent low ESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
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LTC3637
APPLICATIONS INFORMATION
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
Input Voltage Steps
If the input voltage falls below the regulated output voltage, the body diode of the internal high side MOSFET will
conduct current from the output supply to the input supply. If the input voltage falls rapidly, the voltage across the
inductor will be significant and may saturate the inductor. A
large current will then flow through the high side MOSFET
body diode, resulting in excessive power dissipation that
may damage the part.
If rapid voltage steps are expected on the input supply, put
a small silicon or Schottky diode in series with the VIN pin
to prevent reverse current and inductor saturation, shown
below as D2 in Figure 5. The diode should be sized for a
reverse voltage of greater than the input voltage, and to
withstand repetitive currents higher than the maximum
peak current of the LTC3637.
D2
VIN
SW
L
VOUT
COUT
CIN
3637 F05
Figure 5. Preventing Current Flow to the Input
Ceramic Capacitors and Audible Noise
Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
For application with inductive source impedance, such as
a long wire, an electrolytic capacitor or a ceramic capacitor
14
Ceramic capacitors are also piezoelectric sensitive. The
LTC3637’s burst frequency depends on the load current,
and in some applications at light load the LTC3637 can
excite the ceramic capacitor at audio frequencies, generating audible noise. If the noise is unacceptable, use
a high performance tantalum or electrolytic capacitor at
the output.
LIN
LTC3637
VIN
R=
LIN
CIN
CIN
3637 F05
4 • CIN
Figure 6. Series RC to Reduce VIN Ringing
Output Voltage Programming
LTC3637
INPUT
SUPPLY
with a series resistor may be required in parallel with
CIN to dampen the ringing of the input supply. Figure
6 shows this circuit and the typical values required to
dampen the ringing.
The LTC3637 has three fixed output voltage modes that
can be selected with the VPRG1 and VPRG2 pins and an
adjustable mode. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V and 1.8V applications. To select the fixed 5V output
voltage, connect VPRG1 to SS and VPRG2 to GND. For 3.3V,
connect VPRG1 to GND and VPRG2 to SS. For 1.8V, connect
both VPRG1 and VPRG2 to SS. For any of the fixed output
voltage options, directly connect the VFB pin to VOUT.
For the adjustable output mode (VPRG1 = 0V, VPRG2 = 0V),
the output voltage is set by an external resistive divider
according to the following equation:
 R1 
VOUT = 0.8V • 1+ 
 R2 
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 7. The output
voltage can range from 0.8V to VIN. Be careful to keep the
divider resistors very close to the VFB pin to minimize the
trace length and noise pick-up on the sensitive VFB signal.
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APPLICATIONS INFORMATION
RUN Pin and External Input Overvoltage/Undervoltage
Lockout
VOUT
VFB
LTC3637
VPRG1
VPRG2
R1
0.8V
R2
3637 F06
Figure 7. Setting the Output Voltage with External Resistors
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
current to the output node or switch node exceeds the load
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
To avoid excessively large values of R1 in high output voltage applications (VOUT ≥ 10V), a combination of external
and internal resistors can be used to set the output voltage. This has an additional benefit of increasing the noise
immunity on the VFB pin. Figure 8 shows the LTC3637
with the VFB pin configured for a 5V fixed output with an
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and the
value of R2 must be adjusted accordingly. R2 should be
chosen to be less than 200k to keep the output voltage
variation less than 1% due to the tolerance of the LTC3637’s
internal resistor.
The RUN pin has two different threshold voltage levels.
Pulling the RUN pin below 0.7V puts the LTC3637 into a
low quiescent current shutdown mode (IQ ~ 3µA). When
the RUN pin is greater than 1.21V, the controller is enabled.
Figure 9 shows examples of configurations for driving the
RUN pin from logic.
The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockouts on the VIN supply with a resistive divider from VIN
to ground. A simple resistive divider can be used as shown
in Figure 10 to meet specific VIN voltage requirements.
The current that flows through the R3-R4-R5 divider will
directly add to the shutdown, sleep, and active current of
the LTC3637, and care should be taken to minimize the
impact of this current on the overall efficiency of the application circuit. Resistor values in the megohm range may
be required to keep the impact on quiescent shutdown and
sleep currents low. To pick resistor values, the sum total
of R3 + R4 + R5 (RTOTAL) should be chosen first based on
the allowable DC current that can be drawn from VIN. The
SUPPLY
VIN
LTC3637
LTC3637
RUN
RUN
3637 F09
VOUT
LTC3637
VFB
Figure 9. RUN Pin Interface to Logic
R1
5V
4.2M
VIN
R2
R3
0.8V
RUN
800k
SS
R4
VPRG1
VPRG2
LTC3637
OVLO
R5
3637 F08
Figure 8. Setting the Output Voltage with
External and Internal Resistors
3637 F10
Figure 10. Adjustable UV and OV Lockout
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15
LTC3637
APPLICATIONS INFORMATION
individual values of R3, R4 and R5 can then be calculated
from the following equations:
R5 = R TOTAL •
1.21V
Rising VIN OVLO Threshold
R4 = R TOTAL •
1.21V
–R5
Rising VIN UVLO Threshold
R3 = R TOTAL –R5 –R4
For applications that do not need a precise external OVLO,
the OVLO pin can be tied directly to ground. The RUN pin
in this type of application can be used as an external UVLO
using the above equations with R5 = 0Ω.
Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to VIN. In this configuration,
the UVLO threshold is limited to the internal VIN UVLO
thresholds as shown in the Electrical Characteristics table.
The resistor values for the OVLO can be computed using
the above equations with R3 = 0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following relation
should be satisfied:
R5


VIN(MAX) • 
< 6V
 R3+R4+R5 
Catch Diode Selection
The catch diode D1 conducts current only during switch-off
time. Use a Schottky diode to limit forward voltage drop to
increase efficiency. The Schottky diode must have a peak
reverse voltage that is equal to the regulator maximum
input voltage or OVLO set voltage and must be sized for
average forward current in normal operation. Average
forward current can be calculated from:
ID(AVG) =
IOUT • VIN
( VIN – VOUT )
An additional consideration is reverse leakage current.
When the catch diode is reversed biased, any leakage
current will appear as load current. When operating under
light load conditions, the low supply current consumed
16
by the LTC3637 will be optimized by using a catch diode
with minimum reverse leakage current. Low leakage
Schottky diodes often have larger forward voltage drops
at a given current, so a trade-off can exist between low
load and high load efficiency. Often Schottky diodes with
larger reverse bias ratings will have less leakage at a given
output voltage than a diode with a smaller reverse bias
rating. Therefore, superior leakage performance can be
achieved at the expense of diode size.
Soft-Start
Soft-start is implemented by ramping the effective reference voltage from 0V to 0.8V. To increase the duration of
soft-start, place a capacitor from the SS pin to ground.
An internal 5µA pull-up current will charge this capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
CSS = Soft-Start Time •
5µA
0.35V
The minimum soft-start time is limited to the internal softstart timer of 0.8ms. When the LTC3637 detects a fault
condition (input supply undervoltage or overtemperature)
or when the RUN pin falls below 1.1V, or when the OVLO
pin rises above 1.21V, the SS pin is quickly pulled to ground
and the internal soft-start timer is reset. This ensures an
orderly restart when using an external soft-start capacitor.
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramp time can be significant. Therefore, the output voltage
ramp time from 0V to the regulated VOUT value is limited
to a minimum of:
Ramp Time ≥
2 • COUT
VOUT
IPEAK
Optimizing Output Voltage Ripple
Once the peak current resistor, RISET, and inductor are selected to meet the load current and frequency requirements,
an optional capacitor, CISET, can be added in parallel with
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RISET. This will boost efficiency at mid-loads and reduce
the output voltage ripple dependency on load current at the
expense of slightly degraded load step transient response.
The peak inductor current is controlled by the voltage on
the ISET pin. Current out of the ISET pin is 5µA while the
LTC3637 is switching and is reduced to 1µA during sleep
mode. The ISET current will return to 5µA on the first cycle
after sleep mode. Placing a parallel RC from the ISET pin to
ground filters the ISET voltage as the LTC3637 enters and
exits sleep mode which in turn will affect the output voltage ripple, efficiency and load step transient performance.
In general, when RISET is greater than 120k a CISET capacitor
in the 47pF to 100pF range will improve most performance
parameters. When RISET is less than 100k, the capacitance
on the ISET pin should be minimized.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: VIN operating current and I2R losses. The VIN
operating current dominates the efficiency loss at very
low load currents whereas the I2R loss dominates the
efficiency loss at medium to high load currents.
1. The VIN operating current comprises two components:
The DC supply current as given in the electrical characteristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
high again, a packet of charge, ∆Q, moves from VIN to
ground. The resulting ∆Q/dt is the current out of VIN
that is typically larger than the DC bias current.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. When
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the external catch diode. Thus, the series
resistance looking back into the switch pin is a function
of the top and bottom switch RDS(ON) values and the
duty cycle (DC = VOUT/VIN) as follows:
RSW = (RDS(ON)TOP)DC + (RDS(ON)BOT) • (1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics curves. Thus, to obtain the I2R losses, simply add
RSW to RL and multiply the result by the square of the
average output current:
I2R Loss = IO2(RSW + RL)
Other losses, including CIN and COUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
In most applications, the LTC3637 does not dissipate much
heat due to its high efficiency. But, in applications where
the LTC3637 is running at high ambient temperature with
low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
To prevent the LTC3637 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise
from ambient to junction is given by:
TR = PD • θJA
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature is given by:
TJ = TA + TR
3637fa
For more information www.linear.com/LTC3637
17
LTC3637
APPLICATIONS INFORMATION
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC3637 can provide
a DC current as high as the full 2.4A peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
As an example, consider the LTC3637 in dropout at an
input voltage of 5V, a load current of 1A and an ambient
temperature of 85°C. From the Typical Performance graphs
of Switch On-Resistance, the RDS(ON) of the top switch
at VIN = 5V and 100°C is approximately 0.6Ω. Therefore,
the power dissipated by the part is:
PD = (ILOAD)2 • RDS(ON) = (1A)2 • 0.6Ω = 0.6W
For the MSOP package the θJA is 45°C/W. Thus, the junction temperature of the regulator is:
45°C
= 112°C
W
which is below the maximum junction temperature of
150°C.
TJ = 85°C + 0.6W •
Therefore, the minimum inductor requirement is satisfied
and the 4.7μH inductor value may be used.
Next, CIN and COUT are selected. For this design, CIN should
be sized for a current rating of at least:
IRMS = 1A •
3.3V
24V
•
– 1 ≅ 350mARMS
24V
3.3V
The value of CIN is selected to keep the input from drooping less than 240mV (1%):
CIN >
4.7µH • 2.4A 2
≅ 2.2µF
2 • 24V • 240mV
COUT will be selected based on a value large enough to
satisfy the output voltage ripple requirement. For a 50mV
output ripple, the value of the output capacitor can be
calculated from:
COUT >
4.7µH • 2.4A 2
≅ 100µF
2 • 3.3V • 50mV
Note that the while the LTC3637 is in dropout, it can provide
output current that is equal to the peak current of the part.
This can increase the chip power dissipation dramatically
and may cause the internal overtemperature protection
circuitry to trigger at 180°C and shut down the LTC3637.
COUT also needs an ESR that will satisfy the output voltage
ripple requirement. The required ESR can be calculated from:
Design Example
A 100µF ceramic capacitor has significantly less ESR
than 20mΩ.
As a design example, consider using the LTC3637 in an application with the following specifications: typical VIN = 24V,
maximum applied VIN = 80V, VOUT = 3.3V, IOUT = 1A,
f = 200kHz. Furthermore, assume for this example that
switching should start when VIN is greater than 6V and
stop switching when VIN is greater than 48V.
First, calculate the inductor value that gives the required
switching frequency:
3.3V

  3.3V 
L=
• 1–
 ≅ 4.7µH
 200kHz • 2.4A  
24V 
Next, verify that this value meets the LMIN requirement.
For this input voltage and peak current, the minimum
inductor value is:
LMIN =
18
48V • 150ns
• 1.2 ≅ 4µH
2.4A
ESR <
50mV
≅ 20mΩ
2.4A
Since an output voltage of 3.3V is one of the standard
output configurations, the LTC3637 can be configured
by connecting VPRG1 to ground and VPRG2 to the SS pin.
The undervoltage and overvoltage lockout requirements
on VIN can be satisfied with a resistive divider from VIN to
the RUN and OVLO pins (refer to Figure 9). Pick RTOTAL
= 1M = R3 + R4 + R5 to minimize the loading on VIN and
calculate R3, R4 and R5 as follows (standard values):
R5 = 1M•
1.21V
= 24.9k
48V
R4 = 1M•
1.21V
– 24.9k = 174k
6V
R3 = 1M− 24.9k –174k =806k
3637fa
For more information www.linear.com/LTC3637
LTC3637
APPLICATIONS INFORMATION
Note that the VIN falling thresholds for both UVLO and
OVLO will be 10% less than the rising thresholds or 5.4V
and 43V respectively.
The absolute maximum rating on the OVLO pin (6V) is
not violated based on the following:
24.9k
OVLO(MAX) = 80V •
= 2V
(806k +174k+ 24.9k )
VIN
VIN
SW
RUN
VFB
4.7µH
VIN
806k
LTC3637
RUN
2.2µF
174k
24.9k
SW
VFB
SS
VPRG2
OVLO VPRG1
ISET
FBO
GND
D1
R3
R4
LTC3637
OVLO
CIN
RISET
ISET
CISET
R5
VOUT
R1
R2
COUT
CSS
FBO
SS
VPRG2
VPRG1
The ISET pin should be left open in this example to select
maximum peak current (2.4A typical). Figure 11 shows a
complete schematic for this design example.
VIN
24V
L1
VOUT
3.3V
1A
L1
100µF
3637 F11
CIN
COUT
Figure 11. 24V to 3.3V, 1A Regulator at 200kHz
D1
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3637. Check the following in your layout:
1. Large switched currents flow in the power switches
and input capacitor. The loop formed by these components should be as small as possible. A ground plane
is recommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
VFB, and create increased output ripple.
4. Flood all unused area on all layers with copper except
for the area under the inductor. Flooding with copper
will reduce the temperature rise of power components.
You can connect the copper areas to any DC net (VIN,
VOUT, GND, or any other DC rail in your system).
VIAS TO GROUND PLANE
3637 F12
Figure 12. Example PCB Layout
Pin Clearance/Creepage Considerations
The LTC3637 is available in two packages (MSE16 and
DHC) both with identical functionality. However, the 0.2mm
(minimum space) between pins and paddle on the DHC
package may not provide sufficient PC board trace clearance between high and low voltage pins in some higher
voltage applications. In applications where clearance is
required, the MSE16 package should be used. The MSE16
package has removed pins between all the adjacent high
voltage and low voltage pins, providing 0.657mm clearance which will be sufficient for most applications. For
more information, refer to the printed circuit board design
standards described in IPC-2221 (www.ipc.org).
3637fa
For more information www.linear.com/LTC3637
19
LTC3637
TYPICAL APPLICATIONS
L1
10µH
VIN
5V TO 76V
CISET
47pF
SW
VIN
CIN
4.7µF
LTC3637
RUN
VFB
FBO
SS
VPRG1
ISET
VPRG2
COUT
100µF
×2
D1
OUTPUT
VOLTAGE
1V/DIV
CSS
150nF
OVLO
RISET
255k
Soft-Start Waveform
VOUT
5V
1A
GND
3637 F13
3637 F13b
2ms/DIV
CIN: TDK C5750X7R2A-475M
COUT: 2 × MURATA GRM32ER61A107ME20L
D1: DIODES INC. SBR3U100LP
L1: SUMIDA CDRH105R-100
Figure 13. 5V-76V Input to 5V Output, 1A Regulator with Soft-Start
36.5V to 76V Input to 36V Output, 1A Regulator
VIN
36.5V TO 76V
L1
10µH
CIN
2.2µF
VIN
SW
LTC3637
RUN
FBO
D1
R1
200k
VOUT
36V
COUT 1A
10µF
OUTPUT VOLTAGE
1V/DIV
AC-COUPLED
VFB
SS
VPRG1
ISET
OVLO VPRG2
R2
32.4k
SW VOLTAGE
50V/DIV
INDUCTOR CURRENT
2A/DIV
GND
3637 TA02a
VIN = 76V
VOUT = 36V
IOUT = 1A
CIN: TDK CGA6N3X7R2A225M
COUT: TAIYO YUDEN UMK325BJ106MM
D1: DIODES INC. ES2BA-13-F
L1: TDK SLF10145T-100M
20
5µs/DIV
3637 TA02b
3637fa
For more information www.linear.com/LTC3637
LTC3637
TYPICAL APPLICATIONS
4V to 64V Input to –12V Output Positive-to-Negative Regulator
L1
4.7µH
CIN
2.2µF
VIN
SW
D1
LTC3637
RUN
1000
VFB
R1
200k
R2
147k
ISET
SS
FBO VPRG1
OVLO VPRG2
GND
MAXIMUM LOAD CURRENT (mA)
VIN
4V TO 63V
Maximum Load Current vs Input Voltage
CIN: KEMET C1210C225M1RAC
COUT: AVX 1210YC226MAT
D1: AVX SD3220S100S5R0
L1: COOPER BUSSMANN DR7-4R7-R
COUT
22µF
3637 TA03a
VOUT
–12V
VOUT = –12V
800
600
400
200
0
0
10
50
20
30
40
INPUT VOLTAGE (V)
60
3637 TA03b
VIN
I
MAXIMUM LOAD CURRENT ≈
• PEAK
VIN +| VOUT | 2
24.5V to 76V Input to 24V Output with 350mA Input Current Limit
L1
22µH
VIN
CIN
1µF
R3
806k
R4
11.5k
SW
LTC3637
RUN
ISET
FBO
1000
D1
R1
200k
VFB
SS
VPRG1
OVLO
VPRG2
R2
53.6k
GND
VOUT
COUT 24V
10µF
900
MAXIMUM CURRENT (mA)
VIN
24.5V TO 76V
Maximum Input and Load Current vs Input Voltage
3637 TA04a
MAXIMUM
OUTPUT CURRENT
800
700
600
500
MAXIMUM
INPUT CURRENT
400
300
INPUT CURRENT LIMIT ≈ VOUT •
200
100
0
CIN: TAIYO YUDEN HMK325B7105MN
COUT: TDK C3225X7R1H106M
D1: DIODES INC. SBR3U100LP
L1: WÜRTH 7447714220
MAXIMUM LOAD CURRENT ≈
25
35
R4
R3+R4
VIN
R4
•
2 R3+R4
55
45
INPUT VOLTAGE (V)
65
75
3637 TA04b
3637fa
For more information www.linear.com/LTC3637
21
LTC3637
TYPICAL APPLICATIONS
4V to 76V Input to 15V Output* Clamp, 1A High Efficiency Surge Stopper
L1
6.8µH
VIN*
4V TO 76V
VIN
SW
D1
LTC3637
RUN
VFB
FB0
SS
ISET VPRG1
OVLO VPRG2
R1
200k
COUT
22µF
VOUT*
1A
76V INPUT SURGE
VIN
20V/DIV
R2
27.4k
15V OUTPUT CLAMP
VOUT
20V/DIV
GND
COUT: TDK C3225X7R1C226M
D1: VISHAY 10MQ100NPBF
L1: VISAHY IHLP-2525CZ-01
ILOAD = 1A
3637 TA05a
100ms/DIV
3637 TA05b
*WHEN VIN > 15V, LTC3637 SWITCHES AND VOUT IS REGULATED TO 15V;
WHEN VIN ≤ 15V, LTC3637 OPERATES IN DROPOUT AND VOUT FOLLOWS VIN
RUN
2V/DIV
4V to 76V Input to 1.8V SuperCap Charger
L1
6.2µH
D2
VIN
4V TO 76V
VOUT
500mV/DIV
SW
VIN
D1
LTC3637
RUN
VFB
FBO
SS
VPRG1
ISET
OVLO VPRG2
GND
COUT
100µF
×2
CSC
1F
VOUT
1.8V
INDUCTOR
CURRENT
2A/DIV
ZOOM
VIN = 48V
100ms/DIV
RUN
2V/DIV
3637 TA06
COUT: TDK C3225X5R0J107M
CSC: COOPER BUSSMANN M0810-2R5105-R
D1: VISHAY VSSA310S-E3
D2: VISHAY 10MDQ100NPBF
L1: WÜRTH 744 066 0062
VOUT
500mV/DIV
INDUCTOR
CURRENT
2A/DIV
VIN = 48V
200µs/DIV
22
3637 TA05b
3637 TA05c
3637fa
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LTC3637
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
16
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
1.0 BSC
(.039)
BSC
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16 14 121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
1
3 567 8
1.0
(.039)
BSC
0.17 – 0.27
(.007 – .011)
TYP
0.50
NOTE:
(.0197)
1. DIMENSIONS IN MILLIMETER/(INCH)
BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0213 REV D
3637fa
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23
LTC3637
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
5.00 ±0.10
(2 SIDES)
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
9
R = 0.115
TYP
0.40 ±0.10
16
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
0.200 REF
0.75 ±0.05
0.00 – 0.05
8
1
0.25 ±0.05
0.50 BSC
(DHC16) DFN 1103
4.40 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
24
3637fa
For more information www.linear.com/LTC3637
LTC3637
REVISION HISTORY
REV
DATE
DESCRIPTION
A
05/14
Clarify FBO and UVLO pin description
PAGE NUMBER
7
Fix typos on Block Diagram. Clarify SS operation.
8
Clarify FBO operation
10
Clarify Design Example
18
3637fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC3637
25
LTC3637
TYPICAL APPLICATION
5.5V to 76V Input to 5V Output, 1A Step-Down Regulator
CIN
2.2µF
SW
VIN
D1
LTC3637
RUN
VFB
OVLO
SS
VPRG2 VPRG1
ISET
FBO
GND
100
COUT
47µF
VOUT
5V
1A
90
VOUT = 5V
80
EFFICIENCY (%)
VIN
5.5V TO 76V
L1
5.2µH
Efficiency vs Load Current
3637 TA07a
70
60
50
40
30
20
CIN: TDK CGA6N3X7R2A225K
COUT: MURATA GCM32ER70J476KE19L
D1: VISHAY SS2H10
L1: COILCRAFT MSS1038T-522
10
0
0.1
VIN = 12V
VIN = 24V
VIN = 70V
1
10
100
LOAD CURRENT (mA)
1000
3637 TA07b
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC3639
150V, 100mA Synchronous Step-Down Regulator
VIN: 4V to 150V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 1.4µA,
MSOP-16(12)E
LTC3630A
76V, 500mA Synchronous Step-Down DC/DC Converter
VIN: 4V to 76V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3 × 5 DFN-16, MSOP-16(12)E
LTC3642
45V (Transient to 60V) 50mA Synchronous Step-Down
DC/DC Converter
VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3 × 3 DFN-8, MSOP-8
LTC3631
45V (Transient to 60V) 100mA Synchronous Step-Down
DC/DC Converter
VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3 × 3 DFN-8, MSOP-8
LTC3632
50V (Transient to 60V) 20mA Synchronous Step-Down
DC/DC Converter
VIN: 4.5V to 50V, VOUT(MIN) = 0.8V, IQ = 12µA, ISD = 3µA,
3 × 3 DFN-8, MSOP-8
LT®3990
62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down VIN: 4.2V to 62V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD < 1µA,
DC/DC Converter with IQ = 2.5µA
3 × 3 DFN-10, MSOP-16E
LTC3891
Low IQ, 60V Synchronous Step-Down Regulator
26
VIN: 4V to 60V, VOUT(MIN) = 0.8V, IQ = 50µA, ISD = 14µA,
3 × 4 QFN-20, TSSOP-20E
3637fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC3637
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC3637
LT 0514 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2013