IRF IRFP7718PBF Brushed motor drive application Datasheet

StrongIRFET™
IRFP7718PbF
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
HEXFET® Power MOSFET
VDSS
75V
RDS(on) typ.
1.45m
1.80m
D
max
G
S
ID (Silicon Limited)
355A
ID (Package Limited)
195A
D
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant




G
IRFP7718PbF
TO-247
S
Source
Orderable Part Number
IRFP7718PbF
400
6
ID = 100A
Limited By Package
4
TJ = 125°C
2
300
200
100
TJ = 25°C
0
4
8
12
16
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
D
Drain
Standard Pack
Form
Quantity
Tube
25
ID, Drain Current (A)
( )
RDS(on), Drain-to -Source On Resistance m
Package Type
S
TO-247AC
G
Gate
Base part number
D
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20
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFP7718PbF
Absolute Maximium Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting Torque, 6-32 or M3 Screw
Avalanche Characteristics
EAS (Thermally limited)
Single Pulse Avalanche Energy 
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
EAR
Repetitive Avalanche Energy 
Thermal Resistance
Symbol
Parameter
Junction-to-Case 
RJC
Case-to-Sink, Flat Greased Surface
RCS
Junction-to-Ambient 
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Max.
355
250
195
1590
517
3.5
± 20
Typ. Max.
––– –––
42
–––
1.45 1.80
1.60 –––
–––
3.7
–––
1.0
––– 150
––– 100
––– -100
0.9
–––
A
W
W/°C
V
-55 to + 175
°C
300
10 lbf·in (1.1 N·m)
1160
2004
mJ
See Fig 14, 15, 23a, 23b
A
mJ
Typ.
–––
0.24
–––
Min.
75
–––
–––
–––
2.1
–––
–––
–––
–––
–––
Units
Max.
0.29
–––
40
Units
°C/W
Units
Conditions
V
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 2mA 
VGS = 10V, ID = 100A 
m
VGS = 6V, ID = 50A 
V
VDS = VGS, ID = 250µA
VDS =75 V, VGS = 0V
µA
VDS =75V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A.
Note that current limitations arising from heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 233µH, RG = 50, IAS = 100A, VGS =10V.
ISD  100A, di/dt  1279A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 63A, VGS =10V. .
 Pulse drain current is limited at 780A by source bonding technology.
2
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IRFP7718PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
420
–––
–––
–––
–––
–––
–––
Typ.
–––
552
119
168
384
58
164
Max.
–––
830
–––
–––
–––
–––
–––
Units
Conditions
S VDS = 10V, ID =100A
ID = 100A
VDS = 38V
nC
VGS = 10V
td(off)
Turn-Off Delay Time
–––
266
–––
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 160
––– 29550
––– 2270
––– 1395
–––
–––
–––
–––
Coss eff.(ER)
Effective Output Capacitance
(Energy Related)
–––
2010
–––
VGS = 0V, VDS = 0V to 60V
Coss eff.(TR)
Output Capacitance (Time Related)
–––
2560
–––
VGS = 0V, VDS = 0V to 60V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max.
–––
–––
355
–––
–––
1590
VSD
Diode Forward Voltage
–––
–––
1.3
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
–––
–––
8.6
75
80
208
251
4.8
–––
–––
–––
–––
–––
–––
ns
pF
VDD = 38V
ID = 100A
RG= 2.6
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 100KHz, See Fig.7
Diode Characteristics
Symbol
IS
ISM
3
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Units
A
V
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
TJ = 25°C,IS = 100A,VGS = 0V 
V/ns TJ = 175°C,IS =100A,VDS = 75V
TJ = 25°C
VDD = 64V
ns
TJ = 125°C
IF = 100A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
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IRFP7718PbF
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
 60µs PULSE WIDTH
Tj = 25°C
10
BOTTOM
100
4.5V
 60µs PULSE WIDTH
Tj = 25°C
4.5V
1
10
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
100
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
TJ = 175°C
100
10
TJ = 25°C
1
VDS = 25V
 60µs PULSE WIDTH
0.1
2.0
3.0
4.0
5.0
6.0
ID = 100A
VGS = 10V
2.0
1.5
1.0
0.5
7.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
1000000
Fig 6. Normalized On-Resistance vs. Temperature
VGS, Gate-to-Source Voltage (V)
C oss = C ds + C gd
Ciss
10000
Coss
Crss
1000
20 40 60 80 100 120 140 160 180
14
VGS = 0V,
f = 1 MHZ
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
100000
0
TJ , Junction Temperature (°C)
Fig 5. Typical Transfer Characteristics
C, Capacitance (pF)
10
Fig 4. Typical Output Characteristics
1000
ID, Drain-to-Source Current (A)
1
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
ID= 100A
12
VDS= 60V
VDS= 38V
VDS= 15V
10
8
6
4
2
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
1000
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0
100
200
300
400
500
600
700
QG Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFP7718PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
100
TJ = 25°C
10
100µsec
1msec
100
Limited by Package
10
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
1.0
0.0
0.5
1.0
1.5
2.0
0.1
2.5
1
10
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
90
5.0
Id = 2.0mA
4.0
85
Energy (µJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
DC
3.0
2.0
80
1.0
0.0
75
0
-60 -40 -20 0 20 40 60 80 100120140160180
20
30
40
50
60
70
80
VDS, Drain-to-Source Voltage (V)
TJ , Temperature ( °C )
Fig 12. Typical Coss Stored Energy
Fig 11. Drain-to–Source Breakdown Voltage
( )
RDS(on), Drain-to -Source On Resistance m
10
2.2
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
2.0
VGS = 8.0V
VGS = 10V
1.8
1.6
1.4
0
50
100
150
200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFP7718PbF
Thermal Response ( ZthJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C. (Single Pulse)
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse width
EAR , Avalanche Energy (mJ)
1200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
1000
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRFP7718PbF
30
4.0
25
IF = 60A
VR = 64V
20
TJ = 25°C
TJ = 125°C
3.5
3.0
IRRM (A)
VGS(th) Gate threshold Voltage (V)
4.5
ID = 250µA
ID = 1.0mA
2.5
2.0
15
10
ID = 1.0A
5
1.5
1.0
-75 -50 -25
0
25
50
75
0
100 125 150 175
0
200
TJ , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
1000
30
25
IF = 100A
VR = 64V
20
TJ = 25°C
TJ = 125°C
IF = 60A
VR = 64V
800
QRR (nC)
IRRM (A)
400
15
TJ = 25°C
TJ = 125°C
600
400
10
200
5
0
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
1000
IF = 100A
VR = 64V
QRR (nC)
800
TJ = 25°C
TJ = 125°C
600
400
200
0
0
200
400
600
800
1000
diF /dt (A/µs)
7
Fig 21. Typical Stored Charge vs. dif/dt
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IRFP7718PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
0.01
I AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFP7718PbF
TO-247AC Package Outline (Dimensions are shown in millimeters (inches))
TO-247AC Part Marking Information
Notes: This part marking information applies to devices produced after 02/26/2001
EXAMPLE: THIS IS AN IRFPE30
WITH ASSEMBLY
LOT CODE 5657
ASSEMBLED ON WW 35, 2001
IN THE ASSEMBLY LINE "H"
Note: "P" in assembly line position
indicates "Lead-Free"
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFPE30
56
135H
57
ASSEMBLY
LOT CODE
DATE CODE
YEAR 1 = 2001
WEEK 35
LINE H
TO-247AC package is not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFP7718PbF
Qualification Information†
Industrial
Qualification Level
(per JEDEC JESD47F) ††
TO-247AC
Moisture Sensitivity Level
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
02/19/2015
Comments
Updated EAS (L =1mH) = 2004mJ on page 2
Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 63A, VGS =10V” on page 2
IR WORLD HEADQUARTERS: 101N Sepulveda Blvd, El Segundo, California 90245, USA
To contact Interna onal Rec fier, please visit h p://www.irf.com/whoto‐call/
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