Datasheet LED Drivers for LCD Backlights White LED Driver for large LCD Panels (DCDC Converter type) BD9483F,FV ●Features ■ 2ch boost DCDC converter with current mode ■ LED protection circuit (Max duty protection, LED ●General Description BD9483F,FV is a high efficiency driver for white LEDs and designed for large LCDs. This IC is built-in 2ch boost DCDC converters that employ an array of LEDs as the light source. BD9483F,FV has some protect function against fault conditions, such as the over-voltage protection (OVP), the over current limit protection of DCDC (OCP), Max duty protection, LED OCP protection. Therefore BD9483F,FV is available for the fail-safe design over a wide range output voltage. OCP protection) ■ Over-voltage protection (OVP) for the output voltage Vout Adjustable soft start The wide range of analog dimming 0.2V-3.0V 2ch independent PWM dimming input The UVLO detection for the input voltage of the power stage ■ FAIL logic output ■ ■ ■ ■ ●Key Specification Operating power supply voltage range:11.0V to 35.0V Oscillator frequency: 150kHz (RT=100kΩ) Operating Current: 3mA (typ.) Operating temperature range: -40°C to +85°C ●Package SOP-24: Pin Pitch: ●Applications TV, Computer Display, Notebook, LCD Backlighting W(Typ.) D(Typ.) H(Max.) 15.00mm x 7.80mm x 2.01mm 1.27mm ●Typical Application Circuit VOUT2 VOUT1 VCC VIN UVLO VCC OVP REG90 VCC UVLO VREG STB UVLO TSD Figure 2-1. SOP-24 OVP REG90 UVLO REG90 OSC + RT PWM COMP GATE1 CONTROL LOGIC CS1 LEB Current compensation Css SS SSOP-B24: Pin Pitch: PGND1 SS REG90 DIMOUT1 W(Typ.) D(Typ.) H(Max.) 7.80mm x 7.60mm x 1.35mm 0.65mm SS-FB clamper LEDOCP CP Fail detect ERROR amp FAILB + + - Ccp ISENSE1 1.0V FB1 MAXFB PWM1 Each channel PWM2 GATE2 CS2 ADIM 1/3 PGND2 DIMOUT2 ISENSE2 FB2 Figure 2-2. SSOP-B24 Figure 1. Typical Application Circuit ○Product structure：Silicon monolithic integrated circuit .www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product is not designed protection against radioactive rays 1/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●Absolute maximum ratings (Ta=25°C) Parameter Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Symbol Ratings Ta(opr) -40 to +85 Tstg -55 to +150 Unit °C °C Tjmax 150 °C Power Dissipation *1 (SOP24) Pd1 687 mW Power Dissipation *2 (SSOP-B24) Pd2 1024 mW *1 In the case of mounting 1 layer glass epoxy base-plate of 70mm×70mm×1.6mm, 5.5mW is reduced at 1°C above Ta=25℃. *2 In the case of mounting 1 layer glass epoxy base-plate of 70mm×70mm×1.6mm, 8.2mW is reduced at 1°C above Ta=25℃ ●Operating Ratings (Ta = 25°C) Parameter Symbol Range Unit VCC 11.0 to 35.0 V fsw 50 to 800 kHz The effective range of ADIM signal VADIM 0.2 to 3.0 V PWM input frequency FPWM 40 to 50k Hz Power supply voltage DC/DC oscillation frequency The operating conditions written above are constants of the IC unit. Be careful enough when setting the constant in the actual set. ●External Components Recommended Range Item REG90 pin connection capacitance Soft start connection capacitance RT pin connection resistance The assumed capacitance of GATE pin The values described above are constants for a single IC. Symbol Setting Range Unit CREG90 1.0 to10 μF CSS RRT 0.001 to 4.7 15 to 300 μF kΩ CGATE to 1000 pF Adequate attention must be paid to setting of a constant for an actual set of parts ●Pin Configuration ●Physical Dimension Tape and Marking Diagram BD9483F Lot No. Figure 4-1. SOP-24 D9483FV Figure 3. Lot No. Figure 4-2. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/29 SSOP-B24 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●1.1 Electrical Characteristics 1(Unless otherwise specified, Ta=25°C，VCC=24V) Limit Parameter Symbol Unit Min. Typ. Max. Condition 【Total current consumption】 Circuit current Icc － 3 6 mA VSTB=3V Circuit current (stand-by) Ist － 25 50 μA VSTB=0V Operation voltage（VCC） VUVLO_VCC 6.0 7.0 8.0 V VCC=SWEEP UP Hysteresis Voltage（VCC） VUHYS_VCC 150 300 600 mV VCC=SWEEP DOWN UVLO release voltage VUVLO 2.91 3.00 3.09 V VUVLO=SWEEP UP UVLO hysteresis voltage VUHYS 150 200 250 mV VUVLO=SWEEP DOWN UVLO_LK -2 0 2 μA VUVLO=4V ISENSE threshold voltage 1 VLED1 0.225 0.233 0.242 V VADIM=0.7V ISENSE threshold voltage 2 VLED2 0.988 1.000 1.012 V VADIM=3.0V ISENSE threshold voltage 3 VLED3 0.989 1.015 1.040 V VADIM=3.3V FCT 142.5 150 157. 5 KHz RT=100kohm NMAX_DUTY 90 95 99 % RT=100kohm RONSO 2.0 4.0 8.0 Ω ION=-10mA RONSI 1.2 2.5 5.0 Ω ION=10mA SS pin source current ISSSO -3.75 -3.0 -2.25 μA VSS=2V SS pin ON resistance RSS_L - 3.0 5.0 kΩ VSTB=0V, Ioss=50uA VSS_END 3.6 4.0 4.4 V FB source current IFBSO -115 -100 -85 μA FB sink current IFBSI 85 100 115 μA SS=SWEEP UP VISENSE=0.2V, VADIM=3.0V, VFB=1.0V VISENSE=2.0V, VADIM=3.0V, VFB=1.0V OCP detect voltage VCS 360 400 440 mV CS=SWEEP UP VOVP 2.88 3.00 3.12 V VOVP_HYS 50 100 150 mV VOVP SWEEP DOWN OVP_LK -2 0 2 μA VOVP=4V 【UVLO block】 UVLO pin leak current 【DC/DC block】 Oscillation frequency GATE pin MAX DUTY output GATE pin ON resistance (as source) GATE pin ON resistance (as sink) Soft start ended voltage 【DC/DC protection block】 OVP detect voltage OVP detect hysteresis OVP pin leak current www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/29 VOVP SWEEP UP TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●1.2 Electrical Characteristics 2(Unless otherwise specified, Ta=25°C，VCC=24V) Limit Parameter Symbol Unit Min. Typ. Max. Condition 【LED protection block】 LED OCP detect voltage VLEDOCP 2.88 3.0 3.12 V VISENSE=SWEEP UP MAX duty detect voltage VFBMAX 3.84 4.0 4.16 V VFB=SWEEP UP ILADIM -2 0 2 μA VADIM=2.0V IL_ISENSE -2 0 2 μA VISENSE=4V DIMOUT source on-resistance RONSO 4.0 8.0 16.0 Ω ION=-10mA DIMOUT sink on-resistance RONSI 2.5 5.0 10.0 Ω ION=10mA REG90 output voltage VREG90 8.91 9.00 9.09 V IO=0mA,VCC>11V REG90 available current |IREG90| 15 - - mA REG90_TH 5.4 6.0 6.6 V REG90_UVLO hysteresis REG90_HYS 250 500 750 mV REG90 discharge resistance REG90_DIS 325 500 675 kΩ STB pin HIGH voltage STBH 2.0 - 35 V VSTB=SWEEP UP STB pin LOW voltage STBL -0.3 - 0.8 V VSTB=SWEEP DOWN STB pull down resistor ISTB 600 1000 1400 kΩ VSTB=3.0V PWMx pin HIGH Voltage PWM_H 2.0 - 5.5 V VPWMｘ=SWEEP UP PWMx pin LOW Voltage PWM_L -0.3 - 0.8 V VPWMｘ=SWEEP DOWN PWMx pin Pull Down resistance RPWM 600 1000 1400 kΩ VPWMｘ=3.0V FAILB pin on-resistance RFAIL 250 500 1000 Ω VFAIL=1.0V FAILB pin leak current ILFAIL -2 0 2 μA VFAIL=15V CP detect voltage VCP 2.85 3.0 3.15 V VCP=SWEEP UP CP charge current ICP 2.7 3.0 3.3 μA 【Dimming block】 ADIM pin leak current ISENSE pin leak current 【REG90 block】 REG90_UVLO detect voltage REG90=SWEEP DOWN VSTB=H->L, REG90=SWEEP UP VSTB=H->L, REG90=9.0V 【STB block】 【PWM block】 【FAIL block (OPEN DRAIN)】 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●1.3 Pin Descriptions In/Out Rating [V] Pin No Pin Name Function 1 VCC - Power supply pin -0.3 to 36 2 STB In IC ON/OFF pin -0.3 to 36 3 CS1 In DC/DC output current detect pin for ch1,OCP input pin for ch1 -0.3 to 7 4 GATE1 Out DC/DC switching output pin for ch1 -0.3 to 14 5 GND1 - 6 DIMOUT1 Out 7 ISENSE1 In 8 FB1 Out 9 ADIM 10 11 12 Ground for ch1 - Dimming signal output for NMOS for ch1 -0.3 to 14 Current detection input pin for ch1 -0.3 to 7 Error amplifier output pin for ch1 -0.3 to 7 In ADIM signal input-output pin -0.3 to 20 PWM1 In External PWM dimming signal input pin ch1 -0.3 to 20 PWM2 In External PWM dimming signal input pin ch2 -0.3 to 20 FAILB Out Abnormality detection output pin 13 RT Out For DC/DC switching frequency setting pin -0.3 to 36 -0.3 to 7 14 OVP In Over voltage protection detection pin -0.3 to 20 15 SS Out Slow start setting pin -0.3 to 7 16 CP Out Charge timer for abnormal state. -0.3 to 7 17 UVLO In Under voltage lock out detection pin -0.3 to 20 18 FB2 Out Error amplifier output pin for ch2 -0.3 to 7 19 ISENSE2 In Current detection input pin for ch2 -0.3 to 7 20 DIMOUT2 Out Dimming signal output for NMOS for ch2 -0.3 to 14 21 GND2 - 22 GATE2 Out 23 CS2 In 24 REG90 ●1.4.1 Pin ESD Type1 OVP 100k Out - Ground for ch2 DC/DC switching output pin for ch2 -0.3 to 14 DC/DC output current detect pin for ch2,OCP input pin for ch2 -0.3 to 7 9.0V output voltage -0.3 to 14 UVLO OVP 50k 5V SS UVLO 5V RT PWM1 / PWM2 PWMx 100k 5V ADIM 1M Figure 5. Pin ESD Type www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●1.4.2 Pin ESD Type2 DIMOUT1 / DIMOUT2 / REG90 GATE1 / GATE2 / REG90 / CS1 / CS2 STB REG90 REG90 GATEx DIMOUTx 100k 100k VCC VCC GNDx GNDx CSx ISENSE1 / ISENSE2 FB1 / FB2 CP ISENSEx 20k CP 3k FBx 5V FAILB Figure 6. Pin ESD Type www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 6/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV 5 100 4 10 fCT [MHz] Icc [mA] ●1.5 Typical Performance Curves (Reference data) 3 2 STB=5V PWM1=PWM2=0V Ta=25°C 1 14 18 22 26 VCC [V] 30 1 0.1 0.01 0 10 VCC=24V Ta=25°C 0.001 34 10 100 RT [kohm] Figure 8. fCT v.s. RT 160 0 140 -20 FB source current [ uA] FB sink current [uA] Figure 7. Circuit current (operating mode) 120 100 80 60 VCC=24V Ta=25°C 40 20 1000 0 VCC=24V Ta=25°C -40 -60 -80 -100 -120 -140 -160 0.5 1.5 2.5 FB [V] 3.5 0.5 Figure 9. FB sink current v.s. FB voltage 1.5 2.5 FB [V] 3.5 Figure 10. FB source current v.s. FB voltage 1.4 1.2 ISE NSE [V] 1.0 0.8 0.6 0.4 VCC=24V Ta=25°C 0.2 0.0 0 1 2 ADIM [V] 3 Figure 11. ISENSE feedback voltage v.s. ADIM www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 7/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●2 Block Diagram VOUT2 VOUT1 VCC VIN UVLO VCC OVP REG90 VCC UVLO VREG STB UVLO OVP TSD REG90 UVLO REG90 OSC + RT PWM COMP GATE1 CONTROL LOGIC CS1 LEB Current compensation Css SS PGND1 SS REG90 DIMOUT1 SS-FB clamper LEDOCP CP Fail detect ERROR amp FAILB + + - Ccp ISENSE1 1.0V FB1 MAXFB PWM1 Each channel PWM2 GATE2 CS2 ADIM PGND2 1/3 DIMOUT2 ISENSE2 FB2 Figure 12. Block Diagram www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 8/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.1 Pin Function VCC （1 PIN） Power supply pin of IC. Input range is from 11V to 35.0V. The operation starts more than 7.0V(typ.) and shuts down less than 6.7V(typ.) by VCCUVLO. In the lower VCC than 7.6V(typ.), IC stops switching by REG90UVLO, which detect the lower voltage of VCC earlier than VCCUVLO. STB （2 PIN） STB can be used to perform the reset of latch off or soft start. The power control of REG90 is depend on STB pin and the VCCUVLO. Regarding of the sequence of turning on, after the positive edge of PWM is input, BD9483F,FV starts the boost operation and the soft start. The input voltage of STB pin toggles the IC state(IC ON/OFF). Please avoid the use of the intermediate level (from 0.8V to 2.0V). CS1 （3 PIN）, CS2 (23 PIN) The CS pin has two functions. 1. DC / DC current mode Feedback terminal The inductor current is converted to the CS pin voltage by the sense resistor RCS and this CS pin voltage controls the gate duty. VIN 2. Inductor current limit (OCP) terminal The CS terminal also has an over current protection (OCP), if it voltage is more than 0.4V, the switching operation will be stopped compulsorily. And the next GATE boost pulse will be restart in normal frequency. If the capacitance Cs in the right Figure is increased to a micro orders, please be CS careful that the limited value of NMOS drain current Id is much than the simple Cs Rcs calculation. Because the current Id flow not only Rcs but also Cs, as the CS pin Figure 13. voltage move according to Id. GND Both of above functions are enable after 300ns (typ.) when GATE pin asserts high, because the leading Edge Blanking function is included into this IC to prevent the noise affection. Please refer to the section “●3.5.1 how to set OCP / the calculation method for the current rating of DCDC parts”, for detail explanation. GATE1 （4 PIN）, GATE2 (22 PIN) This is the output terminal for driving the gate of the boost MOSFET. The high level is REG90 of IC. Frequency can be set by the resistor connected to RT. Please refer to the <RT> pin description for the frequency setting. In the condition of approximately VCC<9.8V, the high level of the GATE pin is about VCC-0.8V, which lower than 9.0V. The phase lag of GATE1 and GATE2 is shown in Figure below. This Figure illustrates the waveform as both GATE pin output the maximum duty. The inrush current of the VIN terminal can be suppressed because each channel turns on alternately. Figure 14. GND1 （5 PIN）, GND2 (21 PIN) GND pin of IC. GND1 is the ground pin of channel 1. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 9/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV DIMOUT1 （6 PIN）, DIMOUT2 (20 PIN) This is the output pin for external NMOS of dimming. The below table shows the rough output logic of each operation state, and the output H level is REG90. DIMOUT1 and DIMOUT2 are the output corresponding to PWM1 and PWM2. Please refer to the time chart in the section 3.7 for detail explanations, because The DIMOUT logic has the exceptional behavior. Please insert the resistance between the dimming MOS gate to improve the over shoot of LED current, as PWM turns from low to high. Status DIMOUT1 output DIMOUT2 output Normal PWM1 PWM2 Abnormal Low Level Low Level Vout REG90 DIMOUT RDIM ISENSE BD9483 Figure 15. FB1 （8 PIN）, FB2 (18 PIN) This is the output terminal of error amplifier. The input pin of error amplifier is ISENSE and ADIM. After the completion of the soft start, this pin outputs high impedance as the corresponding PWM pin asserts low. FB voltage is hold to the external capacitance. ○FBMAX Protection Function More than FB = 4.0V (typ.), the error state for the GATE pin duty will be detected, and the CP charge is started. If the CP charge continues to 3.0V, IC will be latched off. Please refer to the time chart 3.7.5 (The loop compensation setting is described in the section " ●3.6 loop compensation".) Vout DIMOUT Error AMP + + - ISENSE1 （7 PIN）, ISENSE2 (19 PIN) This is the input terminal for the current detection. The error amplifier compares the ISENSE and the 1/3 of ADIM pin voltage. And the clamped level of ISENSE feedback is 1.0V. ○LED OCP Protection Function More than ISENSE = 3.0V (typ.), the over current of LED (LEDOCP) will be detected. The GATE pulse will be stopped, the DIMOUT is forced to output high level to monitor the error state. If the detection continues to 4 count of GATE frequency, IC will be latched off. (Please refer to the time chart 3.7.6) ISENSE 1.00V FB Figure 16. ADIM （9 PIN） The input pin for analog dimming signal. The ISENSE feedback point is set as 1/3 of this pin bias. If more than 3.0V is input, ISENSE threshold is clamped as the below diagram. Figure 17. PWM1 （10 PIN）, PWM2 （11 PIN） The ON / OFF input of the LED light. PWM1 and PWM2 controls each LED strings individually. The Duty signal of this pin can control the PWM dimming. The high / low level of PWM pins are following. State PWM input voltage PWMx=H PWMx=2.0V to 5.5V PWMx=L PWMx=-0.3V to 0.8V FAILB （12 PIN） FAIL signal output pin (open drain). As abnormal, the internal NMOS turn on. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 10/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV Status FAILB output Normal OPEN Abnormal GND Level RT （13 PIN） DC/DC switching frequency setting pin. RT set the oscillation frequency inside IC. ○The relationship between the frequency and RT resistance value (ideal) R RT 15000 f SW [kHz] [kΩ ] The oscillation setting range from 50kHz to 800kHz. The setting examples is separately described in the section ” ●3.4.4 how to set DCDC oscillation frequency” OVP （14 PIN） The OVP terminal is the input for over-voltage protection. As OVP is more than 3.0V, the over-voltage protection (OVP) will work. At the moment of these detections, the BD9483F,FV stops the switching of the output GATE and starts to count up the abnormal interval, but IC doesn't reach latch off state instantaneously until the detection continues up to 4 counts of GATE terminals. (Please refer to the time chart 3.7.4) As the latch off by OVP, both channels stop. (GATE1=GATE2=L, DIMOUT1=DIMOUT2=L) The OVP pin is high impedance, because the internal resistance to a certain bias is not connected. So, the bias by the external components is required, even if OVP function is not used, because the open connection of this pin is not fixed the potential. The setting examples is separately described in the section ”●3.4.6 how to set OVP” SS （15 PIN） The pin which sets soft start interval of DC/DC converter. It performs the constant current charge of 3.0 μA to external capacitance Css(0.001μF to 4.7μF). The switching duty of GATE output will be limited during 0V to 4.0V of the SS voltage. So the equality of the soft start interval can be expressed as following 6 Tss = 1.33*10 *Css Css: the external capacitance of the SS pin. Regarding of the logic of SS=L (SS=L) = (PWM1orPWM2 have not asserted H since ResetB=L->H) or (latch off state) where ResetB = (STB=H) and (VCCUVLO=H) and (REG90UVLO=H) Please refer to the time chart 3.7.3 on soft start behavior CP （16 PIN） Timer pin for counting the abnormal state of the FBMAX protection. If the abnormal state is detected, The CP pin start charging by 3μA to the external capacitance. As the CP voltage reaches to 3.0V, IC will be latched off. In latch off both channels will be stopped (GATE1=GATE2=L, DIMOUT1=DIMOUT2=L). Please refer to the section “●3.4.7 how to set the interval until latch off (CP pin)” for more detail. UVLO （17 PIN） Under voltage lock out pin for the input voltage of the power stage. More than 3.0V(typ.), IC starts the boost operation and stops lower than 2.8V(typ.). The UVLO pin is high impedance, because the internal resistance to a certain bias is not connected. So, the bias by the external components is required, even if UVLO function is not used, because the open connection of this pin is not fixed the potential. As the latch off by UVLO, both channels stop. (GATE1=GATE2=L, DIMOUT1=DIMOUT2=L) The setting examples is separately described in the section ”●3.4.5 how to set UVLO” REG90 （24 PIN） This is the 9.0V (typ.) output pin that is used for the power supply of DIMOUT, GATE. Available current is 15mA (min.). When VCC<11V , REG90 output voltage decreases because of the saturation. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 11/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.2 The detection condition list of the protection (TYP. Condition) Detect condition Detection pin pin condition Release condition Timer operation Protection type PWM SS FBMAX FB FB > 4.0V H(8clk) SS>4.0V FB < 4.0V CP charge Latch off LED OCP ISENSE ISENSE > 3.0V - - ISENSE < 3.0V 4clk Latch off UVLO UVLO UVLO<2.8V - - UVLO>3.0V NO Auto recovery REG90UVLO REG90 REG90<6.0V - - REG90>6.5V NO Auto recovery VCC UVLO VCC VCC<6.7V - - VCC>7.0V NO Auto recovery OVP OVP OVP>3.0V - - OVP<2.9V 4clk Latch off OCP CS CS>0.4V - - - NO Pulse by Pulse Protection To reset the latch type protection, please input of STB logic to ‘L’ once. Otherwise the detection of VCCUVLO, REG90UVLO is required. In the latch off mode, both channels will be stopped. (GATE1=GATE2=L, DIMOUT1=DIMOUT2=L) The clock number of timer operation is the correspond to the boost pulse clock. ●3.3 The behavior list of the protection The operation of the protection Protect Function DC/DC Gate output Dimming transistor (DIMOUT) logic SS pin FAILB pin (NORMAL=open) FBMAX Stops after latch L after latch discharge after latch L after latch LED OCP Stops immediately H immediately, L after latch discharge after latch L after latch STB Stops immediately L after REG90UVLO detects discharge immediately OPEN UVLO Stops immediately immediately L discharge immediately Low REG90UVLO Stops immediately immediately L discharge immediately OPEN VCC UVLO Stops immediately immediately L discharge immediately Low OVP Stops immediately immediately L discharge after latch L after latch OCP Stops immediately Normal operation Not discharge OPEN Please refer to the timing chart for the detail. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.4 External components selection ●3.4.1 The start up operation and the setting of Soft Start external capacitance The below explanations are the start up sequency of BD9483F,FV. ① OSC SS SLOPE SS N DRIVER SS-FB Circuit PWM GATE ② OSC 0.7V DIMOUT LED_OK VOUT LED_OK COMP Css SS=0.4V FB ③ PWM=L:STOP ILED VOUT 5V ILED SS FB 3uA STB ④ ISENSE PWM ⑤ ⑥ Figure 19. ○The explanation of start up sequency ①The internal bias voltage of REG90 turns on by VCCUVLO. And as STB is H, the reset signal is released. ②With the first PWM=H, BD9483F,FV enables to output the boost pulse, and the SS start to charge to the external capacitance. At this moment, the voltage of FB will be clamped to SS+0.7V voltage regardless of the PWM logic. ③The boost of VOUT (GATE pulse) is started as SS=0.4V(typ), because the internal ramp reaches the bottom voltage of saw-toothed wave and the DC/DC start to output the pulse signal. ④VOUT is boosted to a certain level, and the LED current is rising. ⑤When the LED current reached to a certain level, FB is removed from SS+0.7V internally. And the start up operation completed. By this SS-FB clamped circuit, turning on can be completed quickly in spite of small PWM duty. ⑥IC start the normal operation by sensing the voltage of ISENSE pin. FBMAX detection starts monitoring. ○The setting method of SS external capacitance As above described, SS continues to be charged in spite of PWM logic or VOUT level, and FB level is clamped by SS+0.7V. TFB is defined as the time for the SS voltage to reach to the FB feedback voltage. When the FB voltage during LED turns on is expressed VFB, the equality on TFB is the following. TFB Css [F] VFB[V] [Sec] 3[A] ●3.4.2 Shutdown method and the setting of REG90 capacitance When this IC shuts down, VOUT discharge function works. Indicate the sequence. Figure 21. Figure 20. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 13/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ○Sequence explanation of shut down 1. When ENA=L, DCDC and REG90 is stopped. 2. While ENA=L and REG90UVLO=H, DIMOUT asserts the same logic of PWM. And VOUT is discharged until REG90=9.0V is reached to 6.0V by 500kΩ. 3. VOUT is enough discharged by ILED, ILED don’t get to flow. 4. REG90 voltage is reached under 6.0V(typ.), whole system is shutdown. ○Setting method of REG90 capacitance Shutdown time TOFF is decided by the following equation. TOFF [sec] C REG [F] R REG [] In REG90 t 0 [V] 9.0[V] C REG [F] 500[k] in 20.2 10 5 C REG [sec] REG90 UVLO [V] 6.0[ V ] When discharge function is used, PWM signal must be continued to input after ENA=L. VOUT discharge time is longest when PWM is set on mininum DUTY. Please set CREG capacitance value with margin so that the system is shutdown after VOUT is enough discharged. ●3.4.3 The LED current setting LED current can be adjusted by setting the resistance RISENSE which connects to ISENSE pin. ○the relationship between RISENSE and ILED current R ISENSE Without DC dimming (ADIM>3.0V) R ISENSE ADIM[V]/3 [ ] I LED [A] DIMOUT 1.0[V] [ ] I LED [A] Error AMP + + - With DC dimming (ADIM<3.0V) Vout [setting example] If ILED current is 400mA as ADIM is 3.0V, we can calculate RISENSE as below. R ISENSE ISENSE 1.0V RISENSE FB ISENSE[V] ADIM / 3[V] 3.0 / 3[V] 2.5[ ] I LED [A] I LED [A] 0.4[A] ●3.4.4 how to set DCDC oscillation frequency RRT which connects to RT pin set the oscillation frequency of DCDC. Figure 22. ○ the relationship between OSC and RRT (ideal) R RT 15000 f SW [kHz] [k ] where fsw is the oscillation frequency of DCDC [kHz] Frequency (fsw) Ideal GATE CS RT Rcs RRT GND Figure 23. Figure 24. This equation is an ideal equation in which correction factors are not applied. The adequate verification with an actual set needs to be performed to set frequency precisely. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV [setting example] If DCDC oscillation frequency is 200kHz, we can calculate the RRT as below. R RT 15000 15000 75 [k] f sw [kHz] 200[kHz] ●3.4.5 how to set UVLO Under voltage lock out pin for the input voltage of the power stage. More than 3.0V(typ.), IC starts boost operation and stops lower than 2.8V(typ.). The UVLO pin is high impedance, because the internal resistance to a certain bias is not connected. So, the bias by the external components is required, even if UVLO function is not used, because the open connection of this pin is not fixed the potential. The resistor value can be calculated by the below formula. ○UVLO detection equality As VIN is decreases, R1, R2 value is expressed the following formula by the VINdet, the detect voltage of UVLO. R1 R2[k] VIN (VINDET [V] 2.8[V]) [k] 2.8[V] ○UVLO release equality By using the R1, R2 in the above equality, the release voltage of UVLO can be expressed as following. VINCAN 3.0V (R1[k] R2[k]) R2[k] ON/ OFF UVLO + - 2.8V/3.0V R1 R2 CUVLO [V] Figure 25. [setting example] If the normal input voltage, VIN is 24V, the detect voltage of UVLO is 18V, R2 is 30k ohm, R1 is calculated as following. R1 R2[k] (VINDET[V] 2.8[V]) (18[V] 2.8[V]) 30[k] 162.9[k] 2.8[V] 2.8[V] By using these R1, R2, the release voltage of UVLO, VINcan can be calculated too as following. VINCAN 3.0[V] R1[k] R2[k] 162.9[k] 30[k] 3.0[V] [V] 19.29[V] R2[k] 30[k] ●3.4.6 how to set OVP The OVP terminal is the input for over-voltage protection of output voltage. The OVP pin is high impedance, because the internal resistance to a certain bias is not connected. So, the bias by the external components is required, even if OVP function is not used, because the open connection of this pin is not fixed the potential. The resistor value can be calculated by the below formula. VOUT OVP R1 - ○OVP detection equality If the VOUT is boosted abnormally, VOVPdet is the detect voltage of OVP, R1, R2 can be expressed by the following formula. R1 R2[k] (VOVPDET [V] 3.0[V]) [k] 3.0[V] OVP + 2.9V/3.0V R2 COVP Figure 26. ○OVP release equality By using the R1, R2 in the above equality, the release voltage of OVP, VOVPcan can be expressed as following. VOVPCAN 2.9V (R1[k] R2[k]) R2[k] www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 [V] 15/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV [setting example] If the normal output voltage, VOUT is 40V, the detect voltage of OVP is 48V, R2 is 10k ohm, R1 is calculated as following. R1 R2[k] (VOVPDET [V] 3.0[V]) (48[V] 3[V]) 10[k] 150 [k] 3.0[V] 3[V] By using these R1, R2, the release voltage of OVP, VOVPcan can be calculated as following. VOVPCAN 2.9[V] (R1[k] R2[k]) 10[k] 150[k] 2.9[V] [V] 46.4 [V] R2[k] 10[k] ●3.4.7 how to set the interval until latch off (CP pin) BD9483F,FV starts the counting up (charging CP pin) by the detection of FBMAX abnormal state, and BD9483F,FV falls to the latch off state when the following interval has passed. Only PWM=L input does not reset the timer counter, as the abnormal state continues. LATCHTIME = 1.0 * 106 * Ccp [sec] Where LATCHTIME is the interval until latch off state CCP is the external capacitor of CP pin. [setting example] If the capacitor of CP pin is 0.47uF, the timer latch interval is as following. LATCHTIME = 1.0 * 106 * Ccp [sec] = 1.0 * 106 * 0.47 * 10-6 [sec] = 470 [msec] (the calculation method of the coil peak current, Ipeak) At first, since the ripple voltage at CS pin depend on the application condition of DCDC, those put onto the equality to calculate as following. The output voltage = VOUT [V] LED total current = IOUT [A] The DCDC input voltage of the power stage = VIN [V] The efficiency of DCDC =η[%] And then, the averaged input current IIN is calculated by the following equality VOUT [V] I OUT [A] [A] VIN [V] η[%] And the ripple current of the inductor L (ΔIL[A]) can be calculated by using DCDC the switching frequency, fsw, as following. ΔIL (VOUT [V] VIN [V]) VIN [V] L[H] VOUT [V] f SW [Hz] IL fsw GATE CS Rcs GND Figure 27. (V) （A) (t) [A ] Ipeak ΔIL IIN ΔIL[A] 2 [A] … (1) (t) （V) 0.4V VCS[V] Therefore, the bottom of the ripple current Imin is Imin I IN [A] Imin IL[A] On the other hand, the peak current of the inductor Ipeak can be expressed as the following equality. Ipeak I IN [A] ΔIL[A] or 0 2 VCSpeak As Imin>0, that operation mode is CCM (Continuous Current Mode), otherwise another mode is DCM (Discontinuous Current Mode). Figure 28. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VOUT N[V] I IN L IOUT ●3.5 DCDC parts selection ●3.5.1 how to set OCP / the calculation method for the current rating of DCDC parts BD9483F,FV stops the switching by the OCP detect, when the CS pin voltage is more than 0.4V. The resistor value of CS pin, RCS need to be considered by the coil L current. And the current rating of DCDC external parts is required more VIN than the peak current of the coil. It is shown below that the calculation method of the coil peak current, the selection method of Rcs (the resistor value of CS pin) and the current rating of the external DCDC parts. 16/29 (t) TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV (the selection method of Rcs) Ipeak flows into Rcs and that cause the voltage signal to CS pin. (Please refer the right timing chart) That peak voltage VCSpeak is as following. VCS peak Rcs Ipeak [V] As this VCSpeak reaches to 0.4V, the DCDC output stops the switching. Therefore, Rcs value is necessary to meet the under condition. Rcs Ipeak[V] 0.4[V] (the current rating of the external DCDC parts) The peak current as the CS voltage reaches to OCP level (0.4V) is defined as Ipeak_det. I peak_det 0.4[V] Rcs[ ] [A] … (2) The relation among Ipeak (equality (1)), Ipeak_det (equality (2)) and the current rating of parts is required to meet the following I peak I peak _ det The current rating of parts Please make the selection of the external parts to meet the above condition such as FET, Inductor, diode. [setting example] The output voltage = VOUT [V] = 40V LED total current = IOUT [A] = 0.48V The DCDC input voltage of the power stage = VIN [V] = 24V The efficiency of DCDC =η[%] = 90% The averaged input current IIN is calculated as the following. I IN [A] VOUT [V] I OUT [A] 40[V] 0.48[A] 0.89 [A] VIN [V] η[%] 24[V] 90[%] And the ripple current of the inductor L (ΔIL[A]) can be calculated if the switching frequency, fsw = 200kHz, the inductor, L=100μH. ΔIL (VOUT [V] VIN [V]) VIN [V] (40[V] 24[V]) 24[V] 0.48 L[H] VOUT [V] f SW [Hz] 100 10 6 [H] 40[V] 200 10 3 [Hz] [A] Therefore the inductor peak current, Ipeak is Ipeak I IN [A] ΔIL[A] 0.48[A] 0.89[A] 1.13[A] 2 2 …The calculation result of the peak current If Rcs is assume to be 0.3 ohm VCS peak Rcs Ipeak 0.3[ ] 1.13[A] 0.339[V] 0.4V …The Rcs value confirmation The above condition is met. And Ipeak_det, the current OCP works is I peak_det 0.4[V] 1.33[A] 0.3[ ] If the current rating of the used parts is 2A, I peak I peak _ det The current rating 1.13[ A] 1.33[ A] 2.0[ A] … The current rating confirmation of DCDC parts This inequality meets the above relationship. The parts selection is proper. And Imin, the bottom of the IL ripple current can be calculated as following. I MIN I IN [A] www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 ΔIL[A] [A] 1.13[A] 0.48[A] 0.65[A] 0 2 17/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV This inequality implies the operation is the continuous current mode. ●3.5.2 Inductor selection The inductor value affects the input ripple current. ΔIL ΔIL I IN VIN (VOUT [V] VIN [V]) VIN [V] L[H] VOUT [V] f SW [Hz] VOUT [V] I OUT [A] [A] VIN [V] η[%] Ipeak I IN [A] IL L VOUT RCS [A] ΔIL[A] 2 [A] Where L: the coil inductance [H] Vout: the DCDC output voltage [V] Vin: the input voltage [V] Iout: the output load current (the summation of LED current) [A] Iin: the input current [A] Fsw: the oscillation frequency [Hz] COUT Figure 29. * The current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, results in decreasing in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not exceed the rated current value of the inductor. * To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be selected ●3.5.3 Output capacitance Cout selection Output capacitor needs to be selected in consideration of equivalent series VIN resistance required to even the stable area of output voltage or ripple voltage. Be aware that set LED current may not be flown due to decrease in LED IL terminal voltage if output ripple component is high. Output ripple voltage VOUT is determined by Equation (4): L VOUT RESR RCS ΔVOUT ILMAX R ESR 1 C OUT I OUT 1 η f SW [V] ・・・・・ (4) where, RESR is the equivalent series resistance of Cout. COUT Figure 30. * Rating of capacitor needs to be selected to have adequate margin against output voltage. * To use an electrolytic capacitor, adequate margin against allowable current is also necessary. Be aware that the LED current is larger than the set value transitionally in case that LED is provided with PWM dimming especially. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 18/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.5.4 MOSFET selection Though there is no problem if the absolute maximum rating is larger than the rated current of the inductor L, or is larger than the sum of the tolerance voltage of COUT and the rectifying diode VF. The product with small gate capacitance (injected charge) needs to be selected to achieve high-speed switching. * One with over current protection setting or higher is recommended. * The selection of one with small on resistance results in high efficiency. ●3.5.5 Rectifying diode selection A schottky barrier diode which has current ability higher than the rated current of L, the reverse voltage larger than the tolerance voltage of COUT, and the low forward voltage VF especially needs to be selected. ●3.6 Loop compensation A current mode DCDC converter has each one pole (phase lag) fp due to CR filter composed of the output capacitor and the output resistance (= LED current) and zero (phase lead) fZ by the output capacitor and the ESR of the capacitor. Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) fZRHP which is unique with the boost converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the cross-over frequency fc set as following, is suggested. fc = fZRHP /5 (fZRHP: RHP zero frequency) Considering the response speed, the below calculated constant is not always optimized completely. It needs to be adequately verified with an actual device. VIN VOUT ILED L VOUT - FB gm RESR RCS + Figure 32. The output voltage block The error amp block Calculate the pole frequency fp and the RHP zero frequency fZRHP of DC/DC converter fp I LED 2π VOUT COUT Calculate the phase compensation of the error amp output (fc = fZRHP/5) R FB1 Where iii. VOUT (1 D) 2 [Hz] 2π L I LED VIN V (Continuous Current Mode) D OUT VOUT f ZRHP [Hz] Where ILED = the summation of LED current, ii. CFB2 CFB1 Figure 31. i. RFB1 COUT f RHZP R CS I LED [Ω] 5 f p gm VOUT (1 D) C FB1 1 2π R FB1 f p [F] gm 4.0 10 4 [ S ] Calculate zero to compensate ESR (RESR) of COUT (electrolytic capacitor) C FB2 R ESR C OUT R FB1 [F] *When a ceramic capacitor (with RESR of the order of milliohm) is used to COUT, the operation is stabilized by insertion of CFB2. To improve the transient response, RFB1 need to be increase, CFB1 need to be decrease. It needs to be adequately verified with an actual device in consideration of vary from parts to parts since phase margin is decreased. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 19/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7 Timing chart ●3.7.1 starting up 1 (STB inputs and PWM signal succeeds) Figure 33. (*1)…REG90 starts up when VCC is more than 7.0V and STB=H. (*2)…When REG90 is more than 6.5V, the reset signal is released. The pin SS is not charged in the state that the PWM signal is not input, the boost is not started. (*3)…The charge of the pin SS starts by the positive edge of PWM1orPWM2=L to H, and the soft start starts. The GATEx pulse outputs only during the corresponding PWMx=H. And as the SS is less than 0.4V(typ), the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level. Please refer to the section “●3.1 Pin Function/SS”. (*4)…The soft start interval will end if the voltage of the pin SS, Vss reaches to 4.0V. By this time, BD9483F,FV boost Vout to the voltage where the set LED current flows. It is started to monitor the abnormal detection of FBMAX. (*5)…As STB=L, instantaneously the boost operation is stopped. (GATEx=L, SS=L) (*6)…As STB=H again, the boost operation restarts by the next PWM=H. It is the same operation as the timing of (*2). www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 20/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7.2 starting up 2 (PWM signal inputs and STB succeeds) 7.0V VCC STB PWM1 orPWM2 6.5V REG90 4.0V 0.4V SS 0.4V GATEx FAILB H OFF SS (*1) (*2) NORMAL (*3) STANDBY (*4) SS (*5) Figure 34. (*1)…REG90 starts up when STB=H. (*2)…When REG90 is more than 6.5V, the reset signal is released. In the first PWM=H the soft-start begins the changing immediately. The GATEx pulse outputs only during the corresponding PWMx=H. And as the SS is less than 0.4V(typ), the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level. (*3)…The soft start interval will end if the voltage of the pin SS, Vss reaches to 4.0V. By this time, BD9483F,FV boost Vout to the point where the set LED current flows. It is started to monitor the abnormal detection of FBMAX. (*4)…As STB=L, instantaneously the boost operation is stopped. (GATE=L, SS=L) (*5)…As STB=H again, it is the same operation as the timing of (*1). www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 21/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7.3 the soft start function Figure 35. (*1)…The SS pin charge does not start by just STB=H. “PWM1=H or PWM2=H” is required to start the soft start. In the low SS voltage, the GATE pin duty is depend on the SS voltage. And as the SS is less than 0.1V, the pulse does not output. (*2)…By the low STB=L, the SS pin is discharged immediately. (*3)…As the STB recovered to STB=H, The SS charge starts immediately by the logic “PWM1 or PWM2=H” in this chart. (*4)…The SS pin is discharged immediately by the UVLO=L and FAILB is changed OPEN to Low. (*5)…The SS pin is discharged immediately by the VCCUVLO=L and FAILB is changed OPEN to Low. (*6)…The SS pin is discharged immediately by the REG90UVLO=L and FAILB keeps OPEN. (*7)…The SS pin is not discharged by the abnormal detection of the latch off type such as OVP until the latch off. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 22/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV RESET START END START RESET START ●3.7.4 the OVP detection Figure 36. (*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts (*2)…If OVP is released within 4 clock of abnormal counter of the GATE pin frequency, the boost operation restarts. (*3)…As the OVP is detected again, the boost operation is stopped. (*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC will be latched off. Both channels will be stopped. (GATE1=GATE2=L, DIMOUT1=DIMOUT2=L) (*5)…As the latched off, the boost operation doesn't restart even if OVP is released. (*6)…The STB=L input can make IC reset. (*7)…It normally starts as STB turns L to H. (*8)…The operation of the OVP detection is not related to the logic of PWM. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 23/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7.5 FBMAX detection Figure 37. (*2)…During the soft start, it is not judged to the abnormal state even if the FB=H(FB>4.0V). (*3)…When the PWM=H and FB=H, the abnormal counter doesn’t start immediately. (*4)…The CP charge will start if the PWM=H and the FB=H detection continues 8 clock of the GATE frequency. Once the count starts, only FB level is monitored. (*5)…When the FBMAX detection continues till the CP charge reaches to 3.0V, IC will be latched off. The latch off interval can be calculated by the external capacitance of CP pin. (Please refer the section 3.4.7.) In latch off mode, both CH1 and CH2 will be stopped. (*6)…The latch off state can be reset by the STB=L. (*7)…It is normally started by PWM=L to H, in this Figure. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 24/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7.6 LED OCP detection STB PWM1or PWM2 3.0V INSENSE Abnormal COUNTOR 3.0V 3.0V 3.0V 3.0V 4count 4count Smaller than 4count 3.0V SS 0.4V GATE DIMOUT FAILB STATE NORMAL LEDOCP NORMAL abnormal (*1) (*2) abnormal (*3) Reset Latch off LEDOCP (*4) (*5) (OFF) (*6) (*7) LEDOCP NORMAL Latch off abnormal (*8) Figure 38. (*1)…If ISENSE>3.0V, LEDOCP is detected, it becomes GATE=L. To detect LEDOCP continuously, The DIMOUT is compulsorily high, regardless of the PWM dimming signal. (*2)…When the LEDOCP releases within 4 counts of the GATE frequency, the boost operation restarts. (*3) …As the LEDOCP is detected again, the boost operation is stopped, too. (*4)…If the LEDOCP detection continues up to 4 counts of GATE frequency. IC will be latched off. (*5)…Once IC is latched off, the boost operation doesn't restart even if the LEDOCP releases. And both CH1 and CH2 will be stopped. (*6)…The latch off state can be reset by the STB=L. (*7)…It normally starts by STB=L to H. (*8)…The operation of the LEDOCP detection is not related to the logic of the PWM. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 25/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●3.7.7 the spontaneous detection OVP and FBMAX. STB 3.0V OVP FB 3.0V 2.9V 4.0V 4.0V 4.0V 2.9V 4.0V SS 4count END 4count START Abnormal COUNTOR END START CP 0.4V GATE DIMOUT FAILB STATE NORMAL (*1) COUNTOR (*2) Latch off (*3) Reset NORMAL COUNTOR (*4) (*5) Latch off (*6) Figure 39. (*1)…As the FBMAX is detected, the CP charge is started. (*2)…As the OVP is detected, the abnormal counter is started, the CP charge is not reset. (*3)…IC is latched off by OVP. (*4)…The latch mode is reset by STB=L (*5)…If the FBMAX is detected during OVP, the CP charge is started. (*6)…The OVP counties to 4clk, IC is latched off. And the CP charge is reset. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 26/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●Operational Notes 1.) This product is produced with strict quality control, but might be destroyed if used beyond its absolute maximum ratings including the range of applied voltage or operation temperature. Failure status such as short-circuit mode or open mode can not be estimated. If a special mode beyond the absolute maximum ratings is estimated, physical safety countermeasures like fuse needs to be provided. 2.) Connecting the power line to IC in reverse polarity (from that recommended) may cause damage to IC. For protection against damage caused by connection in reverse polarity, countermeasures, installation of a diode between external power source and IC power terminal, for example, needs to be taken. 3.) When this product is installed on a printed circuit board, attention needs to be paid to the orientation and position of IC. Wrong installation may cause damage to IC. Short circuit caused by problems like foreign particles entering between outputs or between an output and power GND also may cause damage. 4.) Since the back electromotive force of external coil causes regenerated current to return, countermeasures like installation of a capacitor between power source and GND as the path for regenerated current needs to be taken. The capacitance value must be determined after it is adequately verified that there is no problem in properties such that the capacity of electrolytic capacitor goes down at low temperatures. Thermal design needs to allow adequate margin in consideration of allowable loss (Pd) in actual operation state. 5.) The GND pin needs to be at the lowest potential in any operation state. 6.) Thermal design needs to be done with adequate margin in consideration of allowable loss (Pd) in actual operation state. 7.) Use in a strong magnetic field may cause malfunction. 8.) Output Tr needs to not exceed the absolute maximum rating and ASO while using this IC. As CMOS IC and IC which has several power sources may undergo instant flow of rush current at turn-on, attention needs to be paid to the capacitance of power source coupling, power source, and the width and run length of GND wire pattern. 9.) This IC includes temperature protection circuit (TSD circuit). Temperature protection circuit (TSD circuit) strictly aims blockage of IC from thermal runaway, not protection or assurance of IC. Therefore use assuming continuous use and operation after this circuit is worked needs to not be done. 10.) As connection of a capacitor with a pin with low impedance at inspection of a set board may cause stress to IC, discharge needs to be performed every one process. Before a jig is connected to check a process, the power needs to be turned off absolutely. Before the jig is removed, as well, the power needs to be turned off. 11.) This IC is a monolithic IC which has P+ isolation for separation of elements and P board between elements. A P-N junction is formed in this P layer and N layer of elements, composing various parasitic elements. For example, a resistance and transistor are connected to a terminal as shown in the figure, ○ When GND>(Terminal A) in the resistance and when GND>(Terminal B) in the transistor (NPN), P-N junction operates as a parasitic diode. ○ When GND>(Terminal B) in the transistor (NPN), parasitic NPN transistor operates in N layer of other elements nearby the parasitic diode described before. Parasitic elements are formed by the relation of potential inevitably in the structure of IC. Operation of parasitic elements can cause mutual interference among circuits , malfunction as well as damage. Therefore such use as will cause operation of parasitic elements like application of voltage on the input terminal lower than GND (P board) need to not be done. Transistor (NPN) Resistor B (Pin A) P N P P P N N E C (Pin B) N GND P P N N N P substrate P substrate GND Parasitic element GND Parasitic element (Pin B) B (Pin A) C E Parasitic element GND ＧＮＤ Adjacent other elements Parasitic Figure 40. Example of Simple Structure of Monolithic IC Status of this document The Japanese version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 27/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●Ordering Information B D 9 4 8 3 F Part Number - XX Package F:SOP FV:SSOP Packaging and forming specification XX: Please confirm the formal name to our sales. ●Marking Diagram SSOP-B24(TOP VIEW) SOP24(TOP VIEW) Part Number Marking Part Number Marking BD9483F D9483FV LOT Number LOT Number 1PIN MARK 1PIN MARK ●Physical Dimension Tape and Reel Information SOP24 <Tape and Reel information> 15.0 ± 0.2 (MAX 15.35 include BURR) Embossed carrier tape Quantity 2000pcs 13 Direction of feed 0.3MIN 5.4±0.2 7.8±0.3 24 Tape 1 E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 12 0.11 1.8±0.1 0.15 ± 0.1 0.4 ± 0.1 1.27 0.1 1pin Reel (Unit : mm) Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. SSOP-B24 <Tape and Reel information> 7.8 ± 0.2 (MAX 8.15 include BURR) 13 0.3Min. 1 Embossed carrier tape Quantity 2000pcs E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 12 0.15 ± 0.1 0.1 1.15 ± 0.1 Tape Direction of feed 5.6 ± 0.2 7.6 ± 0.3 24 0.1 0.65 0.22 ± 0.1 1pin (Unit : mm) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Reel 28/29 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet BD9483F,FV ●Revision History Date Revision 18.Sep.2012 16.Oct.2012 001 002 28.Nov.2013 003 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Changes New Release p.7 Item arrangement of Typical Performance Curves p.5 1.3 Pin Descriptions In/Out GATE1:In→Out p.13 Diagram of start-up sequence SS=0.1V → SS=0.4V p.13 Explanation of start-up sequence SS=0.1V → SS=0.4V(typ) p.20 3.7.1 diagram SS 0.1V → 0.4V p.20 3.7.1 explanation(*3) less than 0.1V → less than 0.4V(typ) p.21 3.7.2 diagram SS 0.1V → 0.4V p.21 3.7.2 explanation (*2) less than 0.1V → less than 0.4V(typ) p.23 3.7.4 diagram SS 0.1V → 0.4V p.25 3.7.6 diagram SS 0.1V → 0.4V p.26 3.7.7 diagram SS 0.1V → 0.4V 29/29 TSZ02201-0F1F0C100100-1-2 28.Nov.2013 Rev.003 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) , transport intend to use our Products in devices requiring extremely high reliability (such as medical equipment equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice - GE © 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label QR code printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with ROHM representative in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable for infringement of any intellectual property rights or other damages arising from use of such information or data.: 2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the information contained in this document. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice - GE © 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2014 ROHM Co., Ltd. All rights reserved. Rev.001