ON NCP176BMX100TCG Fast transient response low voltage 500 ma ldo Datasheet

NCP176
Fast Transient Response
Low Voltage 500 mA LDO
The NCP176 is CMOS LDO regulator featuring 500 mA output
current. The input voltage is as low as 1.4 V and the output voltage can
be set from 0.7 V.
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Features
•
•
Operating Input Voltage Range: 1.4 V to 5.5 V
Output Voltage Range: 0.7 to 3.6 V (0.1 V steps)
Quiescent Current typ. 60 mA
Low Dropout: 130 mV typ. at 500 mA, VOUT = 2.5 V
High Output Voltage Accuracy ±0.8% (VOUT > 1.8 V)
Stable with Small 1 mF Ceramic Capacitors
Over−current Protection
Built−in Soft Start Circuit to Suppress Inrush Current
Thermal Shutdown Protection: 165°C
With (NCP176A) and Without (NCP176B) Output Discharge
Function
Available in XDFN6 1.2 mm x 1.2 mm x 0.4 mm Package
These are Pb−free Devices
XDFN6
MX SUFFIX
CASE 711AT
PIN CONNECTIONS
OUT
1
FB
2
GND
3
GND
•
•
•
•
•
•
•
•
•
•
6
IN
5
N/C
4
EN
XDFN6 (Top View)
Typical Applications
MARKING DIAGRAM
• Battery Powered Equipment
• Portable Communication Equipment
• Cameras, Image Sensors and Camcorders
VIN
VOUT
IN
CIN
1 mF
XX M
COUT
1 mF
NCP176
ON
EN
XX = Specific Device Code
M = Date Code
OUT
GND
FB
OFF
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 10 of this data sheet.
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 3
1
Publication Order Number:
NCP176/D
NCP176
IN
OUT
VOLTAGE REFERENCE
AND
SOFT−START
IN
OUT
VOLTAGE REFERENCE
AND
SOFT−START
FB
FB
EN
EN
0.7 V
0.7 V
GND
THERMAL
SHUTDOWN
GND
THERMAL
SHUTDOWN
NCP176A (with output discharge)
NCP176B (without output discharge)
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
XDFN6
Pin
Name
Description
1
OUT
LDO output pin
2
FB
Feedback input pin
3
GND
Ground pin
4
EN
Chip enable input pin (active “H”)
5
N/C
Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.
6
IN
Power supply input pin
EPAD
EPAD
It is recommended to connect the EPAD to GND, but leaving it open is also acceptable
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Symbol
Value
Unit
IN
−0.3 to 6.0
V
OUT
−0.3 to VIN + 0.3
V
Chip Enable Input
EN
−0.3 to 6.0
V
Output Current
IOUT
Internally Limited
mA
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Maximum Junction Temperature
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
Table 3. THERMAL CHARACTERISTICS
Rating
Thermal Resistance, Junction−to−Air, XDFN6 1.2 mm x 1.2 mm
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2
Symbol
Value
Unit
RqJA
123
°C/W
NCP176
Table 4. ELECTRICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V),
VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C. The specifications in bold are guaranteed at −40°C ≤ TJ ≤ 85°C.
Parameter
Test Conditions
Symbol
Min
Max
Unit
VIN
1.4
5.5
V
VOUT
−0.8
+0.8
%
VOUT < 1.8 V
−18
+18
mV
VOUT ≥ 1.8 V
−1.5
+1.5
%
VOUT < 1.8 V
−55
+50
mV
Input Voltage
Output Voltage
VOUT ≥ 1.8 V
TJ = +25°C
−40°C ≤ TJ ≤ 85°C
Typ
Line Regulation
VIN = VOUT−NOM + 0.5 V to 5.25 V
VIN ≥ 1.4 V
LineReg
0.02
0.1
%/V
Load Regulation
1 mA ≤ IOUT ≤ 500 mA
LoadReg
1
5.0
mV
VDO
295
380
mV
1.8 V ≤ VOUT < 2.1 V
200
275
2.1 V ≤ VOUT < 2.5 V
160
230
2.5 V ≤ VOUT < 3.0 V
130
190
3.0 V ≤ VOUT < 3.6 V
110
165
Dropout Voltage (Note 3)
IOUT = 500 mA
1.4 V ≤ VOUT < 1.8 V
IOUT = 0 mA
IQ
60
90
mA
VEN = 0 V
ISTBY
0.05
1
mA
Output Current Limit
VOUT = VOUT−NOM − 100 mV
IOUT
500
Short Circuit Current
VOUT = 0 V
ISC
550
EN Input Voltage “H”
VENH
1.0
EN Input Voltage “L”
VENL
VEN = VIN = 5.5 V
IEN
0.15
f = 1 kHz, Ripple 0.2 Vp−p,
VIN = VOUT−NOM + 1.0 V, IOUT = 30 mA
(VOUT ≤ 2.0V, VIN = 3.0 V)
PSRR
75
dB
VOUT ≥ 1.8 V
20x
VOUT−NOM
mVRMS
VOUT < 1.8 V
40x
VOUT−NOM
Quiescent Current
Standby Current
Enable Threshold Voltage
Enable Input Current
Power Supply Rejection
Ratio
Output Noise
f = 10 Hz to 100 kHz
mA
750
mA
V
0.4
0.6
mA
VIN = 4.0 V, VEN = 0 V, VOUT = VOUT−NOM
RACTDIS
60
W
Thermal Shutdown
Temperature
Temperature rising from TJ = +25°C
TSD
165
°C
Thermal Shutdown
Hysteresis
Temperature falling from TSD
TSDH
20
°C
Output Discharge Resistance
(NCP176A option only)
3. Measured when the output voltage falls −3% below the nominal output voltage (voltage measured under the condition VIN = VOUT−NOM + 0.5V).
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NCP176
TYPICAL CHARACTERISTICS
1.255
1.827
1.245
1.821
OUTPUT VOLTAGE (V)
1.235
1.225
1.215
1.205
1.195
1.185
1.175
VOUT−NOM = 1.2 V
1.165
1.815
1.809
1.803
1.797
1.791
−20
0
20
40
60
1.773
−40
80
−20
0
20
40
60
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
3.35
0.10
3.34
0.08
3.33
3.32
3.31
3.30
3.29
3.28
3.27
VOUT−NOM = 3.3 V
3.26
3.25
−40
VOUT−NOM = 1.8 V
1.785
1.779
LINE REGULATION (%/V)
OUTPUT VOLTAGE (V)
1.155
1.145
−40
−20
0
20
40
60
80
0.06
0.04
0.02
0
−0.02
−0.04
−0.06
VIN = VOUT−NOM + 0.5 V to 5.25 V, VIN ≥ 1.4 V
−0.08
−0.10
−40
−20
0
20
40
60
TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
Figure 6. Line Regulation vs. Temperature
5
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
4
3
2
1
0
−1
−2
IOUT = 1 mA to 500 mA
−3
−4
−5
−40
−20
0
20
40
60
TEMPERATURE (°C)
Figure 7. Load Regulation vs. Temperature
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80
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
TEMPERATURE (°C)
LOAD REGULATION (mV)
OUTPUT VOLTAGE (V)
VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C.
80
80
NCP176
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C.
275
275
VOUT−NOM = 1.8 V
TJ = 85°C
TJ = 25°C
200
175
150
125
TJ = −40°C
100
75
50
25
0
0
100
200
300
400
IOUT = 500 mA
225
200
175
150
125
IOUT = 250 mA
100
75
IOUT = 100 mA
50
25
0
−40
500
IOUT = 10 mA
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Dropout Voltage vs. Output Current
160
160
VOUT−NOM = 3.3 V
VOUT−NOM = 3.3 V
DROPOUT VOLTAGE (mV)
140
TJ = 85°C
120
TJ = 25°C
100
80
60
TJ = −40°C
40
20
140
IOUT = 500 mA
120
100
80
IOUT = 250 mA
60
40
IOUT = 100 mA
20
0
0
100
200
300
400
0
−40
500
IOUT = 10 mA
−20
0
20
40
60
80
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 10. Dropout Voltage vs. Output Current
Figure 11. Dropout Voltage vs. Temperature
90
QUIESCENT CURRENT (mA)
DROPOUT VOLTAGE (mV)
VOUT−NOM = 1.8 V
250
225
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
250
80
70
60
50
40
30
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
20
IOUT = 0 mA
10
0
−40
−20
0
20
40
60
80
TEMPERATURE (°C)
Figure 12. Quiescent Current vs. Temperature
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NCP176
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C.
90
1.0
0.8
QUIESCENT CURRENT (mA)
STANDBY CURRENT (mA)
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
VEN = 0 V
0.9
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
−40
0
20
40
60
TJ = 85°C
TJ = 25°C
75
70
TJ = −40°C
65
60
55
VOUT−NOM = 1.8 V
2.0
80
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 13. Standby Current vs. Temperature
Figure 14. Quiescent Current vs. Input Voltage
1000
SHORT CIRCUIT CURRENT (mA)
GROUND CURRENT (mA)
80
50
−20
300
VOUT−NOM = 1.8 V
250
200
150
100
TJ = 85°C
TJ = 25°C
TJ = −40°C
50
0
0
100
200
300
400
500
950
VOUT−FORCED = 0 V
900
850
800
750
700
650
VOUT−NOM = 1.2 V
VOUT−NOM = 1.8 V
VOUT−NOM = 3.3 V
600
550
500
−40
−20
0
20
40
60
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
Figure 15. Ground Current vs. Output Current
Figure 16. Short Circuit Current vs.
Temperature
950
ENABLE THRESHOLD VOLTAGE (V)
1000
OUTPUT CURRENT LIMIT (mA)
IOUT = 0 mA
85
VOUT−FORCED = VOUT−NOM − 0.1 V
900
850
VOUT−NOM = 1.2 V
800
VOUT−NOM = 3.3 V
750
700
650
VOUT−NOM = 1.8 V
600
550
500
−40
−20
0
20
40
60
80
1.0
0.9
OFF −> ON
0.8
ON −> OFF
0.7
0.6
0.5
0.4
−40
VOUT−NOM = 1.8 V
−20
0
20
40
60
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Output Current Limit vs.
Temperature
Figure 18. Enable Threshold Voltage vs.
Temperature
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80
80
NCP176
TYPICAL CHARACTERISTICS
VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C.
OUTPUT DISCHARGE RESISTANCE (W)
ENABLE INPUT CURRENT (mA)
0.6
VOUT−NOM = 1.8 V
VIN = 5.5 V
VEN = 5.5 V
0.5
0.4
0.3
0.2
0.1
0
−40
−20
0
20
40
60
80
70
60
50
40
30
VOUT−NOM = 1.8 V
VIN = 4.0 V
VEN = 0 V
VOUT−FORCED = VOUT−NOM
20
10
0
−40
−20
0
20
40
80
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 20. Output Discharge Resistance vs.
Temperature (NCP176A option only)
6
OUTPUT VOLTAGE NOISE (nV/√Hz)
80
70
60
50
40
COUT = 1 mF X7R 0805
IOUT = 30 mA
30
20
VOUT−NOM = 1.8 V, VIN = 3.0 V
VOUT−NOM = 3.3 V, VIN = 4.3 V
10
0
VOUT−NOM = 1.8 V, VIN = 2.8 V
VOUT−NOM = 3.3 V, VIN = 4.3 V
5
COUT = 1 mF X7R 0805
4
Integral noise:
10 Hz − 100 kHz: 54 mVrms
10 Hz − 1 MHz: 62 mVrms
3
2
1
0
10
100
1K
10K
100K
1M
10M
10
100
1K
10K
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Output Voltage Noise Spectral
Density
VOUT−NOM = 3.3 V
100 mA/div
VOUT−NOM = 3.3 V
50 mA/div
60
Figure 19. Enable Input Current vs.
Temperature
90
IIN
VIN
IIN
VIN
VOUT
VOUT
1 V/div
1 V/div
PSRR (dB)
80
1 ms/div
50 ms/div
Figure 23. Turn−ON/OFF − VIN driven (slow)
Figure 24. Turn−ON − VIN driven (fast)
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1M
NCP176
TYPICAL CHARACTERISTICS
VOUT−NOM = 3.3 V
500 mV/div
1 V/div
IIN
50 mA/div
VOUT
1 V/div
VOUT−NOM = 1.2 V
3.3 V
VIN
tR = tF = 1 ms
2.3 V
VOUT
1.2 V
100 ms/div
20 ms/div
3.8 V
1 V/div
VOUT−NOM = 3.3 V
VIN
VIN
tR = tF = 1 ms
VOUT
3.3 V
VOUT−NOM = 1.2 V
VIN = 2.2 V
500 mA
200 mA/div
4.8 V
Figure 26. Line Transient Response
tR = tF = 1 ms
IOUT
50 mV/div
10 mV/div
500 mV/div
Figure 25. Turn−ON/OFF − EN driven
VOUT
1.2 V
20 ms/div
10 ms/div
Figure 28. Load Transient Response
220
VIN
VOUT−NOM = 3.3 V
VIN = 4.3 V
500 mA
tR = tF = 1 ms
IOUT
VOUT
1 mA
1.2 V
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
1 V/div
Figure 27. Line Transient Response
50 mV/div 200 mA/div
1 mA
1.6
1.4
200
PD(MAX), 2 oz Cu
180
1.2
PD(MAX), 1 oz Cu
160
qJA, 1 oz Cu
140
120
qJA, 2 oz Cu
1.0
0.8
0.6
100
0.4
80
0.2
60
0
10 ms/div
100
200
300
400
500
0
600
PCB COPPER AREA (mm2)
Figure 30. qJA and PD(MAX) vs. Copper Area
Figure 29. Load Transient Response
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PD(MAX), MAXIMUM POWER DISSIPATION (W)
VIN
VEN
10 mV/div
2 V/div
VIN = VOUT−NOM + 1 V (VOUT−NOM > 1.5 V) or VIN = 2.5 V (VOUT−NOM ≤ 1.5 V), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C.
NCP176
APPLICATIONS INFORMATION
General
Enable Operation
The NCP176 is a high performance 500 mA low dropout
linear regulator (LDO) delivering excellent noise and
dynamic performance. Thanks to its adaptive ground current
behavior the device consumes only 60 mA of quiescent
current (no−load condition).
The regulator features low noise of 48 mVRMS, PSRR of
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
50 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(A−version only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On A−version the active
discharge transistor is active so the output voltage is pulled
to GND through 60 W (typ.) resistor.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
The EN pin has internal pull−down current source with
value of 150 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
Output Current Limit
Output current is internally limited to a 750 mA typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
VOUT−NOM – 100mV). If the output voltage is shorted to
ground, the short circuit protection will limit the output
current to 750 mA typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Output Capacitor Selection (COUT)
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitor’s datasheet for details).
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the COUT but the
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
P D(MAX) +
TJ * TA
[W]
q JA
(eq. 1)
Where (TJ − TA) is the temperature difference between the
junction and ambient temperatures and θJA is the thermal
resistance (dependent on the PCB as mentioned above).
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NCP176
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
P D + V IN @ I GND ) ǒV IN * V OUTǓ @ I OUT [W]
100 kHz) can be tuned by the selection of COUT capacitor
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
(eq. 2)
Enable Turn−On Time
Where IGND is the LDO’s ground current, dependent on
the output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θJA and PD(MAX) to PCB copper area and
Cu layer thickness could be seen on the Figure 30.
The enable turn−on time is defined as the time from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT−NOM, COUT and TA.
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors as close as
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case when VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
ORDERING INFORMATION TABLE
Part Number
Voltage Option
Marking
NCP176AMX100TCG
1.0 V
AA
NCP176AMX120TCG
1.2 V
AE
NCP176AMX180TCG
1.8 V
AF
NCP176AMX300TCG
3.0 V
AC
NCP176AMX330TCG
3.3 V
AD
NCP176BMX100TCG
1.0 V
DA
NCP176BMX120TCG
1.2 V
DE
NCP176BMX180TCG
1.8 V
DF
NCP176BMX300TCG
3.0 V
DC
NCP176BMX330TCG
3.3 V
DD
Option
Package
Shipping†
XDFN6
(Pb−Free)
3000 / Tape & Reel
With output discharge
Without output discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
NCP176
PACKAGE DIMENSIONS
XDFN6 1.20x1.20, 0.40P
CASE 711AT
ISSUE A
D
A
B
ÍÍÍ
ÍÍÍ
ÍÍÍ
EXPOSED Cu
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE PAD AS
WELL AS THE TERMINALS.
ÉÉ
ÇÇ
ÇÇ
MOLD CMPD
DETAIL A
PIN ONE
REFERENCE
OPTIONAL
CONSTRUCTION
E
DIM
A
A1
b
D
D2
E
E2
e
L
L1
0.05 C
2X
0.05 C
2X
TOP VIEW
A
DETAIL A
0.05 C
A1
RECOMMENDED
MOUNTING FOOTPRINT*
0.05 C
NOTE 4
C
SIDE VIEW
6X
1
SEATING
PLANE
1.08
PACKAGE
OUTLINE
D2
DETAIL A
3
1.40
L
0.40
1
0.40
PITCH
6
4
6X
e
6X
0.35
L1
E2
6X
MILLIMETERS
MIN
MAX
0.30
0.45
0.00
0.05
0.13
0.23
1.20 BSC
0.84
1.04
1.20 BSC
0.20
0.40
0.40 BSC
0.15
0.25
0.05 REF
b
6X
0.24
DIMENSIONS: MILLIMETERS
0.10
BOTTOM VIEW
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
C A B
NOTE 3
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
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www.onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP176/D