CYStech Electronics Corp. Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 1/ 9 N-Channel Enhancement Mode MOSFET MTB55N03KS6 BVDSS ID@VGS=10V, TA=25°C RDSON@VGS=10V, ID=2A RDSON@VGS=4.5V, ID=1.7A 30V 2.3A 65mΩ(typ) 80mΩ(typ) Features • Low on-resistance • High speed switching • ESD protected gate • Pb-free lead plating and halogen-free package Equivalent Circuit Outline MTB55N03KS6 SOT-363 Pin #1 Ordering Information Device MTB55N03KS6-0-T1-G Package Shipping SOT-363 3000 pcs / Tape & Reel (Pb-free lead plating and halogen-free package) Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T1 : 3000 pcs / tape & reel, 7” reel Product rank, zero for no rank products Product name MTB55N03KS6 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 2/ 9 Absolute Maximum Ratings (Ta=25°C) Symbol VDS VGS Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TA=25°C, VGS=10V Continuous Drain Current @ TA=70°C, VGS=10V Pulsed Drain Current Maximum Power Dissipation Maximum Power Dissipation Operating Junction and Storage Temperature (Note 3) Limits 30 ±20 2.3 1.8 14 750 ID (Note 3) IDM (Notes 1, 2) (Note 3) PD (Note 4) 480 -55~+150 Tj, Tstg Unit V A mW °C Thermal Performance Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient (Note 3) Thermal Resistance, Junction-to-Ambient (Note 4) Symbol Limit RθJC 120 RθJA 167 Unit °C/W 260 Note : 1. Pulse width limited by maximum junction temperature. 2. Pulse width≤ 300μs, duty cycle≤2%. 3. Surface mounted on a 1 in² pad of 2 oz. copper. 4. Surface mounted on a minimum pad. Electrical Characteristics (Tj=25°C, unless otherwise noted) Symbol Static BVDSS VGS(th) IGSS IDSS *RDS(ON) *GFS Dynamic Ciss Coss Crss td(ON) tr td(OFF) tf MTB55N03KS6 Min. Typ. Max. 30 1 - 65 80 3.3 2.5 ±10 1 5 115 155 - - 166 50 32 3.6 15 10.4 4.6 - Unit Test Conditions S VGS=0V, ID=250μA VDS=VGS, ID=250μA VGS=±16V, VDS=0V VDS=24V, VGS=0V VDS=24V, VGS=0V @Tj=55°C VGS=10V, ID=2A VGS=4.5V, ID=1.7A VDS=5V, ID=1A pF VDS=15V, VGS=0V, f=1MHz ns VDS=15V, ID=1A, VGS=10V, RG=6Ω V μA mΩ CYStek Product Specification CYStech Electronics Corp. Qg Qgs Qgd Source-Drain Diode *VSD *trr *Qrr Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 3/ 9 - 2.8 0.9 0.9 - nC VDS=15V, ID=2A, VGS=5V - 0.75 7 2 1.2 - V ns nC VGS=0V, IS=0.42A IF=1A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% Recommended Soldering Footprint MTB55N03KS6 CYStek Product Specification Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 4/ 9 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 4V 8 ID, Drain Current(A) BVDSS, Normalized Drain-Source Breakdown Voltage 10 6 10V, 9V, 8V, 7V, 6V,5V, 4.5V 3.5V 4 VGS=3V 2 1.2 1 0.8 ID=250μA, VGS=0V 0.6 0 0 1 2 3 4 -75 5 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) Static Drain-Source On-State resistance vs Drain Current Reverse Drain Current vs Source-Drain Voltage 100 VGS=4.5V VSD, Source-Drain Voltage(V) R DS(on), Static Drain-Source On-State Resistance(mΩ) 1.2 VGS=10V VGS=0V Tj=25°C 1 0.8 Tj=150°C 0.6 0.4 0.2 10 0.01 0.1 1 ID, Drain Current(A) 0 10 2 4 6 8 IDR , Reverse Drain Current(A) 10 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 200 2 180 R DS(on), Normalized Static DrainSource On-State Resistance R DS(on), Static Drain-Source OnState Resistance(mΩ) -50 VDS, Drain-Source Voltage(V) ID=2A 160 140 120 100 80 60 40 20 1.8 VGS=10V, ID=2A 1.6 1.4 1.2 1 0.8 0.6 RDS(ON) @ Tj=25°C : 65 mΩ 0.4 0 0 MTB55N03KS6 2 4 6 8 VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 5/ 9 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage VGS(th), Normalized Threshold Voltage Capacitance---(pF) 1000 Ciss 100 C oss Crss 1.4 1.2 ID=1mA 1 0.8 ID=250μA 0.6 10 0 5 10 15 20 VDS, Drain-Source Voltage(V) 25 -75 -50 -25 30 75 100 125 150 175 10 Pulsed Ta=25°C VGS, Gate-Source Voltage(V) GFS , Forward Transfer Admittance(S) 50 Gate Charge Characteristics 10 VDS=5V 1 0.1 8 6 4 VDS=15V 2 ID=2A 0 0.01 0.001 0.01 0.1 ID, Drain Current(A) 0 1 1 2 3 4 5 6 7 Qg, Total Gate Charge(nC) Maximum Safe Operating Area Maximum Drain Current vs JunctionTemperature 100 100μs 1 1ms 10ms 100ms 1s DC 0.1 TA=25°C, Tj=150°C,VGS=10V RθJA=260°C/W, Single Pulse 0.001 0.01 2 1.5 1 TA=25°C, VGS=10V, RθJA=260°C/W 0.5 0 0.1 1 10 VDS, Drain-Source Voltage(V) MTB55N03KS6 ID, Maximum Drain Current(A) 2.5 10 ID, Drain Current(A) 25 Tj, Junction Temperature(°C) Forward Transfer Admittance vs Drain Current 0.01 0 100 25 50 75 100 125 150 Tj, Junction Temperature(°C) 175 CYStek Product Specification Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 6/ 9 CYStech Electronics Corp. Typical Characteristics(Cont.) Typical Transfer Characteristics 50 10 8 40 7 35 Power (W) ID, Drain Current(A) 45 VDS=10V 9 6 5 4 25 20 15 2 10 1 5 0 0.0001 0.001 0 2 4 6 8 VGS, Gate-Source Voltage(V) TJ(MAX) =150°C TA=25°C RθJA=260°C/W 30 3 0 Single Pulse Maximum Power Dissipation, Junction to Ambient 10 0.01 0.1 1 Pulse Width(s) 10 100 1000 Transient Thermal Response Curves 1 r(t), Normalized Transient Thermal Resistance D=0.5 0.2 0.1 0.1 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TA=PDM*RθJA(t) 4.RθJA=260 °C/W 0.05 0.02 0.01 0.01 0.001 1.E-04 Single Pulse 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 t1, Square Wave Pulse Duration(s) MTB55N03KS6 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 7/ 9 Reel Dimension Carrier Tape Dimension MTB55N03KS6 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 8/ 9 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note :1. All temperatures refer to topside of the package, measured on the package body surface. 2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care should be taken to match the coefficients of thermal expansion between components and PCB. If they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools. MTB55N03KS6 CYStek Product Specification Spec. No. : C122S6 Issued Date : 2018.03.13 Revised Date : Page No. : 9/ 9 CYStech Electronics Corp. SOT-363 Dimension 5N3K XX Marking: Date Code 6-Lead SOT-363 Plastic Surface Mounted Package CYStek Package Code: S6 Style: Pin 1. Drain (D) Pin 2. Drain (D) Pin 3. Gate (G) Pin 4. Source (S) Pin 5. Drain (D) Pin 6. Drain (D) Millimeters Min. Max. 0.900 1.100 0.000 0.100 0.900 1.000 0.150 0.350 0.080 0.150 2.000 2.200 1.150 1.350 DIM A A1 A2 b c D E Inches Min. Max. 0.035 0.043 0.000 0.004 0.035 0.039 0.006 0.014 0.003 0.006 0.079 0.087 0.045 0.053 DIM E1 e e1 L L1 θ Millimeters Min. Max. 2.150 2.450 0.650 TYP 1.200 1.400 0.525 REF 0.260 0.460 0° 8° Inches Min. Max. 0.085 0.096 0.026 TYP 0.047 0.055 0.021 REF 0.010 0.018 0° 8° Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Lead : Pure tin plated. • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTB55N03KS6 CYStek Product Specification