ON NVMFS6B85NLWFT1G Power mosfet Datasheet

NVMFS6B85NL
Power MOSFET
100 V, 46 mW, 19 A, Single N−Channel
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS6B85NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(ON) MAX
46 mW @ 10 V
100 V
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
100
V
Gate−to−Source Voltage
VGS
±16
V
ID
19
A
Continuous Drain
Current RqJC
(Notes 1, 2, 3)
TC = 25°C
Power Dissipation
RqJC (Notes 1, 2)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
TC = 100°C
TC = 25°C
Pulsed Drain Current
PD
TC = 100°C
TA = 25°C
Power Dissipation
RqJA (Notes 1 & 2)
14
Steady
State
TA = 100°C
TA = 25°C
G (4)
W
42
S (1,2,3)
A
5.6
PD
W
3.5
93
TJ, Tstg
−55 to
+ 175
°C
IS
32
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 1.7 A)
EAS
116
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
Source Current (Body Diode)
MARKING
DIAGRAM
1.75
IDM
Operating Junction and Storage Temperature
N−CHANNEL MOSFET
4.0
TA = 100°C
TA = 25°C, tp = 10 ms
D (5,6)
21
ID
19 A
72 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
ID MAX
A
mJ
°C
260
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
D
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
6B85xx
AYWZZ
D
D
6B85NL = NVMFS6B85NL
6B85LW = NVMFS6B85NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Junction−to−Case − Steady State
RqJC
3.6
Junction−to−Ambient − Steady State (Note 2)
RqJA
43
Unit
ORDERING INFORMATION
°C/W
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 0
1
Publication Order Number:
NVMFS6B85NL/D
NVMFS6B85NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
100
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
64
VGS = 0 V,
VDS = 80 V
mV/°C
TJ = 25°C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 16 V
VGS(TH)
VGS = VDS, ID = 250 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
1.2
2.4
−5.2
VGS = 10 V
VGS = 4.5 V
ID = 10 A
V
mV/°C
37
46
55
72
mW
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
480
VGS = 0 V, f = 1 MHz, VDS = 25 V
170
pF
15
VGS = 4.5 V, VDS = 50 V; ID = 10 A
3.8
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.1
Plateau Voltage
VGP
4.0
td(ON)
6.9
7.9
1.1
VGS = 10 V, VDS = 50 V; ID = 10 A
nC
2.4
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 50 V,
ID = 10 A, RG = 2.5 W
tf
66.9
ns
12.5
55.9
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.88
TJ = 125°C
0.76
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 10 A
1.2
V
39.4
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 10 A
QRR
22.7
ns
16.7
40
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6B85NL
TYPICAL CHARACTERISTICS
20
VGS = 10 V
to 5 V
4.5 V
18
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
20
15
3.6 V
3.4 V
10
3.2 V
5
3.0 V
2.8 V
16
14
12
10
8
TJ = 25°C
6
4
2
0
TJ = 125°C
1.0
0.5
2.0
1.5
3.0
2.5
0
4
5
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
Figure 1. On−Region Characteristics
48
46
44
42
40
38
36
34
32
5
6
7
8
10
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
70
65
TJ = 25°C
60
VGS = 4.5 V
55
50
45
40
VGS = 10 V
35
30
5
10
20
15
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.4
2.2
3
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 10 A
TJ = 25°C
4
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
50
10K
TJ = 150°C
ID = 10 A
VGS = 10 V
2.0
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
TJ = −55°C
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
VDS = 10 V
1.8
1.6
1.4
1.2
1.0
1K
TJ = 125°C
100
TJ = 85°C
10
0.8
0.6
−50 −25
1
0
25
50
75
100
125
150
175
5
15
25
35
45
55
65
75
85
95
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6B85NL
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
1000
Ciss
C, CAPACITANCE (pF)
Coss
100
Crss
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
1
0
10
20
30
40
50
60
70
80
90
6
5
Qgd
Qgs
4
3
TJ = 25°C
VDS = 50 V
ID = 10 A
2
1
0
1
0
2
3
4
5
6
7
8
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
IS, SOURCE CURRENT (A)
t, TIME (ns)
7
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
tr
tf
td(off)
10
td(on)
VDS = 50 V
ID = 10 A
VGS = 4.5 V
1
1
10
TJ = 25°C
10
TJ = 125°C
TJ = −55°C
1
0.3
100
0.5
0.7
0.9
1.1
1.3
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
VGS ≤ 10 V
Single Pulse
TC = 25°C
IPEAK, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
8
100
100
100
9
100
1000
1000
10
10
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
0.1
1
10
500 ms
1 ms
10 ms
100
10
TJ(initial) = 25°C
TJ(initial) = 100°C
1
0.1
0.0001
1000
0.001
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TAV, TIME IN AVALANCHE (sec)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. TAV
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4
0.01
NVMFS6B85NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
R(t) (°C/W)
10
1
20%
10%
5%
2%
1%
NVMFS6B85NL5x6 SOFL PCB Cu
Area 650 mm2 PCB Cu thk 2 oz
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Marking
Package
Shipping†
NVMFS6B85NLT1G
6B85NL
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS6B85NLWFT1G
6B85LW
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NVMFS6B85NLT3G
6B85NL
DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS6B85NLWFT3G
6B85LW
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVMFS6B85NL
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
0.20 C
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
A
2
B
D1
2X
0.20 C
4X
E1
q
E
2
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
A
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
0.10 C
2X
SIDE VIEW
0.495
DETAIL A
4.560
2X
0.10
8X b
C A B
0.05
c
1.530
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.15
6.30
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
e/2
e
L
1
3.200
4
4.530
K
1.330
2X
E2
PIN 5
(EXPOSED PAD)
L1
M
0.905
1
0.965
4X
G
1.000
4X 0.750
D2
BOTTOM VIEW
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NVMFS6B85NL/D