TI1 LM27964SQ-C/NOPB Lm27964 white led driver system with i2c compatible brightness control Datasheet

LM27964
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SNOSAL6D – MAY 2005 – REVISED MAY 2013
LM27964 White LED Driver System with I2C Compatible Brightness Control
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FEATURES
APPLICATIONS
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2
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87% Peak LED Drive Efficiency
0.2% Current Matching between Current Sinks
Drives 6 LEDs with up to 30mA per LED in
Two Distinct Groups, for Backlighting Two
Displays (main LCD and sub LCD)
Dedicated Keypad LED Driver with up to 80mA
of Drive Current
Independent Resistor-Programmable Current
Settings
I2C Compatible Brightness Control Interface
Adaptive 1×- 3/2× Charge Pump
Extended Li-Ion Input: 2.7V to 5.5V
Small Low Profile Industry Standard Leadless
Package, WQFN-24 : (4mm x 4mm x 0.8mm)
LM27964SQ-I LED PWM Frequency = 10kHz,
LM27964SQ-C LED PWM frequency = 23kHz
Mobile Phone Display Lighting
Mobile Phone Keypad Lighting
PDAs Backlighting
General LED Lighting
DESCRIPTION
The LM27964 is a charge-pump-based white-LED
driver that is ideal for mobile phone display
backlighting. The LM27964 can drive up to 6 LEDs in
parallel along with multiple keypad LEDs, with a total
output current up to 180mA. Regulated internal
current sources deliver excellent current matching in
all LEDs.
The LED driver current sources are split into two
independently controlled groups. The primary group
(4 LEDs) can be used to backlight the main phone
display and the second group (2 LEDs) can be used
to backlight a secondary display. A single Keypad
LED driver can power up to 16 keypad LEDs with a
current of 5mA each. The LM27964 has an I2C
compatible interface that allows the user to
independently control the brightness on each bank of
LEDs.
Typical Application Circuit
MAIN DISPLAY
SUB DISPLAY
KEYPAD LEDs
POUT
DKEY
VIN
+
VIN
CIN
D1A
D2A
D3A
D4A
D1B
D2B
COUT
C1
-
LM27964
C2
GND
SCL
2
I C Compatible
Interface
ISETA
RSETA
ISETB
RSETB
ISETK
RSETK
SDIO
VIO
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM27964
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DESCRIPTION (CONTINUED)
The LM27964 works off an extended Li-Ion input voltage range (2.7V to 5.5V). The device provides excellent
efficiency without the use of an inductor by operating the charge pump in a gain of 3/2, or in Pass-Mode. The
proper gain for maintaining current regulation is chosen, based on LED forward voltage, so that efficiency is
maximized over the input voltage range.
The LM27964 is available in TI's small 24-pin WQFN Package (WQFN-24).
Connection Diagram
6
5
4
3
2
1
1
2
3
4
5
6
7
24
24
7
8
23
23
8
9
22
22
9
DAP
DAP
10
21
21
10
11
20
20
11
19
19
12
13
14
15
16
17
18
Top View
12
18
17
16
15
14
13
Bottom View
Figure 1. 24 Pin Quad WQFN Package
See Package Number RTW0024A
Table 1. Pin Descriptions
Pin #s
Pin Names
24
VIN
23
POUT
Charge Pump Output Voltage
19, 22 (C1)
20, 21 (C2)
C1, C2
Flying Capacitor Connections
13, 14, 15, 16
2
Pin Descriptions
Input voltage. Input range: 2.7V to 5.5V.
D4A, D3A, D2A, D1A LED Drivers - GroupA
4, 5
D1B, D2B
LED Drivers - GroupB
6
DKEY
LED Driver - KEYPAD
17
ISETA
Placing a resistor (RSETA) between this pin and GND sets the full-scale LED current for Group
A LEDs. LED Current = 200 × (1.25V ÷ RSETA)
3
ISETB
Placing a resistor (RSETB) between this pin and GND sets the full-scale LED current for Group
B LEDs. LED Current = 200 × (1.25V ÷ RSETB)
12
ISETK
Placing a resistor (RSETK) between this pin and GND sets the total LED current for the
KEYPAD LEDs. Keypad LED Current = 800 × (1.25V ÷ RSETK)
1
SCL
Serial Clock Pin
2
SDIO
Serial Data Input/Output Pin
7
VIO
Serial Bus Voltage Level Pin
9, 10, 18, DAP
GND
Ground
8, 11
NC
No Connect
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Absolute Maximum Ratings (1) (2) (3)
VIN pin voltage
-0.3V to 6.0V
SCL, SDIO, VIO pin voltages
-0.3V to (VIN+0.3V)w/ 6.0V max
IDxx Pin Voltages
-0.3V to (VPOUT+0.3V)w/ 6.0V max
Continuous Power Dissipation (4)
Internally Limited
Junction Temperature (TJ-MAX)
150ºC
Storage Temperature Range
-65ºC to +150º C
See (5)
Maximum Lead Temperature (Soldering)
ESD Rating
(1)
(2)
(3)
(4)
(5)
(6)
(6)
Human Body Model - IDxx Pins:
1.0kV
Human Body Model - All other Pins:
2.0kV
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits
and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 170°C (typ.) and
disengages at TJ = 165°C (typ.).
For detailed soldering specifications and information, see the TI AN-1187 Application Report (SNOA401).
The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. MIL-STD-883 3015.7
Operating Rating (1) (2)
Input Voltage Range
2.7V to 5.5V
LED Voltage Range
2.0V to 4.0V
Junction Temperature (TJ) Range
-30°C to +100°C
Ambient Temperature (TA) Range (3)
(1)
(2)
(3)
-30°C to +85°C
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits
and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
100°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Thermal Properties
Juntion-to-Ambient Thermal Resistance (θJA), RTW0024A Package (1)
(1)
41.3°C/W
Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design. For more information, see the TI AN-1187
Application Report (SNOA401).
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Electrical Characteristics (1) (2)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = 3.6V; VDxA = 0.4V; VDxB = 0.4V; VDKEY = 0.4V; RSETA = RSETB = RSETK = 16.9kΩ; BankA,
BankB, and DKEY = Fullscale Current; ENA, ENB, ENK Bits = “1”; C1=C2=1.0µF, CIN=COUT=2.2µF; Specifications related to
output current(s) and current setting pins (IDxx and ISETx) apply to BankA, BankB and DKEY. (3)
Symbol
Parameter
Condition
3.0V ≤ VIN ≤ 5.5V
BankA or BankB Full-Scale
ENA or ENB = "1", ENK = “0”
Output Current Regulation
BankA or BankB Enabled
IDxx
Current Source Headroom Voltage
Requirement (5)
VHR
13.77
(-10%)
15.3
16.83
(+10%)
mA
(%)
2.7V ≤ VIN ≤ 3.0V
BankA or BankB Full-Scale
ENA or ENB = "1", ENK = “0”
15
mA
3.2V ≤ VIN ≤ 5.5V
RSETA = 8.3kΩ, RSETK = 16.9kΩ
VLED = 3.6V
BankA and DKEY Full-Scale
ENA = ENK = “1”, ENB = “0”
VDxx 1x to 3/2x Gain Transition
Threshold
Units
mA
Output Current Regulation
BankA and DKEY Enabled (4)
VDxTH
Max
7.5
3.0V ≤ VIN ≤ 5.5V
DKEY Full-Scale
ENA = ENB = “0”, ENK = “1”
Open-Loop Charge Pump Output
Resistance
Typ
3.0V ≤ VIN ≤ 5.5V
BankA or BankB Half-Scale
ENA or ENB = "1", ENK = “0”
Output Current Regulation
Keypad Driver Enabled
ROUT
Min
52.8
(-12%)
60
67.2
(+12%)
mA
(%)
30
DxA
mA
60
DKEY
Gain = 3/2
2.75
Gain = 1
Ω
1
VDxA and/or VDxB Falling
375
IDxx = 95% ×IDxx (nom.)
(IDxx (nom) ≈ 15mA)
BankA and/or BankB Full-Scale
Gain = 3/2, ENA and/or ENB = "1"
180
IDKEY = 95% ×IDKEY (nom.)
(IDKEY (nom) ≈ 60mA)
DKEY Full-Scale
Gain = 3/2, ENK = "1"
180
mV
mV
IDxx-MATCH
LED Current Matching
See (6)
0.2
2
%
IQ
Quiescent Supply Current
Gain = 1.5x, No Load
1.3
1.7
mA
ISD
Shutdown Supply Current
All ENx bits = "0"
3.0
5
µA
VSET
ISET Pin Voltage
2.7V ≤ VIN ≤ 5.5V
1.25
IDxA-B /
ISETA-B
Output Current to Current Set Ratio
BankA and BankB
200
IDKEY /
ISETK
Output Current to Current Set Ratio
DKEY
800
fSW
Switching Frequency
tSTART
Start-up Time
(1)
(2)
(3)
(4)
(5)
(6)
4
500
POUT = 90% steady state
700
250
V
900
kHz
µs
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most
likely norm.
CIN, CPOUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
The maximum total output current for the LM27964 should be limited to 180mA. The total output current can be split among any of the
three banks (IDxA = IDxB = 30mA Max., IDKEY = 80mA Max.). Under maximum output current conditions, special attention must be given
to input voltage and LED forward voltage to ensure proper current regulation. See the Maximum Output Current section of the datasheet
for more information.
For each IDxx output pin, headroom voltage is the voltage across the internal current sink connected to that pin. For Group A and B
outputs, VHR = VOUT -VDxx. If headroom voltage requirement is not met, LED current regulation will be compromised.
For the two groups of outputs on a part (BankA and BankB), the following are determined: the maximum output current in the group
(MAX), the minimum output current in the group (MIN), and the average output current of the group (AVG). For each group, two
matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN)/AVG. The largest number of the two (worst case) is considered the
matching figure for the bank. The matching figure for a given part is considered to be the highest matching figure of the two banks. The
typical specification provided is the most likely norm of the matching figure for all parts.
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Electrical Characteristics(1)(2)
(continued)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = 3.6V; VDxA = 0.4V; VDxB = 0.4V; VDKEY = 0.4V; RSETA = RSETB = RSETK = 16.9kΩ; BankA,
BankB, and DKEY = Fullscale Current; ENA, ENB, ENK Bits = “1”; C1=C2=1.0µF, CIN=COUT=2.2µF; Specifications related to
output current(s) and current setting pins (IDxx and ISETx) apply to BankA, BankB and DKEY.(3)
Symbol
Parameter
fPWM
Internal Diode Current PWM Frequency
D.C. Step
Diode Current Duty Cycle Step
Condition
Min
Typ
LM27964SQ-I
10
LM27964SQ-C
23
Max
Units
kHz
1/16
Fullscale
I2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO)
VIO
Serial Bus Voltage Level
1.8
VIN
V
V
VIL
Input Logic Low "0"
2.7V ≤ VIN ≤ 5.5V
0
0.27 ×
VIO
VIH
Input Logic High "1"
2.7V ≤ VIN ≤ 5.5V
0.73 ×
VIO
VIO
V
VOL
Output Logic Low "0"
ILOAD = 2mA
400
mV
I2C Compatible Interface Timing Specifications (SCL, SDIO, VIO) (7)
t1
SCL (Clock Period)
2.5
µs
t2
Data In Setup Time to SCL High
100
ns
t3
Data Out stable After SCL Low
0
ns
t4
SDIO Low Setup Time to SCL Low
(Start)
100
ns
t5
SDIO High Hold Time After SCL High
(Stop)
100
ns
(7)
SCL and SDIO should be glitch-free in order for proper brightness control to be realized.
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Block Diagram
MAIN DISPLAY
1 PF
C1+
VIN
2.7V to 5.5V
COUT
2.2 PF
C2-
POUT
D1A
D2A
D3A
D4A
D1B D2B
3/2X and 1X
Regulated Charge Pump
MAIN DISPLAY
DRIVERS
GAIN
CONTROL
SoftStart
700 kHz
Switch
Frequency
DKEY
KEYPAD
DRIVER
VLED
SENSE
1.25V
Ref.
SUB DISPLAY
DRIVERS
VLED
SENSE
Brightness
Control
Brightness
Control
Brightness
Control
10 kHz or
23 kHz PWM
Current Clock
General Purpose Register
SCL
2
I C Interface
Block
Brightness Control Register
Bank A and Bank B
Brightness Control Register
KEYPAD
VIO
LM27964-I/C
ISETB
ISETA
GND
RSETA
6
KEYPAD LEDs
1 PF
C1- C2+
2.2 PF
SDIO
SUB DISPLAY
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RSETB
IKEY
RKEY
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Typical Performance Characteristics
Unless otherwise specified: VIN = 3.6V; VLEDxA = 3.6V, VLEDxB = 3.6V; RSETA = RSETB = RSETK = 16.9kΩ; C1=C2=1µF , and CIN =
CPOUT = 2.2µF.
LED Drive Efficiency
vs
Input Voltage
Charge Pump Output Voltage
vs
Input Voltage
Figure 2.
Figure 3.
Shutdown Current
vs
Input Voltage
Diode Current
vs
Input Voltage
Figure 4.
Figure 5.
BankA/BankB Diode Current
vs
Brightness Register Code
BankA Diode Current
vs
BankA Headroom Voltage
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Unless otherwise specified: VIN = 3.6V; VLEDxA = 3.6V, VLEDxB = 3.6V; RSETA = RSETB = RSETK = 16.9kΩ; C1=C2=1µF , and CIN =
CPOUT = 2.2µF.
BankB Diode Current
vs
BankB Headroom Voltage
Keypad Driver Current
vs
Input Voltage
Figure 8.
Figure 9.
Keypad Driver Current
vs.
Brightness Register Code
Keypad Diode Current
vs
Keypad Headroom Voltage
Figure 10.
Figure 11.
Keypad Driver Current
vs
Keypad RSET Resistance
Figure 12.
8
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Circuit Description
OVERVIEW
The LM27964 is a white LED driver system based upon an adaptive 1.5x/1x CMOS charge pump capable of
supplying up to 180mA of total output current. With three separately controlled banks of constant current sinks,
the LM27964 is an ideal solution for platforms requiring a single white LED driver for main and sub displays, as
well as other general purpose lighting needs. The tightly matched current sinks ensure uniform brightness from
the LEDs across the entire small-format display.
Each LED is configured in a common anode configuration, with the peak drive current being programmed
through the use of external RSETx resistors. An I2C compatible interface is used to enable and vary the brightness
within the individual current sink banks. For BankA and BankB, 16 levels of PWM brightness control are
available, while 4 analog levels are present for the DKEY driver.
CIRCUIT COMPONENTS
Charge Pump
The input to the 1.5x/1x charge pump is connected to the VIN pin, and the regulated output of the charge pump is
connected to the VOUT pin. The recommended input voltage range of the LM27964 is 3.0V to 5.5V. The device’s
regulated charge pump has both open loop and closed loop modes of operation. When the device is in open
loop, the voltage at VOUT is equal to the gain times the voltage at the input. When the device is in closed loop,
the voltage at VOUT is regulated to 4.6V (typ.). The charge pump gain transitions are actively selected to maintain
regulation based on LED forward voltage and load requirements. This allows the charge pump to stay in the
most efficient gain (1x) over as much of the input voltage range as possible, reducing the power consumed from
the battery.
LED Forward Voltage Monitoring
The LM27964 has the ability to switch converter gains (1x or 3/2x) based on the forward voltage of the LED load.
This ability to switch gains maximizes efficiency for a given load. Forward voltage monitoring occurs on all diode
pins within BankA and BankB (DKEY is not monitored). At higher input voltages, the LM27964 will operate in
pass mode, allowing the POUT voltage to track the input voltage. As the input voltage drops, the voltage on the
DXX pins will also drop (VDXX = VPOUT – VLEDx). Once any of the active Dxx pins reaches a voltage approximately
equal to 375mV, the charge pump will then switch to the gain of 3/2. This switchover ensures that the current
through the LEDs never becomes pinched off due to a lack of headroom on the current sources.
Only active Dxx pins will be monitored. For example, if only BankA is enabled, the LEDs in BankB will not affect
the gain transition point. If both banks are enabled, all diodes will be monitored, and the gain transition will be
based upon the diode with the highest forward voltage. The DKEY pin is not monitored as it is intended to be for
keypad LEDs. Keypad LEDs generally require lower current, resulting in lower forward voltage compared to the
BankA and BankB LEDs that have higher currents. In the event that only the DKEY driver is enabled without
either BankA or BankB, the charge pump will default to 3/2 mode to ensure the DKEY driver has enough
headroom.
It is not recommended that any of the BankA or BankB drivers be left disconnected if either bank will be used in
the application. If Dxx pin/s are left unconnected, the LM27964 will default to the gain of 3/2. If the BankA or
BankB drivers are not going to be used in the application, leaving the Dxx pins is acceptable as long as the ENx
bit in the general purpose register is set to "0".
I2C Compatible Interface
DATA VALIDITY
The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, state of
the data line can only be changed when CLK is LOW.
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SCL
SDIO
data
change
allowed
data
valid
data
change
allowed
data
valid
data
change
allowed
Figure 13. Data Validity Diagram
A pull-up resistor between VIO and SDIO must be greater than [(VIO-VOL) / 2mA] to meet the VOL requirement
on SDIO. Using a larger pull-up resistor results in lower switching current with slower edges, while using a
smaller pull-up results in higher switching currents with faster edges.
START AND STOP CONDITIONS
START and STOP conditions classify the beginning and the end of the I2C session. A START condition is
defined as SDIO signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as
the SDIO transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and
STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.
During data transmission, the I2C master can generate repeated START conditions. First START and repeated
START conditions are equivalent, function-wise. The data on SDIO line must be stable during the HIGH period of
the clock signal (SCL). In other words, the state of the data line can only be changed when CLK is LOW.
SDIO
SCL
S
P
START condition
STOP condition
Figure 14. Start and Stop Conditions
TRANSFERING DATA
Every byte put on the SDIO line must be eight bits long, with the most significant bit (MSB) being transferred first.
Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated
by the master. The master releases the SDIO line (HIGH) during the acknowledge clock pulse. The LM27964
pulls down the SDIO line during the 9th clock pulse, signifying an acknowledge. The LM27964 generates an
acknowledge after each byte has been received.
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LM27964 address is 36h. For the eighth bit, a “0” indicates a
WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The
third byte contains data to write to the selected register.
10
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ack from slave
ack from slave
ack from slave
start
msb Chip Address lsb
w
ack
msb Register Add lsb
ack
msb DATA lsb
ack
stop
start
Id = 36h
w
ack
addr = 10h
ack
DGGUHVV K¶06 data
ack
stop
SCL
SDIO
(1)
w = write (SDIO = "0", r = read (SDIO = "1"), ack = acknowledge (SDIO pulled down by either master or slave), rs =
repeated start, id = chip address, 36h for LM27964
Figure 15. Write Cycle(1)
INTERNAL REGISTERS OF LM27964
Register
Internal Hex Address
Power On Value
General Purpose Register
10h
0000 0000
Bank A and Bank B Birghtness Control
Register
A0h
0000 0000
KEYPAD Brightness Control
B0h
0000 0000
MSB
0
bit7
LSB
R1
bit6
R0
bit5
0
bit4
0
bit3
ENK
bit2
ENB
bit1
ENA
bit0
Figure 16. General Purpose Register Description
Internal Hex Address: 10h
NOTE
ENA: Enables DxA LED drivers (Main Display)
ENB: Enables DxB LED drivers (Sub Display)
ENK: Enables Keypad Driver
DxA Drivers Enabled
MSB
LSB
0
bit7
0
bit6
0
bit5
0
bit4
0
bit3
ENK
bit2
ENB
bit1
ENA
bit0
0
0
0
0
0
0
0
1
Figure 17. General Purpose Register Example
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MSB
LSB
DxB3
bit7
DxB2
bit6
DxB1
bit5
DxB0
bit4
DxA3
bit3
DxB Brightness Control
DxA2
bit2
DxA1
bit1
DxA0
bit0
DxA Brightness Control
Figure 18. Brightness Control Register Description
Internal Hex Address: A0h
NOTE
DxA3-DxA0: Register Sets Current Level Supplied to DxA LED drivers
DxB3-DxB0: Register Sets Current Level Supplied to DxB LED drivers
Full-Scale Current set externally by the following equation:
IDxx = 200 × 1.25V / RSETx
Brightness Level Segments = 1/16th of Fullscale
Full Scale Brightness
MSB
LSB
DxB3
bit7
DxB2
bit6
DxB1
bit5
DxB0
bit4
DxA3
bit3
DxA2
bit2
DxA1
bit1
DxA0
bit0
1
1
1
1
1
1
1
1
DxB Brightness Control
DxA Brightness Control
Half Scale Brightness
MSB
LSB
DxB3
bit7
DxB2
bit6
DxB1
bit5
DxB0
bit4
DxA3
bit3
DxA2
bit2
DxA1
bit1
DxA0
bit0
0
1
1
1
0
1
1
1
DxB Brightness Control
DxA Brightness Control
Figure 19. Brightness Control Register Example
DKEY Driver Enabled
Full-Scale
MSB
LSB
0
bit7
0
bit6
0
bit5
0
bit4
0
bit3
0
bit2
DKEY1
bit1
DKEY0
bit0
0
0
0
0
0
0
1
1
Figure 20. Internal Hex Address: B0h
NOTE
DKEY1-DKEY0: Sets Brightness for DKEY pin (KEYPAD Driver). 11=Fullscale
Bit7 to Bit 2: Not Used
Full-Scale Current set externally by the following equation:
IDKEY = 800 × 1.25V / RSETx
Brightness Level are= 100% (Fullscale), 70%, 40%, 20%
12
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APPLICATION INFORMATION
SETTING LED CURRENT
The current through the LEDs connected to DxA, DxB and DKEY can be set to a desired level simply by
connecting an appropriately sized resistor (RSETx) between the ISETx pin of the LM27964 and GND. The DxA and
DxB LED currents are proportional to the current that flows out of the ISETA and ISETB pins and are a factor of 200
times greater than the ISETA/B currents. The DKEY current is proportional to the current that flows out of the ISETK
pin and is a factor of 800 times greater than the ISETK current. The feedback loops of the internal amplifiers set
the voltage of the ISETx pins to 1.25V (typ.). Separate RSETx resistor should be used on each ISETx pin. The
statements above are simplified in the equations below:
IDxA/B = 200 × (VISET / RSETA/B)
RSETA/B = 200 × (1.25V / IDxA/B)
IDKEY = 800 × (VISET / RSETK)
RSETK = 800 × (1.25V / IDKEY)
Once the desired RSETx values have been chosen, the LM27964 has the ability to internally dim the LEDs by
Pulse Width Modulating (PWM) the current. The PWM duty cycle is set through the I2C compatible interface.
LEDs connected to BankA and BankB current sinks (DxA and DxB) can be dimmed to 16 different levels/dutycycles (1/16th of full-scale to full-scale). The internal PWM frequency for BankA and BankB is a fixed 10kHz
(LM27964SQ-I) or 23kHz (LM27964SQ-C) depending on the option.
The DKEY current sink uses an analog current scaling method to control LED brightness. The brightness levels
are 100% (Fullscale), 70%, 40%, and 20%. When connecting multiple LEDs in parallel to the DKEY current sink,
it is recommended that ballast resistors be placed in series with the LEDs. The ballast resistors help reduce the
affect of LED forward voltage mismatch, and help equalize the diode currents. Ballast resistor values must be
carefully chosen to ensure that the current source headroom voltage is sufficient to supply the desired current.
Please refer to the I2C Compatible Interface section of this datasheet for detailed instructions on how to adjust
the brightness control registers.
MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE, MINIMUM INPUT VOLTAGE
The LM27964 can drive 4 LEDs at 30mA each (BankA) and 12 keypad LEDs at 5mA each (60mA total at DKEY)
from an input voltage as low as 3.2V, so long as the LEDs have a forward voltage of 3.6V or less (room
temperature).
The statement above is a simple example of the LED drive capabilities of the LM27964. The statement contains
the key application parameters that are required to validate an LED-drive design using the LM27964: LED
current (ILEDx), number of active LEDs (Nx), LED forward voltage (VLED), and minimum input voltage (VIN-MIN).
The equation below can be used to estimate the maximum output current capability of the LM27964:
ILED_MAX = [(1.5 x VIN) - VLED - (IADDITIONAL × ROUT)] / [(Nx x ROUT) + kHRx]
ILED_MAX = [(1.5 x VIN ) - VLED - (IADDITIONAL × 2.75Ω)] / [(Nx x 2.75Ω) + kHRx]
(1)
(2)
IADDITIONAL is the additional current that could be delivered to the other LED banks.
ROUT – Output resistance. This parameter models the internal losses of the charge pump that result in voltage
droop at the pump output POUT. Since the magnitude of the voltage droop is proportional to the total output
current of the charge pump, the loss parameter is modeled as a resistance. The output resistance of the
LM27964 is typically 2.75Ω (VIN = 3.6V, TA = 25°C). In equation form:
VPOUT = (1.5 × VIN) – [(NA× ILEDA + NB × ILEDB + NK × ILEDK) × ROUT]
(3)
kHR – Headroom constant. This parameter models the minimum voltage required to be present across the current
sources for them to regulate properly. This minimum voltage is proportional to the programmed LED current, so
the constant has units of mV/mA. The typical kHR of the LM27964 is 12mV/mA. In equation form:
(VPOUT – VLEDx) > kHRx × ILEDx
Typical Headroom Constant Values
kHRA = 12mV/mA
kHRB = 12 mV/mA
kHRK = 3 mV/mA
(4)
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The "ILED-MAX" Equation 1 is obtained from combining the ROUT Equation 3 with the kHRx Equation 4 and solving
for ILEDx. Maximum LED current is highly dependent on minimum input voltage and LED forward voltage. Output
current capability can be increased by raising the minimum input voltage of the application, or by selecting an
LED with a lower forward voltage. Excessive power dissipation may also limit output current capability of an
application.
Total Output Current Capability
The maximum output current that can be drawn from the LM27964 is 180mA. Each driver bank has a maximum
allotted current per Dxx sink that must not be exceeded.
Table 2. Driver Bank Maximum Allotted Current per Dxx Sink
DRIVER TYPE
MAXIMUM Dxx CURRENT
DxA
30mA per DxA Pin
DxB
30mA per DxB Pin
DKEY
80mA
The 180mA load can be distributed in many different configurations. Special care must be taken when running
the LM27964 at the maximum output current to ensure proper functionality.
PARALLEL CONNECTED OUTPUTS
Outputs D1A-4A or D1B-D2B may be connected together to drive one or two LEDs at higher currents. In such a
configuration, all four parallel current sinks (BankA) of equal value can drive a single LED. The LED current
programmed for BankA should be chosen so that the current through each of the outputs is programmed to 25%
of the total desired LED current. For example, if 60mA is the desired drive current for a single LED, RSETA should
be selected such that the current through each of the current sink inputs is 15mA. Similarly, if two LEDs are to be
driven by pairing up the D1A-4A inputs (i.e D1A-2A, D3A-4A), RSETA should be selected such that the current
through each current sink input is 50% of the desired LED current. The same RSETx selection guidelines apply
to BankB diodes.
Connecting the outputs in parallel does not affect internal operation of the LM27964 and has no impact on the
Electrical Characteristics and limits previously presented. The available diode output current, maximum diode
voltage, and all other specifications provided in the Electrical Characteristics table apply to this parallel output
configuration, just as they do to the standard 4-LED application circuit.
Both BankA and BankB utilize LED forward voltage sensing circuitry on each Dxx pin to optimize the chargepump gain for maximum efficiency. Due to the nature of the sensing circuitry, it is not recommended to leave any
of the DxA or DxB pins unused if either diode bank is going to be used during normal operation. Leaving DxA
and/or DxB pins unconnected will force the charge-pump into 3/2× mode over the entire VIN range negating any
efficiency gain that could be achieve by switching to 1× mode at higher input voltages.
Care must be taken when selecting the proper RSETx value. The current on any Dxx pin must not exceed the
maximum current rating for any given current sink pin.
POWER EFFICIENCY
Efficiency of LED drivers is commonly taken to be the ratio of power consumed by the LEDs (PLED) to the power
drawn at the input of the part (PIN). With a 1.5x/1x charge pump, the input current is equal to the charge pump
gain times the output current (total LED current). The efficiency of the LM27964 can be predicted as follows:
PLEDTOTAL = (VLEDA × NA × ILEDA) + (VLEDB × NB × ILEDB) + (VLEDK × NK × ILEDK)
PIN = VIN × IIN
PIN = VIN × (GAIN × ILEDTOTAL + IQ)
E = (PLEDTOTAL ÷ PIN)
(5)
(6)
(7)
(8)
It is also worth noting that efficiency as defined here is in part dependent on LED voltage. Variation in LED
voltage does not affect power consumed by the circuit and typically does not relate to the brightness of the LED.
For an advanced analysis, it is recommended that power consumed by the circuit (VIN x IIN) be evaluated rather
than power efficiency.
14
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POWER DISSIPATION
The power dissipation (PDISS) and junction temperature (TJ) can be approximated with the equations below. PIN is
the power generated by the 1.5x/1x charge pump, PLED is the power consumed by the LEDs, TA is the ambient
temperature, and θJA is the junction-to-ambient thermal resistance for the WQFN-24 package. VIN is the input
voltage to the LM27964, VLED is the nominal LED forward voltage, N is the number of LEDs and ILED is the
programmed LED current.
PDISS = PIN - PLEDA - PLEDB - PLEDK
PDISS= (GAIN × VIN × ILEDA + LEDB + LEDK) - (VLEDA × NA × ILEDA) - (VLEDB × NB × ILEDB) - (VLEDK × NK × ILEDK)
TJ = TA + (PDISS x θJA)
(9)
(10)
(11)
The junction temperature rating takes precedence over the ambient temperature rating. The LM27964 may be
operated outside the ambient temperature rating, so long as the junction temperature of the device does not
exceed the maximum operating rating of 100°C. The maximum ambient temperature rating must be derated in
applications where high power dissipation and/or poor thermal resistance causes the junction temperature to
exceed 100°C.
THERMAL PROTECTION
Internal thermal protection circuitry disables the LM27964 when the junction temperature exceeds 170°C (typ.).
This feature protects the device from being damaged by high die temperatures that might otherwise result from
excessive power dissipation. The device will recover and operate normally when the junction temperature falls
below 165°C (typ.). It is important that the board layout provide good thermal conduction to keep the junction
temperature within the specified operating ratings.
CAPACITOR SELECTION
The LM27964 requires 4 external capacitors for proper operation (C1 = C2 = 1µF, CIN = COUT = 2.2µF). Surfacemount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very
low equivalent series resistance (ESR <20mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum
electrolytic capacitors are not recommended for use with the LM27964 due to their high ESR, as compared to
ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with
the LM27964. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over
temperature (X7R: ±15% over -55°C to 125°C; X5R: ±15% over -55°C to 85°C).
Capacitors with Y5V or Z5U temperature characteristic are generally not recommended for use with the
LM27964. Capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, 20%) and vary significantly over temperature (Y5V: +22%, -82% over -30°C to +85°C range; Z5U: +22%, -56%
over +10°C to +85°C range). Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a
capacitance of only 0.1µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet
the minimum capacitance requirements of the LM27964.
The minimum voltage rating acceptable for all capacitors is 6.3V. The recommended voltage rating of the output
capacitor is 10V to account for DC bias capacitance losses.
PCB LAYOUT CONSIDERATIONS
The WQFN is a leadframe based Chip Scale Package (CSP) with very good thermal properties. This package
has an exposed DAP (die attach pad) at the center of the package measuring 2.6mm x 2.5mm. The main
advantage of this exposed DAP is to offer lower thermal resistance when it is soldered to the thermal land on the
PCB. For PCB layout, TI highly recommends a 1:1 ratio between the package and the PCB thermal land. To
further enhance thermal conductivity, the PCB thermal land may include vias to a ground plane. For more
detailed instructions on mounting WQFN packages, see the TI AN-1187 Application Report (SNOA401).
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SNOSAL6D – MAY 2005 – REVISED MAY 2013
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REVISION HISTORY
Changes from Revision C (May 2013) to Revision D
•
16
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 15
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM27964SQ-A/NOPB
ACTIVE
WQFN
RTW
24
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
27964-A
LM27964SQ-C/NOPB
ACTIVE
WQFN
RTW
24
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
27964-C
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM27964SQ-A/NOPB
WQFN
RTW
24
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM27964SQ-C/NOPB
WQFN
RTW
24
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM27964SQ-A/NOPB
WQFN
RTW
24
1000
210.0
185.0
35.0
LM27964SQ-C/NOPB
WQFN
RTW
24
1000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
RTW0024A
SQA24A (Rev B)
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