JMNIC BF1202 2015 N-channel dual-gate polo mos-fet Datasheet

DISCRETE SEMICONDUCTORS
DATA SHEET
BF1202; BF1202R; BF1202WR
N-channel dual-gate PoLo
MOS-FETs
Product specification
Supersedes data of 1999 Dec 01
2000 Mar 29
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
PINNING
FEATURES
• Short channel transistor with high
forward transfer admittance to input
capacitance ratio
PIN
• Low noise gain controlled amplifier
• Partly internal self-biasing circuit to
ensure good cross-modulation
performance during AGC and good
DC stabilization.
DESCRIPTION
1
source
2
drain
3
gate 2
4
gate 1
handbook, 2 columns
3
4
2
1
Top view
MSB035
BF1202R marking code: LEp
APPLICATIONS
Fig.2
• VHF and UHF applications with
3 to 9 V supply voltage, such as
digital and analogue television
tuners and professional
communications equipment.
handbook, 2 columns
4
3
Simplified outline
(SOT143R).
page
3
4
2
1
DESCRIPTION
Enhancement type N-channel
field-effect transistor with source and
substrate interconnected. Integrated
diodes between gates and source
protect against excessive input
voltage surges. The BF1202,
BF1202R and BF1202WR are
encapsulated in the SOT143B,
SOT143R and SOT343R plastic
packages respectively.
1
2
Top view
Top view
MSB014
MSB842
BF1202 marking code: LDp
BF1202WR marking code: LE
Fig.1
Fig.3
Simplified outline
(SOT143B).
Simplified outline
(SOT343R).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
drain-source voltage
−
−
10
V
ID
drain current
−
−
30
mA
Ptot
total power dissipation
−
−
200
mW
yfs
forward transfer admittance
25
30
40
mS
Cig1-ss
input capacitance at gate 1
−
1.7
2.2
pF
Crss
reverse transfer capacitance
f = 1 MHz
−
15
30
fF
F
noise figure
f = 800 MHz
−
1.1
1.8
dB
Xmod
cross-modulation
input level for k = 1% at
40 dB AGC
100
105
−
dBµV
Tj
operating junction temperature
−
−
150
°C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
2000 Mar 29
2
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage
−
10
V
ID
drain current
−
30
mA
IG1
gate 1 current
−
±10
mA
IG2
gate 2 current
−
±10
mA
Ptot
total power dissipation
BF1202; BF1202R
Ts ≤ 113 °C; note 1
−
200
mW
BF1202WR
Ts ≤ 119 °C; note 1
−
200
mW
Tstg
storage temperature
−65
+150
°C
Tj
operating junction temperature
−
150
°C
Note
1. Ts is the temperature of the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
BF1202; BF1202R
185
K/W
BF1202WR
155
K/W
thermal resistance from junction to soldering point
Rth j-s
MCD951
250
Ptot
handbook, halfpage
(mW)
200
(2)
(1)
150
100
50
0
0
50
100
150
200
Ts (°C)
(1) BF1202WR.
(2) BF1202; BF1202R.
Fig.4 Power derating curve.
2000 Mar 29
3
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VG1-S = VG2-S = 0; ID = 10 µA
10
−
V
V(BR)G1-SS gate 1-source breakdown voltage
VG2-S = VDS = 0; IG1-S = 10 mA
6
−
V
V(BR)G2-SS gate 2-source breakdown voltage
VG1-S = VDS = 0; IG2-S = 10 mA
6
−
V
V(BR)DSS
drain-source breakdown voltage
V(F)S-G1
forward source-gate 1 voltage
VG2-S = VDS = 0; IS-G1 = 10 mA
0.5
1.5
V
V(F)S-G2
forward source-gate 2 voltage
VG1-S = VDS = 0; IS-G2 = 10 mA
0.5
1.5
V
VG1-S(th)
gate 1-source threshold voltage
VG2-S = 4 V; VDS = 5 V; ID = 100 µA
0.3
1.0
V
VG2-S(th)
gate 2-source threshold voltage
VG1-S = 5 V; VDS = 5 V; ID = 100 µA
0.3
1.2
V
IDSX
drain-source current
VG2-S = 4 V; VDS = 5 V; RG1 = 120 kΩ;
note 1
8
16
mA
IG1-SS
gate 1 cut-off current
VG2-S = VDS = 0; VG1-S = 5 V
−
50
nA
IG2-SS
gate 2 cut-off current
VG1-S = VDS = 0; VG2-S = 4 V
−
20
nA
Note
1. RG1 connects G1 to VGG = 5 V.
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VG2-S = 4 V; VDS = 5 V; ID = 12 mA; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
yfs
forward transfer admittance
pulsed; Tj = 25 °C
25
30
Cig1-ss
input capacitance at gate 1
f = 1 MHz
−
1.7
2.2
pF
Cig2-ss
input capacitance at gate 2
f = 1 MHz
−
1
−
pF
Coss
output capacitance
f = 1 MHz
−
0.85
−
pF
Crss
reverse transfer capacitance f = 1 MHz
−
15
30
fF
F
noise figure
Gtr
Xmod
power gain
cross-modulation
mS
f = 10.7 MHz; GS = 20 mS; BS = 0
−
9
11
dB
f = 400 MHz; YS = YS opt
−
0.9
1.5
dB
f = 800 MHz; YS = YS opt
−
1.1
1.8
dB
f = 200 MHz; GS = 2 mS; BS = BS opt;
GL = 0.5 mS; BL = BL opt
−
34.5
−
dB
f = 400 MHz; GS = 2 mS; BS = BS opt;
GL = 1 mS; BL = BL opt
−
30.5
−
dB
f = 800 MHz; GS = 3.3 mS; BS = BS opt;
GL = 1 mS; BL = BL opt
−
26.5
−
dB
90
−
−
dBµV
input level for k = 1%; fw = 50 MHz;
funw = 60 MHz; note 1
at 0 dB AGC
at 10 dB AGC
−
92
−
dBµV
at 40 dB AGC
100
105
−
dBµV
Note
1. Measured in Fig.21 test circuit.
2000 Mar 29
40
4
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
MCD952
20
handbook, halfpage
VG2-S = 4 V
ID
(mA)
2.5 V
2V
3V
VG1-S = 1.5 V
ID
(mA)
3.5 V
16
MCD953
24
handbook, halfpage
1.4 V
16
12
1.3 V
1.2 V
1.5 V
8
1.1 V
8
1V
4
0.9 V
1V
0
0.4
0
0.8
1.2
0
1.6
2
VG1-S (V)
0
VDS = 5 V.
Tj = 25 °C.
2
4
6
8
10
VDS (V)
VG2-S = 4 V.
Tj = 25 °C.
Fig.5 Transfer characteristics; typical values.
Fig.6 Output characteristics; typical values.
MCD954
100
handbook, halfpage
VG2-S = 4 V
IG1
(µA)
MCD955
40
handbook, halfpage
3.5 V
3.5 V
yfs
3V
VG2-S = 4 V
(mS)
80
30
3V
60
2.5 V
20
2.5 V
40
2V
10
20
2V
1.5 V
1V
0
0
0.5
0
1
1.5
2
2.5
VG1-S (V)
0
4
VDS = 5 V.
Tj = 25 °C.
VDS = 5 V.
Tj = 25 °C.
Fig.7
Fig.8
Gate 1 current as a function of gate 1
voltage; typical values.
2000 Mar 29
5
8
12
16
20
ID (mA)
Forward transfer admittance as a function
of drain current; typical values.
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
MCD956
20
MCD957
16
handbook, halfpage
handbook, halfpage
ID
(mA)
ID
(mA)
16
12
12
8
8
4
4
0
10
0
20
30
0
40
50
IG1 (µA)
0
2
3
4
5
VGG (V)
VDS = 5 V; VG2-S = 4 V; Tj = 25 °C.
RG1 = 120 kΩ (connected to VGG); see Fig.21.
VDS = 5 V; VG2-S = 4 V.
Tj = 25 °C.
Fig.9
1
Drain current as a function of gate 1 current;
typical values.
Fig.10 Drain current as a function of gate 1 supply
voltage (= VGG); typical values.
MCD958
20
handbook, halfpage
ID
(mA)
RG1 = 68 kΩ
16
82 kΩ
MCD959
16
handbook, halfpage
ID
(mA)
VGG = 5 V
4.5 V
12
4V
100 kΩ
12
120 kΩ
3.5 V
150 kΩ
3V
8
180 kΩ
8
220 kΩ
4
4
0
0
0
2
4
0
6
VGG = VDS (V)
2
4
VG2-S (V)
VG2-S = 4 V; Tj = 25 °C.
RG1 connected to VGG; see Fig.21.
VDS = 5 V; Tj = 25 °C.
RG1 = 120 kΩ (connected to VGG); see Fig.21.
Fig.11 Drain current as a function of gate 1 (= VGG)
and drain supply voltage; typical values.
Fig.12 Drain current as a function of gate 2
voltage; typical values.
2000 Mar 29
6
6
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
MCD960
40
MCD961
0
handbook, halfpage
handbook,
gain halfpage
IG1
(µA)
reduction
(dB)
−10
VGG = 5 V
30
4.5 V
−20
4V
20
3.5 V
3V
−30
10
−40
−50
0
0
2
4
VG2-S (V)
6
0
1
2
3
VAGC (V)
4
VDS = 5 V; Tj = 25 °C.
RG1 = 120 kΩ (connected to VGG); see Fig.21.
VDS = 5 V; VGG = 5 V; RG1 = 120 kΩ;
f = 50 MHz; Tamb = 25 °C.
Fig.13 Gate 1 current as a function of gate 2
voltage; typical values.
Fig.14 Typical gain reduction as a function of the
AGC voltage; see Fig.21.
MCD962
120
handbook, halfpage
MCD963
16
handbook, halfpage
Vunw
(dBµV)
ID
(mA)
110
12
100
8
90
4
80
0
10
20
30
40
50
gain reduction (dB)
0
0
VDS = 5 V; VGG = 5 V; RG1 = 120 kΩ;
f= 50 MHz; funw = 60 MHz; Tamb = 25 °C.
20
30
40
50
gain reduction (dB)
VDS = 5 V; VGG = 5 V; RG1 = 120 kΩ;
f = 50 MHz; Tamb = 25 °C.
Fig.15 Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; Fig.21.
2000 Mar 29
10
Fig.16 Drain current as a function of gain
reduction; typical values; see Fig.21.
7
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
MCD964
102
handbook, halfpage
MCD965
103
handbook, halfpage
Yis
(mS)
ϕrs
(deg)
yrs
(µS)
10
−103
ϕrs
102
−102
bis
yrs
gis
1
10−1
10
−10
10
102
103
1
10
f (GHz)
−1
103
102
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 12 mA; Tamb = 25 °C.
VDS = 5 V; VG2 = 4 V.
ID = 12 mA; Tamb = 25 °C.
Fig.17 Input admittance as a function of frequency;
typical values.
Fig.18 Reverse transfer admittance and phase as
a function of frequency; typical values.
MCD966
102
handbook, halfpage
yfs
(mS)
−102
ϕfs
(deg)
yfs
MCD967
10
handbook, halfpage
Yos
(mS)
bos
1
−10
10
ϕfs
1
10
102
10−1
f (MHz)
−1
103
10−2
10
gos
102
103
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 12 mA; Tamb = 25 °C.
VDS = 5 V; VG2 = 4 V.
ID = 12 mA; Tamb = 25 °C.
Fig.19 Forward transfer admittance and phase as
a function of frequency; typical values.
Fig.20 Output admittance as a function of
frequency; typical values.
2000 Mar 29
8
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
VAGC
handbook, full pagewidth
R1
10 kΩ
C1
4.7 nF
C3
4.7 nF
RGEN
50 Ω
R2
50 Ω
RL
50 Ω
L1
C2
≈ 2.2 µH
DUT
C4
4.7 nF
RG1
4.7 nF
VGG
VI
VDS
MGS315
Fig.21 Cross-modulation test set-up.
Table 1
f
(MHz)
Scattering parameters: VDS = 5 V; VG2-S = 4 V; ID = 12 mA; Tamb = 25 °C
s21
s11
s12
s22
MAGNITUDE
(ratio)
ANGLE
(deg)
MAGNITUDE
(ratio)
ANGLE
(deg)
MAGNITUDE
(ratio)
ANGLE
(deg)
MAGNITUDE
(ratio)
ANGLE
(deg)
50
0.988
−3.26
2.989
176.2
0.0005
92.6
0.995
−1.50
100
0.988
−6.52
3.017
172.5
0.0009
88.0
0.995
−3.01
200
0.984
−12.99
2.990
165.0
0.0018
82.5
0.994
−5.95
300
0.977
−19.39
2.949
157.6
0.0027
78.2
0.992
−8.86
400
0.965
−25.65
2.913
150.3
0.0036
75.4
0.990
−11.79
500
0.951
−31.76
2.853
143.2
0.0039
71.8
0.988
−14.65
600
0.936
−37.68
2.793
136.3
0.0042
69.9
0.986
−17.41
700
0.919
−43.42
2.727
129.5
0.0044
68.9
0.984
−20.10
800
0.903
−48.94
2.664
123.0
0.0043
68.5
0.980
−22.69
900
0.887
−54.25
2.593
116.7
0.0041
70.7
0.975
−25.27
1000
0.870
−59.34
2.518
110.5
0.0038
72.4
0.970
−27.90
Table 2
Noise data: VDS = 5 V; VG2-S = 4 V; ID = 12 mA; Tamb = 25 °C
Γopt
f
(MHz)
Fmin
(dB)
(ratio)
(deg)
Rn
(Ω)
400
0.9
0.805
28.5
50
800
1.1
0.725
47.2
40
2000 Mar 29
9
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
PACKAGE OUTLINES
Plastic surface mounted package; 4 leads
SOT143B
D
B
E
A
X
y
HE
v M A
e
bp
w M B
4
3
Q
A
A1
c
1
2
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.1
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
1.9
1.7
2.5
2.1
0.45
0.15
0.55
0.45
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-02-28
SOT143B
2000 Mar 29
EUROPEAN
PROJECTION
10
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
Plastic surface mounted package; reverse pinning; 4 leads
D
SOT143R
B
E
A
X
y
HE
v M A
e
bp
w M B
3
4
Q
A
A1
c
2
1
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.1
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
1.9
1.7
2.5
2.1
0.55
0.25
0.45
0.25
0.2
0.1
0.1
OUTLINE
VERSION
SOT143R
2000 Mar 29
REFERENCES
IEC
JEDEC
EIAJ
SC-61B
11
EUROPEAN
PROJECTION
ISSUE DATE
97-03-10
99-09-13
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
Plastic surface mounted package; reverse pinning; 4 leads
D
SOT343R
E
B
A
X
HE
y
v M A
e
3
4
Q
A
A1
c
2
w M B
1
bp
Lp
b1
e1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.4
0.3
0.7
0.5
0.25
0.10
2.2
1.8
1.35
1.15
1.3
1.15
2.2
2.0
0.45
0.15
0.23
0.13
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-05-21
SOT343R
2000 Mar 29
EUROPEAN
PROJECTION
12
Philips Semiconductors
Product specification
BF1202; BF1202R;
BF1202WR
N-channel dual-gate PoLo MOS-FETs
DATA SHEET STATUS
DATA SHEET STATUS
PRODUCT
STATUS
DEFINITIONS (1)
Objective specification
Development
This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification
Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Mar 29
13
Philips Semiconductors
Product specification
N-channel dual-gate PoLo MOS-FETs
NOTES
2000 Mar 29
14
BF1202; BF1202R;
BF1202WR
Philips Semiconductors
Product specification
N-channel dual-gate PoLo MOS-FETs
NOTES
2000 Mar 29
15
BF1202; BF1202R;
BF1202WR
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Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
SCA 69
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
603504/02/pp16
Date of release: 2000
Mar 29
Document order number:
9397 750 06902