IRF IRUH330125BKA Radiation hardended ultra low dropout fixed positive linear regulator Datasheet

PD-97593B
(5962F1023505K)
IRUH330133BK
Radiation Hardended Ultra Low Dropout
IRUH330133BP
Fixed Positive Linear Regulator
+5.0VIN to +3.3VOUT @3.0A
Product Summary
Part Number
IRUH330133BK
IRUH330133BP
Dropout
IO
VIN
VOUT
0.4V
3.0A
5.0V
3.3V
MO-078AA
Features
Description
The IRUH330133 is a space qualified, ultra low dropout
linear regulator designed specifically for applications
requiring high reliability, low noise and radiation hardness.
n Silicon On Insulator (SOI) CMOS Regulator
n
n
n
n
n
n
n
n
n
n
Absolute Maximum Ratings
Parameter
Power Dissipation @ TC = 125°C
Maximum Output Current @ Maximum
IC, CMOS Latch-Up Immune,
Inherently Rad Hard
Total Dose Capability up to 300Krads(Si)
(Condition A); Tested to 500Krad (Si)
ELDRS up to 100Krad(Si) (Condition D)
SEU Immune up to LET = 80 MeV*cm2/mg
Space Level Screened
Fast Transient Response
Timed Latch-Off Over-Current Protection
Internal Thermal Protection
On/Off Control via Shutdown Pin, Power
Sequencing Easily Implemented
Isolated Hermetic MO-078 Package
Ensures Higher Reliability
This part is also available in 8-Lead Flat Pack
Package as IRUH330133AK / IRUH330133AP
Symbol
Min.
Max.
Units
PD
-
25
W
A
Power Dissipation with no Derating
Non-Operating Input Voltage
IO
-
See Fig 4
VIN
-0.3
+8.0
Operating Input Voltage
VIN
2.9
6.4
GND
VSHDN
-0.3
-0.3
0.3
VIN + 0.3
Ground
Shutdown Pin Voltage
VOUT
-0.3
VIN + 0.3
Operating Case Temperature Range
TO
-55
+140
Storage Temperature Range
TS
-65
+150
Maximmum Junction Temperature
TJ
-
+150
TL
RTHJC
-
+300
1.0
Output Pin Voltage
Lead Temperature (Soldering 10sec)
Pass Transistor Thermal Resistance, Junction to Case
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V
°C
°C/W
1
05/18/12
IRUH330133BK
IRUH330133BP
Electrical Characteristics c
Pre-Radiation @TC = 25°C, VIN = 5.0V (Unless Otherwise Specified)
Parameter
Output Voltage
Test Conditions
Symbol
3.8V ≤ V IN ≤ 5.8V, 50mA ≤ IOUT ≤ 3.0A
3.8V ≤ V IN ≤ 5.8V, 50mA ≤ IOUT ≤ 3.0A,
c
-55°C to +125°C
3.8V ≤ V IN ≤ 5.8V, 50mA ≤ IOUT ≤ 3.0A,
c
IO = 3.0A, VOUT = 3.3V, -55°C to +125°C,
Post -Rad
Over-Current Latching, -55°C to +125°C,
Current Limit
Over-Current Time-to-Latch
d
Post -Rad
IO > ILATCH
Maximum Shutdown Temp.
d
Ripple Rejection
VSENSE Pin Current
d
F= 120Hz, IO = 50mA, -55°C to +125°C
F= 120Hz, IO = 50mA, Post -Rad
Minimum SHDN Pin "On"
-55°C to +125°C
ISOURCE = 200µA, -55°C to +125°C
Threshold Voltage
Maximum SHDN Pin "Off"
Post -Rad
ISOURCE = 200µA, -55°C to +125°C
Threshold Voltage
Post -Rad
RLOAD = 36 Ohms, VSHDN = 5.0V
Output Voltage at Shutdown
SHDN Pin Leakage Current
d
d
Power On Reset Threshold d
Quiescent Current d
SHDN Pin Pull-Up Current
-55°C to +125°C, Post-Rad
VSHDN = 3.3V, -55°C to +125°C,Post-Rad
3.349
3.201
3.3
3.399
3.184
3.3
3.366
VDROP
-
-
0.4
V
ILATCH
3.5
-
-
A
VOUT
tLATCH
-
10
-
ms
125
65
140
-
-
°C
40
-
-
ISENSE
-
1.6
-
mA
VSHDN
-
-
0.8
V
VSHDN
1.2
-
-
V
VOUT
-0.1
-
0.1
V
ISHDN
-10
-
10
µA
-98
-
-56
-140
-98
-
1.7
-30
-56
µA
-
15
V
-
-
90
PSRR
ISHDN
VSHDN = 0.4V, Post-Rad
Sweep VIN and Measure Output
VT-POR
Full Load
V
TLATCH
VSHDN = 0.4V
VSHDN = 0.4V, -55°C to +125°C
No Load
Typ. Max. Units
3.3
Post -Rad
Dropout Voltage
Min.
3.250
IQ
dB
mA
Notes:
 Connected as shown in Fig.1 and measured at the junction of VOUT and VSENSE Pins.
‚ Under normal closed-loop operation. Guaranteed by design. Not tested in production.
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IRUH330133BK
IRUH330133BP
Radiation Performance Characteristics
Test
Conditions
Min
Typ
MIL-STD-883, Method 1019 (Condition A)
Total Ionizing Dose (Gamma)
Operating Bias applied during exposure
Unit
300
500
c
Krads (Si)
100
See
d
Krads (Si)
Minimum Rated Load, Vin = 6.4V
MIL-STD-883, Method 1019 (Condition D)
Total Ionizing Dose (Gamma)
(ELDRS) Operating Bias applied during
exposure Minimum Rated Load, Vin = 6.4V
Single Event effects
Heavy Ions (LET)
SEU, SEL, SEGR, SEB
Operating Bias applied during exposure
2
84
MeV*cm /mg
under varying operating conditions
Neutron Fluence
MIL-STD-883, Method 1017
1.0e
11
2
Neutrons/cm
Notes:
 Tested to 500Krad (Si).
‚ See Fig. 5.
Space Level Screening Requirements
TEST/INSPECTION
SCREENING LEVEL
MIL-STD-883
SPACE
METHOD
Nondestructive Bond Pull
100%
2023
Internal Visual
100%
2017
Seal
100%
1014
Temperature Cycle
100%
1010
Constant Acceleration
100%
2001
Mechanical Shock
100%
2002
PIND
100%
2020
Pre Burn-In-Electrical
100%
Burn-In
100%
Final Electrical
100%
Radiographic
External Visual
100%
100%
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1015
2012
2009
3
IRUH330133BK
IRUH330133BP
Application Information
Input
Voltage
0.1uF and 1uF
Ceramic;
Two 100uF
Low ESR
Tantalum
Output
Voltage
VOUT
VIN
IRUH3301xxxx
0.1uF and 1uF
Ceramic;
Two 100uF
Low ESR
Tantalum
V SENSE
SHDN
GND
Fig. 1. Typical Regulator Circuit; Note the SHDN Pin is hardwired in the “ON” position.
The VSENSE Pin is connected as noted in the “General Layout Rules” section.
Over-Current & Over-Temperature Protection
The IRUH3301 series provides over-current protection by means of a timed latch function. Drive
current to the internal PNP pass transistor is limited by an internal resistor (Rb in Fig. 3) between
the base of the transistor and the control IC drive FET. If an over-current condition forces the
voltage across this resistor to exceed 0.5V (nom), the latch feature will be triggered. The time-tolatch (tLATCH) is nominally 10ms. If the over-current condition exists for less than tLATCH , the latch
will not be set. If the latch is set the drive current to the PNP pass transistor will be disabled. The
latch will remain set until one of the following actions occur:
1. The SHDN Pin voltage is brought above 1.2V and then lowered below 0.8V.
2. The VIN Pin voltage is lowered below 1.7V.
If the junction temperature of the regulator IC exceeds 140°C nominal, the thermal shutdown circuit
will set the internal latch and disable the drive current to the PNP pass transistor as described
above. After the junction temperature falls below a nominal 125°C, the latch can be reset using
either of the actions described above.
Under-Voltage Lock-Out
The under-voltage lock-out (UVLO) function prevents operation when VIN is less than 1.7V
(nominal). There is a nominal 100mV hysteresis about this point.
Input Voltage Range
The device control functions fully when VIN is greater than 2.8V. The device enters into undervoltage lock-out when VIN < 1.7V (nominal). When 1.7V (nominal) < VIN < 3.7V, VOUT will track VIN
and overshoot may occur. A larger output capacitor should be used to slow down the VOUT rise rate
for slow VIN ramp applications.
Shutdown (SHDN)
The regulator can be shutdown by applying a voltage of >1.2V to the SHDN Pin. The regulator will
restart when the SHDN Pin is pulled below the shutdown threshold of 0.8V. If the remote shutdown
feature is not required, the SHDN Pin should be connected to GND.
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IRUH330133BK
IRUH330133BP
Input Capacitance
Input bypass capacitors: Two (0.1µF and 1µF) ceramics and two 100µF low ESR tantalums (AVX
TPS or equivalent), placed very close to the VIN Pin are required for proper operation. When the
input voltage supply capacitance is more than 4 inches from the device, additional input
capacitance is recommended. Larger input capacitor values will improve ripple rejection further
improving the integrity of the output voltage.
Output Capacitance
Output bypass capacitors: Two (0.1µF and 1µF) ceramics and two 100µF low ESR tantalums
(AVX TPS or equivalent) are required for loop stability. Faster transient performance can be
achieved with multiple additional 1µF ceramic capacitors. Ceramic capacitors greater than 1µF in
value are not recommended as they can cause stability issues.
Tantalum capacitor values larger than the suggested value are recommended to improve the
transient response under large load current changes. The upper capacitance value limit is
governed by the delayed over-current latch function of the regulator and can be as much as
10,000µF without causing the device to latch-off during start-up.
General Layout Rules
Low impedance connections between the regulator output and load are essential. Solid power and
ground planes are highly recommended. In those cases where the board impedances are not kept
very small, oscillations can occur due to the effect of parasitic series resistance and inductance
on loop bandwidth and phase margin.
The VSENSE Pin must be connected directly to the VOUT Pin using as short a trace as possible with
the connection inside the first bypass capacitor (see Fig. 2a).
Connect ceramic output capacitors directly across the VOUT and GND Pins with as wide a trace as
design rules allow (see Fig. 2a). Avoid the use of vias for these capacitors and avoid loops. Fig.2
shows the ceramic capacitors tied directly to the regulator output.
The input capacitors should be connected as close a possible to the VIN Pin.
Fig. 2a. Layer 1 conductor.
Fig. 2b. Layer 1 silkscreen
Ground plane below layer 1
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IRUH330133BK
IRUH330133BP
VSENSE
VIN
VOUT
Input
Undervoltage
detect
SHDN
Thermal
Shutdown
Rb
Shutdown
& Over
Current
Latch
Disable
Error
Amp
+
Latch
Timing
capacitor
VREF
GND
Fig. 3. Simplified Schematic Circuit
Maximum Output Current (A) with no derating at Maximum Dissipation
4.0
Output Current (A)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
110
120
130
140
150
160
170
Mounting Surface Temperature (’C)
Fig. 4. Maximum Output Current versus Mounting Surface Temperature with no Derating at Maximum
Dissipation
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IRUH330133BK
IRUH330133BP
VOut
Delta-VOut (%)
0.500%
0.250%
ELDRS
0.000%
TID
-0.250%
-0.500%
1
10
100
1000
10000
100000
Total Dose (Rad (Si))
Fig. 5. Change in Output Voltage vs. Total Ionizing Dose Radiation Exposure at Both High and Low Dose Rates
PSRR (Typical)
100
90
PSRR (dB)
80
70
60
50
40
30
20
10
0
0.1
1
10
100
1000
Freq (KHz)
Recomended Layout and Capcitors, No IRUH
Iout=100mA & 1.6A, 3.3Vout, 4.5Vin
Fig. 6. Typical Power Supply Ripple Rejection at 100mA and 1.6A using recommended layout
and capacitors. Results above 10KHz are influenced by testing setup and layout.
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IRUH330133BK
IRUH330133BP
Fig 7. Case Outline and Dimensions - MO-078AA (Lead Form Down)
Pin Assignment
Pin #
Pin Description
1
VIN
2
3
GND
VOUT
4
5
SHUTDOWN
VSENSE
Note:
1) All dimensions are in inches
Warning: This Product contains BeO
Fig 8. Case Outline and Dimensions - MO-078AA (Lead Form Up)
Pin Assignment
Pin #
Pin Description
1
VIN
2
3
GND
VOUT
4
5
SHUTDOWN
VSENSE
Note:
1) All dimensions are in inches
Warning: This Product contains BeO
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IRUH330133BK
IRUH330133BP
Fig 9. Case Outline and Dimensions - MO-078AA (Lead Trimmed)
Pin Assignment
Pin #
Pin Description
1
VIN
2
3
GND
VOUT
4
5
SHUTDOWN
VSENSE
Note:
1) All dimensions are in inches
Warning: This Product contains BeO
Part Numbering Nomenclature
IR U H3 301 33 B K
Linear Regulator
U = Ultra Low Dropout Regulator
Radiation Hardening
H3 = 300 Krads
Device indicator
301 = 3 Amp Positive Regulator
Lead Form Options
A = Lead Form Down (Fig. 7)
B = Lead Form Up (Fig. 8)
Blank = Lead Trimmed (Fig. 9)
Screening Level
P = Unscreened. 25°C
Electrical Test Not for Qualification
K = Class K per MIL-PRF-38534
Output Voltage
18 = 1.8V
25 = 2.5V
33 = 3.3V
A1 = Adjustable Optimized for 3.3 V Input
A2 = Adjustable Optimized for 5.0V Input
Package Type
B = MO-078AA
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 05/2012
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