Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 1/9 CYStech Electronics Corp. -20V P-Channel Enhancement Mode MOSFET MTP1067N3 BVDSS ID @ VGS=-10V, TA=25°C RDSON@VGS=-4.5V, ID=-1A RDSON@VGS=-2.5V, ID=-1A -20V -1.4A 102mΩ(typ) 138mΩ(typ) Features • Compact and low profile SOT-23 package • Advanced trench process technology • High density cell design for ultra low on resistance • Pb-free lead plating package Symbol Outline SOT-23 MTP1067N3 D G：Gate S：Source D：Drain S G Ordering Information Device MTP1067N3-0-T1-G Package SOT-23 (Pb-free lead plating and halogen-free package) Shipping 3000 pcs / tape & reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T1 : 3000 pcs / tape & reel, 7” reel Product rank, zero for no rank products Product name MTP1067N3 CYStek Product Specification Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 2/9 CYStech Electronics Corp. Absolute Maximum Ratings (Ta=25°C) Symbol VDS VGS Unit IDM PD Limits -20 ±12 -1.4 -1.1 -6.0 0.4 Tj ; Tstg 0.003 -55~+150 W/°C °C Symbol Limit Unit Thermal Resistance, Junction-to-Ambient RθJA 312 Thermal Resistance, Junction-to-Case , max RθJC 150 Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TA=25°C , VGS=-4.5V Continuous Drain Current @ TA=70°C, VGS=-4.5V Pulsed Drain Current (Notes 1, 2) ID Maximum Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range V A W Note : 1. Pulse width limited by maximum junction temperature. 2. Pulse width≤ 100μs, duty cycle≤5%. Thermal Performance Parameter °C/W Electrical Characteristics (Tj=25°C, unless otherwise noted) Symbol Static BVDSS ∆BVDSS/∆Tj VGS(th) IGSS IDSS *RDS(ON) *GFS Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf MTP1067N3 Min. Typ. Max. Unit -20 -0.4 - 0.01 102 138 2.8 -1.0 ±100 -1 -10 145 200 - V V/°C V nA - 4.1 1.2 1.1 2.8 17 29.2 3.8 - Test Conditions S VGS=0V, ID=-250μA Reference to 25°C, ID=-250μA VDS=VGS, ID=-250μA VGS=±12V, VDS=0V VDS=-20V, VGS=0V VDS=-20V, VGS=0V (Tj=55°C) VGS=-4.5V, ID=-1A VDS=-2.5V, ID=-1A VDS=-10V, ID=-1A nC VDS=-16V, ID=-1.5A, VGS=-4V ns VDS=-5V, ID=-1A, VGS=-5V, RG=6Ω μA mΩ CYStek Product Specification CYStech Electronics Corp. Ciss Coss Crss Source-Drain Diode *VSD trr ta tb Qrr - 350 55 41 - - -0.82 5.4 3 2.4 1.7 -1.2 - pF V ns Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 3/9 VDS=-5V, VGS=0V, f=1MHz VGS=0V, IS=-0.63A VGS=0V, IF=-1A, dIF/dt=100A/μs nC *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% Recommended Soldering Footprint MTP1067N3 CYStek Product Specification Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 4/9 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 -BVDSS, Normalized Drain-Source Breakdown Voltage 6 10V,9V,8V,7V,6V,5V,4.5V,4V,3.5V,3V,2.5V -I D, Drain Current(A) 5 4 -VGS=2V 3 2 1 1.2 1.0 0.8 0.6 ID=-250μA, VGS=0V 0.4 0 0 1 2 3 4 -VDS, Drain-Source Voltage(V) -75 -50 -25 5 Static Drain-Source On-State resistance vs Drain Current Reverse Drain Current vs Source-Drain Voltage 1.2 180 160 -VSD, Source-Drain Voltage(V) RDS(ON), Static Drain-Source On-State Resistance(mΩ) 200 VGS=-2.5V 140 120 100 80 VGS=-3V 60 VGS=-4.5V 40 Tj=25°C VGS=0V 1.0 0.8 Tj=150°C 0.6 0.4 20 0.2 0 0.01 0.1 1 -ID, Drain Current(A) 0 10 1 2 3 4 5 -IDR , Reverse Drain Current(A) 6 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 500 2.0 400 R DS(ON) , Normalized Static DrainSource On-State Resistance R DS(ON), Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) ID=-1A 300 200 100 ID=-0.5A 1.8 VGS=-4.5V, ID=-1A 1.6 1.4 1.2 1.0 0.8 0.6 RDS(ON) @Tj=25°C : 102 mΩ typ 0.4 0 0 MTP1067N3 2 4 6 8 -VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 5/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage -VGS(th), Normalized Threshold Voltage 1000 Capacitance---(pF) Ciss 100 C oss f=1MHz Crss 1.4 1.2 ID=-1mA 1.0 0.8 0.6 ID=-250μA 0.4 0.2 10 0 5 10 15 -VDS, Drain-Source Voltage(V) -75 -50 -25 20 Gate Charge Characteristics Maximum Safe Operating Area 10 10 100μs 1 -VGS, Gate-Source Voltage(V) -I D, Drain Current (A) RDS(ON) Limited 1ms 10ms 0.1 TA=25°C, Tj=150°C, VGS=-4.5V, RθJA=312°C/W, single pulse 100ms 1s DC 8 6 4 VDS=-16V 2 ID=-1.5A 0 0.01 0.1 1 10 -VDS, Drain-Source Voltage(V) 0 100 Maximum Drain Current vs Junction Temperature 2 4 6 8 Qg, Total Gate Charge(nC) 10 Typical Transfer Characteristics 6 1.8 VDS=-5V 1.6 5 1.4 -ID, Drain Current(A) -I D, Maximum Drain Current(A) 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) 1.2 1 0.8 0.6 0.4 VGS=-4.5V, Tj(max)=150°C, RθJA=312°C/W, single pulse 0.2 4 3 2 1 0 0 25 MTP1067N3 50 75 100 125 150 Tj, Junction Temperature(°C) 175 0 1 2 3 4 5 -VGS, Gate-Source Voltage(V) CYStek Product Specification Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 6/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Forward Transfer Admittance vs Drain Current Power Derating Curve 0.5 PD, Power Dissipation(W) GFS , Forward Transfer Admittance(S) 10 1 0.1 VDS=-10V Pulsed Ta=25°C 0.4 0.3 0.2 0.1 0 0.01 0.001 0.01 0.1 1 -ID, Drain Current(A) 10 0 25 50 75 100 125 150 TA, Ambient Temperature(℃) 175 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.2 0.1 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TA=PDM*RθJA(t) 4.RθJA=312°C/W 0.1 0.05 0.02 0.01 0.01 Single Pulse 0.001 1.E-04 MTP1067N3 1.E-03 1.E-02 1.E-01 1.E+00 t1, Square Wave Pulse Duration(s) 1.E+01 1.E+02 1.E+03 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 7/9 Reel Dimension Carrier Tape Dimension MTP1067N3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 8/9 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note :1. All temperatures refer to topside of the package, measured on the package body surface. 2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care should be taken to match the coefficients of thermal expansion between components and PCB. If they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools. MTP1067N3 CYStek Product Specification Spec. No. : C962N3 Issued Date : 2017.03.09 Revised Date : Page No. : 9/9 CYStech Electronics Corp. SOT-23 Dimension Marking: TE 1067 Device Code XX Date Code 3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 Style: Pin 1.Gate 2.Source 3.Drain Inches Min. Max. 0.1102 0.1204 0.0472 0.0669 0.0335 0.0512 0.0118 0.0197 0.0669 0.0910 0.0000 0.0040 DIM A B C D G H Millimeters Min. Max. 2.80 3.04 1.20 1.70 0.89 1.30 0.30 0.50 1.70 2.30 0.00 0.10 DIM J K L S V L1 Inches Min. Max. 0.0032 0.0079 0.0118 0.0266 0.0335 0.0453 0.0830 0.1161 0.0098 0.0256 0.0118 0.0197 Millimeters Min. Max. 0.08 0.20 0.30 0.67 0.85 1.15 2.10 2.95 0.25 0.65 0.30 0.50 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTP1067N3 CYStek Product Specification