Fairchild FJV3102RMTF Npn epitaxial silicon transistor with bias resistor Datasheet

FJV3102R
NPN Epitaxial Silicon Transistor with Bias Resistor
Features
Description
• 100 mA Output Current Capability
• Built-in Bias Resistor (R1 = 10 kΩ, R2 = 10 kΩ)
Transistors with built-in resistors can be excellent
space- and cost-saving solutions by reducing component count and simplifying circuit design.
Application
• Switching, Interface, and Driver Circuits
• Inverters
• Digital Applications in Industrial Segments
Equivalent Circuit
C
3
R1
B
2
1
R2
SOT-23
1. Base 2. Emitter 3. Collector
E
Ordering Information
Part Number
Top Mark
Package
Packing Method
FJV3102RMTF
R22
SOT-23 3L
Tape and Reel
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Value
Unit
VCBO
Collector-Base Voltage
50
V
VCEO
Collector-Emitter Voltage
50
V
VEBO
Emitter-Base Voltage
10
V
IC
Collector Current
100
mA
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
-55 to 150
°C
© 2002 Fairchild Semiconductor Corporation
FJV3102R Rev. 1.1.2
www.fairchildsemi.com
1
FJV3102R — NPN Epitaxial Silicon Transistor with Bias Resistor
November 2013
Values are at TA = 25°C unless otherwise noted.
Symbol
PD
RθJA
Value
Unit
Power Dissipation
Parameter
200
mW
Derate Above TA = 25°C
1.60
mW/°C
Thermal Resistance, Junction to Ambient
625
°C/W
Note:
1. FR-4 76 x 114 x 0.6T mm3 (3.0 inch x 4.5 inch x 0.062 inch) with minimum land pattern size.
Electrical Characteristics
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
BVCBO
Collector-Base Breakdown Voltage
IC = 10 μA, IE = 0
50
V
BVCEO
Collector-Emitter Breakdown Voltage
IC = 100 μA, IB = 0
50
V
ICBO
Collector Cut-Off Current
VCB = 40 V, IE = 0
hFE
DC Current Gain
VCE = 5 V, IC = 5 mA
Collector-Emitter Saturation Voltage
IC = 10 mA, IB = 0.5 mA
VCE(sat)
fT
0.1
μA
0.3
V
30
Current Gain Bandwidth Product
VCE = 10 V, IC = 5 mA
250
MHz
Output Capacitance
VCB = 10 V, IE = 0,
f = 1.0 MHz
3.7
pF
VI(off)
Input-Off Voltage
VCE = 5 V, IC = 100 μA
VI(on)
Input-On Voltage
VCE = 0.3 V, IC = 10 mA
Cob
0.5
V
kΩ
3
V
R1
Input Resistor
7
10
13
R1/R2
Resistor Ratio
0.9
1.0
1.1
© 2002 Fairchild Semiconductor Corporation
FJV3102R Rev. 1.1.2
www.fairchildsemi.com
2
FJV3102R — NPN Epitaxial Silicon Transistor with Bias Resistor
Thermal Characteristics(1)
100
1000
VCE =0.3V
R1 = 10 K
R2 = 10 K
VI(on)[V], INPUT VOLTAGE
hFE, DC CURRENT GAIN
VCE = 5V
R1 = 10K
R2 = 10K
100
10
1
10
100
10
1
0.1
0.1
1000
1
IC[mA], COLLECTOR CURRENT
280
VCE = 5V
R1 = 10K
R2 = 10K
240
100
10
0.0
0.4
0.8
1.2
1.6
2.0
200
160
120
80
40
0
2.4
0
25
50
75
100
125
150
175
o
TA[ C], AMBIENT TEMPERATURE
VI(off)[V], INPUT OFF VOLTAGE
Figure 3. Input-Off Voltage
© 2002 Fairchild Semiconductor Corporation
FJV3102R Rev. 1.1.2
100
Figure 2. Input-On Voltage
PC[mW], POWER DISSIPATION
IC [μA], COLLECTOR CURRENT
Figure 1. DC Current Gain
1000
10
IC[mA], COLLECTOR CURRENT
Figure 4. Power Derating
www.fairchildsemi.com
3
FJV3102R — NPN Epitaxial Silicon Transistor with Bias Resistor
Typical Performance Characteristics
FJV3102R — NPN Epitaxial Silicon Transistor with Bias Resistor
Physical Dimensions
SOT-23
0.95
2.92±0.20
3
1.40
1.30+0.20
-0.15
1
2.20
2
0.60
0.37
(0.29)
0.95
0.20
1.00
A B
1.90
1.90
LAND PATTERN
RECOMMENDATION
SEE DETAIL A
1.20 MAX
0.10
0.00
(0.93)
0.10
C
C
2.40±0.30
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
0.23
0.08
A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M - 1994.
E) DRAWING FILE NAME: MA03DREV10
0.25
0.20 MIN
(0.55)
SEATING
PLANE
SCALE: 2X
Figure 5. 3-LEAD, SOT-23, JEDEC TO-236, LOW PROFILE (ACTIVE)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MA03D_BK.pdf.
© 2002 Fairchild Semiconductor Corporation
FJV3102R Rev. 1.1.2
www.fairchildsemi.com
4
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Rev. I66
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