ON NVMFS6B14NLWFT1G Power mosfet Datasheet

NVMFS6B14NL
Power MOSFET
100 V, 13 mW, 55 A, Single N−Channel
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS6B14NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
13 mW @ 10 V
100 V
55 A
19 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
100
V
Gate−to−Source Voltage
VGS
±16
V
ID
55
A
Parameter
Continuous Drain Current RqJC (Notes 1, 3)
Power Dissipation RqJC
(Note 1)
Continuous Drain Current RqJA (Notes 1, 2, 3)
Power Dissipation RqJA
(Notes 1 & 2)
Pulsed Drain Current
TC = 25°C
Steady
State
TC = 100°C
TC = 25°C
39
PD
TC = 100°C
TA = 25°C
Steady
State
Operating Junction and Storage Temperature
Source Current (Body Diode)
S (1,2,3)
A
11
PD
W
3.8
MARKING
DIAGRAM
1.9
IDM
140
A
TJ, Tstg
−55 to
+ 175
°C
IS
60
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 24 A)
EAS
29
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
1.6
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
40
January, 2016 − Rev. 1
D
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 6B14NL
(NVMFS6B14NL) or
6B14LW
(NVMFS6B14NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2016
N−CHANNEL MOSFET
8.0
TA = 100°C
TA = 25°C, tp = 10 ms
G (4)
W
94
47
ID
TA = 100°C
TA = 25°C
D (5,6)
1
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
Publication Order Number:
NVMFS6B14NL/D
NVMFS6B14NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
100
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
80
VGS = 0 V,
VDS = 80 V
mV/°C
TJ = 25°C
25
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 16 V
VGS(TH)
VGS = VDS, ID = 250 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
1.0
3.0
−5.8
VGS = 10 V
VGS = 4.5 V
ID = 20 A
V
mV/°C
10.5
13
15.5
19
mW
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
1680
VGS = 0 V, f = 1 MHz, VDS = 25 V
580
pF
42
VGS = 4.5 V, VDS = 50 V; ID = 25 A
8
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.0
Plateau Voltage
VGP
3.3
td(ON)
11
17
2.2
VGS = 10 V, VDS = 50 V; ID = 25 A
nC
4.1
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 50 V,
ID = 25 A, RG = 1.0 W
tf
67.6
ns
14.8
7.2
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.83
TJ = 125°C
0.72
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 20 A
1.2
V
48
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 25 A
QRR
25
ns
23
53
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6B14NL
TYPICAL CHARACTERISTICS
60
VGS = 10 V
to 6 V
4.5 V
4.0 V
ID, DRAIN CURRENT (A)
VDS = 10 V
3.8 V
50
40
3.6 V
30
3.4 V
20
3.2 V
ID, DRAIN CURRENT (A)
60
3.0 V
10
50
40
30
20
TJ = 25°C
10
TJ = 125°C
0
1.0
0.5
2.0
1.5
3.0
2.5
0
4
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
24
ID = 20 A
TJ = 25°C
22
20
18
16
14
12
10
8
6
5
4
6
7
8
10
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
5
30
TJ = 25°C
25
20
VGS = 4.5 V
15
VGS = 10 V
10
5
10
20
30
40
60
50
70
80
90
100
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100K
2.4
2.2
3
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
26
3
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
0
ID = 20 A
VGS = 10 V
TJ = 150°C
2.0
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
TJ = −55°C
0
1.8
1.6
1.4
1.2
1.0
0.8
10K
TJ = 125°C
1K
TJ = 85°C
100
10
0.6
0.4
−50 −25
1
0
25
50
75
100
125
150
175
0
10
20
30
40
50
60
70
80
90 100
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6B14NL
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
10,000
C, CAPACITANCE (pF)
Ciss
1000
Coss
Crss
100
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
1
0
10
20
30
40
50
60
70
80
5
4
Qgd
Qgs
3
TJ = 25°C
VDS = 50 V
ID = 25 A
2
1
0
2
0
4
6
10
8
12
14
16
18
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
IS, SOURCE CURRENT (A)
tr
td(on)
VDS = 50 V
ID = 25 A
VGS = 4.5 V
1
1
10
10
1
TJ = 125°C
TJ = 25°C
TJ = −55°C
0.1
0.01
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
VGS ≤ 10 V
Single Pulse
TC = 25°C
IPEAK, DRAIN CURRENT (A)
t, TIME (ns)
6
Qg, TOTAL GATE CHARGE (nC)
tf
ID, DRAIN CURRENT (A)
7
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
td(off)
100
8
100
100
1000
9
100
90
1000
10
10
500 ms
10
1 ms
1
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
25°C
100°C
1
0.01
0.1
10
10
0.0001
100
0.001
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TAV, TIME IN AVALANCHE (sec)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. TAV
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4
0.01
NVMFS6B14NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
R(t) (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
NVMFS6B14NL, 650 mm2, Cu Single Layer Pad
Single Pulse
0.01
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Marking
Package
Shipping†
NVMFS6B14NLT1G
6B14NL
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS6B14NLWFT1G
614LLW
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NVMFS6B14NLT3G
6B14NL
DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS6B14NLWFT3G
614LLW
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVMFS6B14NL
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
0.20 C
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
A
2
B
D1
2X
4X
E1
q
E
2
c
1
2
MILLIMETERS
DIM
MIN
NOM
MAX
A
0.90
1.00
1.10
A1
0.00
−−−
0.05
b
0.33
0.41
0.51
c
0.23
0.28
0.33
5.00
5.30
D
5.15
D1
4.70
4.90
5.10
D2
3.80
4.00
4.20
6.00
6.30
E
6.15
E1
5.70
5.90
6.10
E2
3.45
3.65
3.85
e
1.27 BSC
G
0.51
0.575
0.71
K
1.20
1.35
1.50
L
0.51
0.575
0.71
L1
0.125 REF
M
3.00
3.40
3.80
q
0_
−−−
12 _
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.20 C
3
A1
4
TOP VIEW
C
SEATING
PLANE
DETAIL A
0.10 C
A
0.10 C
SIDE VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
2X
0.495
0.10
b
C A B
0.05
c
4.560
2X
8X
1.530
e/2
e
L
1
4
3.200
K
4.530
E2
PIN 5
(EXPOSED PAD)
L1
1.330
2X
M
0.905
1
0.965
G
D2
4X
BOTTOM VIEW
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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Sales Representative
NVMFS6B14NL/D