MM54HCT151/MM74HCT151 8-Channel Digital Multiplexer General Description This high speed Digital multiplexer utilizes advanced silicongate CMOS technology. Along with the high noise immunity and low power dissipation of standard CMOS integrated circuits, it possesses the ability to drive 10 LS-TTL loads. The MM54HCT151/MM74HCT151 selects one of the 8 data sources, depending on the address presented on the A, B, and C inputs. It features both true (Y) and complement (W) outputs. The STROBE input must be at a low logic level to enable this multiplexer. A high logic level at the STROBE forces the W output high and the Y output low. MM54HCT/MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS Connection and Logic Diagrams devices. These parts are also plug-in replacements for LSTTL devices and can be used to reduce power consumption in existing designs. Features Y Y Y Y Y Typical propagation delay: 20 ns Low quiescent supply current: 40 mA maximum (74HCT Series) Low input current: 1 mA maximum Fanout of 10 LS-TTL loads TTL input compatible Truth Table Dual-In-Line Package Inputs TL/F/9399 – 1 Top View C Select B A X L L L L H H H H X L L H H L L H H X L H L H L H L H Outputs Strobe S Y W H L L L L L L L L L D0 D1 D2 D3 D4 D5 D6 D7 H D0 D1 D2 D3 D4 D5 D6 D7 H e High Level, L e Low Level, X e Don’t Care D0, D1...D7 e the level of the respective D input Order Number MM54HCT151 or MM74HCT151 TL/F/9399 – 2 C1995 National Semiconductor Corporation TL/F/9399 RRD-B30M115/Printed in U. S. A. MM54HCT151/MM74HCT151 8-Channel Digital Multiplexer November 1995 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) b 0.5V to a 7.0V Supply Voltage (VCC) b 1.5V to VCC a 1.5V DC Input Voltage (VIN) b 0.5V to VCC a 0.5V DC Output Voltage (VOUT) g 20 mA Clamp Diode Current (IIK, IOK) g 25 mA DC Output Current, per Pin (IOUT) g 50 mA DC VCC or GND Current, per Pin (ICC) b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temperature (TL) (Soldering, 10 seconds) 260§ C Operating Temp. Range (TA) MM74HCT MM54HCT Min 4.5 Max 5.5 0 VCC Units V V b 40 b 55 a 85 a 125 §C §C 500 ns Input Rise or Fall Times (tr, tf) DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA e 25§ C 74HCT 54HCT TA e b40§ C to a 85§ C TA e b55§ C to a 125§ C Units Typ Guaranteed Limits VIH Minimum High Level Input Voltage 2.0 2.0 2.0 V VIL Maximum Low Level Input Voltage 0.8 0.8 0.8 V VOH Minimum High Level VIN e VIH or VIL Output Voltage lIOUTl s 20 mA 4.4 4.4 4.4 V lIOUTl s 4.0 mA lIOUTl s 4.8 mA 4.5V 4.2 3.98 5.5V 5.2 4.98 3.84 4.84 3.7 4.7 V V Maximum Low Level VIN e VIH or VIL Output Voltage lIOUTl e 20 mA lIOUTl e 4.0 mA lIOUTl e 4.8 mA 0 0.1 4.5V 0.2 0.26 5.5V 0.2 0.26 0.1 0.33 0.33 0.1 0.4 0.4 V V V g 0.1 g 1.0 g 1.0 mA 8.0 80 160 mA 0.55 0.65 mA 4.5V VIN e VIH or VIL VOL IIN Maximum Input Current VIN e VCC or GND ICC Maximum Quiescent VIN e VCC or GND Supply Current IOUT e 0 mA 6.0V VIN e 2.4V or 0.5V (Note 4) 0.25 0.4 Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C. Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HCT at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 2 AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns Typ Guaranteed Limit Units Maximum Propagation Delay A, B or C to Y 26 35 ns tPHL, tPLH Maximum Propagation Delay A, B or C to W 26 35 ns tPHL, tPLH Maximum Propagation Delay Any D to Y 22 29 ns tPHL, tPLH Maximum Propagation Delay any D to W 22 29 ns tPHL, tPLH Maximum Propagation Delay Strobe to Y 17 23 ns tPHL, tPLH Maximum Propagation Delay Strobe to W 17 23 ns Symbol Parameter tPHL, tPLH Conditions AC Electrical Characteristics VCC e 5.0V g 10%, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions TA e 25§ C Typ 74HCT TA eb40§ C to a 85§ C 54HCT TA eb55§ C to a 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay A, B or C to Y 33 46 58 69 ns tPHL, tPLH Maximum Propagation Delay A, B or C to W 33 46 58 69 ns tPHL, tPLH Maximum Propagation Delay any D to Y 27 39 49 59 ns tPHL, tPLH Maximum Propagation Delay any D to W 27 39 49 59 ns tPHL, tPLH Maximum Propagation Delay Strobe to Y 21 28 35 42 ns tPHL, tPLH Maximum Propagation Delay Strobe to W 21 28 35 42 ns tTLH, tTHL Maximum Output Rise and Fall Time 8 15 19 23 ns CPD Power Dissipation Capacitance (Note 5) CIN Maximum Input Capacitance (per package) 110 pF 5 10 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. 3 MM54HCT151/MM74HCT151 8-Channel Digital Multiplexer Physical Dimensions inches, (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54HCT151J or MM74HCT151J NS Package Number J16A Molded Dual-In-Line Package (N) Order Number MM74HCT151N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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