MORE MSP0515D -55v(d-s) p-channel enhancement mode power mos fet Datasheet

MSP0515D
-55V(D-S) P-Channel Enhancement Mode Power MOS FET
General Features
● VDS =-55V,ID =-15A
RDS(ON) <80mΩ @ VGS=-10V
● High density cell design for ultra low Rdson
Lead Free
● Fully characterized avalanche voltage and current
● Excellent package for good heat dissipation
Application
● Power switching application
● Hard switched and high frequency circuits
● DC-DC Converter
Marking and pin assignment
PIN Configuration
TO-252-2L top view
Schematic diagram
Package Marking and Ordering Information
Device Marking
Device
Device Package
Reel Size
Tape width
Quantity
MSP0515D
MSP0515D
TO-252-2L
-
-
-
Absolute Maximum Ratings (TC=25℃unless otherwise noted)
Symbol
Limit
Unit
Drain-Source Voltage
Parameter
VDS
-55
V
Gate-Source Voltage
VGS
±20
V
ID
-15
A
ID (100℃)
-10
A
Pulsed Drain Current
IDM
-50
A
Maximum Power Dissipation
PD
50
W
TJ,TSTG
-55 To 150
℃
Drain Current-Continuous
Drain Current-Continuous(TC=100℃)
Operating Junction and Storage Temperature Range
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MSP0515D
Thermal Characteristic
(Note 2)
Thermal Resistance ,Junction-to-Case
RθJC
℃/W
2.5
Electrical Characteristics (TC=25℃unless otherwise noted)
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Drain-Source Breakdown Voltage
BVDSS
VGS=0V ID=-250μA
-55
-
-
V
Zero Gate Voltage Drain Current
IDSS
VDS=-55V,VGS=0V
-
-
1
μA
Gate-Body Leakage Current
IGSS
VGS=±20V,VDS=0V
-
-
±100
nA
Gate Threshold Voltage
VGS(th)
VDS=VGS,ID=-250μA
-1.5
-2.3
-3.5
V
Drain-Source On-State Resistance
RDS(ON)
VGS=-10V, ID=-5A
-
64
80
mΩ
gFS
VDS=-15V,ID=-5A
16
-
-
S
-
1450
-
PF
-
145
-
PF
Crss
-
110
-
PF
Turn-on Delay Time
td(on)
-
8
-
nS
Turn-on Rise Time
tr
VDD=-30V, ,RL=30Ω
-
9
-
nS
td(off)
VGS=-10V,RGEN=6Ω
-
65
-
nS
-
30
-
nS
-
26
-
nC
-
4.5
-
nC
-
7
-
nC
-
-
1.2
V
-
-
-15
A
Off Characteristics
On Characteristics
(Note 3)
Forward Transconductance
Dynamic Characteristics
(Note4)
Input Capacitance
Clss
Output Capacitance
Coss
Reverse Transfer Capacitance
Switching Characteristics
VDS=-20V,VGS=0V,
F=1.0MHz
(Note 4)
Turn-Off Delay Time
Turn-Off Fall Time
tf
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS=-30V,ID=-5A,
VGS=-10V
Drain-Source Diode Characteristics
Diode Forward Voltage (Note 3)
Diode Forward Current
(Note 2)
VSD
VGS=0V,IS=-3A
IS
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. Surface Mounted on FR4 Board, t ≤ 10 sec.
3. Pulse Test: Pulse Width ≤ 300μs, Duty Cycle ≤ 2%.
4. Guaranteed by design, not subject to production
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MSP0515D
Test Circuit
1) EAS Test Circuit
2) Gate Charge Test Circuit
3) Switch Time Test Circuit
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MSP0515D
-ID- Drain Current (A)
Normalized On-Resistance
Typical Electrical and Thermal Characteristics (Curves)
TJ-Junction Temperature(℃)
-Vds Drain-Source Voltage (V)
Figure 4 Rdson-Junction Temperature
-ID- Drain Current (A)
Vgs Gate-Source Voltage (V)
Figure 1 Output Characteristics
Qg Gate Charge (nC)
Figure 2 Transfer Characteristics
Figure 5 Gate Charge
Is- Reverse Drain Current (A)
Rdson On-Resistance Normalized
-Vgs Gate-Source Voltage (V)
-ID- Drain Current (A)
Figure 3 Rdson- Drain Current
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Vsd Source-Drain Voltage (V)
Figure 6 Source- Drain Diode Forward
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C Capacitance (pF)
Normalized BVdss
MSP0515D
TJ-Junction Temperature (℃)
Figure 7 Capacitance vs Vds
Figure 9 BVDSS vs Junction Temperature
ID- Drain Current (A)
Vds Drain-Source Voltage (V)
TJ-Junction Temperature(℃)
Figure 8 Safe Operation Area
Figure 10 VGS(th) vs Junction Temperature
r(t),Normalized Effective
Transient Thermal Impedance
Vds Drain-Source Voltage (V)
Square Wave Pluse Duration(sec)
Figure 11 Normalized Maximum Transient Thermal Impedance
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MSP0515D
TO-252-2L Package Information
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