Vicor NBM3814V46C15A6T08 Non-isolated, fixed-ratio dc-dc converter Datasheet

NBM™ in a VIA Package
Bus Converter
NBM3814x46C15A6yzz
Non-Isolated, Fixed-Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 160A continuous low voltage side current
• Fixed transformation ratio(K) of 1/3
• Up to 1258 W/in3 power density
• 97.9% peak efficiency
ILO = up to 160A
VLO = 14V (12 – 15.3V)
(no load)
K = 1/3
Product Description
• Bidirectional operation capability
The NBM in a VIA package is a high efficiency Bus Converter,
operating from a 36 to 46VDC high voltage bus to deliver a nonisolated 12 to 15.3VDC unregulated, low voltage.
• Integrated ceramic capacitance filtering
• Parallel operation for multi-kW arrays
• OV, OC, UV, short circuit and thermal protection
This unique ultra-low profile module incorporates DC-DC
conversion, integrated filtering in a chassis or PCB mount
form factor.
• 3814 package
• High MTBF
The NBM offers low noise, fast transient response and industry
leading efficiency and power density.
• Thermally enhanced VIA™ package
Leveraging the thermal and density benefits of Vicor’s VIA
packaging technology, the NBM module offers flexible thermal
management options with very low top and bottom side thermal
impedances.
Typical Applications
• DC Power Distribution
When combined with downstream Vicor DC-DC conversion
components and regulators, the NBM allows the Power Design
Engineer to employ a simple, low-profile design which will
differentiate the end system without compromising on cost or
performance metrics.
• Information and Communication
Technology (ICT) Equipment
• High End Computing Systems
• Automated Test Equipment
The NBM non-isolated topology allows start up and steady
state operation in forward and reverse directions. It provides
bidirectional protections. However if power train is disabled by any
protection, and VLO is present, then voltage equal to VLO minus two
diode drops will appear on high voltage side.
• Industrial Systems
• High Density
Energy Systems
• Transportation
Size:
3.76 x 1.40 x 0.37 in
95.59 x 35.54 x 9.40 mm
Part Ordering Information
Product
Function
Package
Length
Package
Width
Package
Type
Max
High
Side
Voltage
NBM
38
14
x
46
NBM =
Non-Isolated
Bus Converter
Module
Length in
Inches x 10
Width in
Inches x 10
B = Board VIA
V = Chassis VIA
[1]
VHI = 42V (36 – 46V)
High
Max
Side
Low
Voltage
Side
Range
Voltage
Ratio
C
15
Max
Low
Product Grade
Side
(Case Temperature)
Current
A6
Internal Reference
High Temperature Current Derating may apply; See Figure 1, specified thermal operating area.
NBM™ in a VIA Package
Page 1 of 23
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Option Field
y
zz
C = -20 to 100°C[1]
T = -40 to 100°C[1]
00 = Chassis/Always On
04 = Short Pin/Always On
08 = Long Pin/Always On
NBM3814x46C15A6yzz
Typical Application
NBM in a VIA Package
FUSE
+HI
+LO
LO
Side
HI
Side
V
HI
V
PGND
PoL
LO
NBM3814x46C15A6yzz at point of load providing fixed ratio step-down DC-DC conversion to PoL devices.
NBM is operating in forward direction.
NBM in a VIA Package
FUSE
+HI
+LO
LO
Side
HI
Side
LOAD
V
HI
V
LO
PGND
NBM3814x46C15A6yzz providing fixed ratio step-up DC-DC conversion. NBM is operating in reverse direction.
NBM™ in a VIA Package
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Pin Configuration
10
1
TOP VIEW
12
3
+HI
PGND
PGND
+LO
+HI
PGND
PGND
+LO
2
11
13
4
2
11
13
4
NBM in a 3814 VIA Package - Chassis (Lug) Mount
TOP VIEW
+HI
PGND
PGND
+LO
+HI
PGND
PGND
+LO
10
12
1
3
NBM in a 3814 VIA Package - Board (PCB) Mount
Pin Descriptions
Pin Number
Signal Name
Type
1, 2
+HI
HIGH SIDE POWER
Positive auto-transformer power terminal - on high voltage side
3, 4
+LO
LOW SIDE POWER
Positive auto-transformer power terminal - on low voltage side
10, 11, 12, 13
PGND
POWER RETURN
NBM™ in a VIA Package
Page 3 of 23
Rev 1.1
05/2016
Function
Common negative auto-transformer power terminal
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Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
+HI to PGND
Min
Max
Unit
-1
60
V
1
V/µs
20
V
HI_DC or LO_DC slew rate
+LO to PGND
Dielectric Withstand*
-1
See note below
High Voltage Side to Case
N/A
VDC
High Voltage Side to
Low Voltage Side
N/A
VDC
Low Voltage Side to Case
N/A
VDC
* The PGND of the NBM in a VIA package is directly connected to the case. The NBM does not contain any insulation (isolation) from high voltage side to
low voltage side
NBM™ in a VIA Package
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Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
­Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
46
V
15
V
General Powertrain High Voltage Side to Low Voltage Side Specification (Forward Direction)
Hi Side Input Voltage range,
continuous
VHI µController
HI to LO Input Quiescent Current
36
VHI_DC
VµC_ACTIVE
VHI_DC voltage where µC is initialized,
(powertrain inactive)
Disabled, VHI_DC = 42V
IHI_Q
8
TCASE ≤ 100ºC
12
VHI_DC = 42V, TCASE = 25ºC
HI to LO No Load Power Dissipation
HI to LO Inrush Current Peak
12.5
5
VHI_DC = 42V
PHI_NL
28
22
VHI_DC = 36V to 46V
31
30
TCASE ≤ 100ºC
DC HI Side Input Current
Transformation Ratio
IHI_IN_DC
ILO_OUT_DC
LO Side Output Current
(pulsed)
ILO_OUT_PULSE
HI to LO Efficiency (ambient)
ηhAMB
A
53.9
High voltage to low voltage, K = VLO_DC / VHI_DC, at no
load
LO Side Output Current
(continuous)
1/3
TCASE ≤ 85°C
160
A
10ms pulse, 25% Duty cycle, ILO_OUT_AVG ≤ 50% rated
ILO_OUT_DC
176
A
VHI_DC = 42V, ILO_OUT_DC = 160A
96.8
97.6
VHI_DC = 36V to 46V, ILO_OUT_DC = 160A
96.5
VHI_DC = 42V, ILO_OUT_DC = 80A
97.3
97.8
96.7
97.1
%
ηhHOT
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = 85°C
HI to LO Efficiency
(over load range)
ηh20%
32A < ILO_OUT_DC < 160A
95
RLO_COLD
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = -40°C
0.8
1.3
1.7
RLO_AMB
VHI_DC = 42V, ILO_OUT_DC = 160A
0.9
1.7
2.1
RLO_HOT
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = 85°C
1.5
2.1
2.4
Frequency of the LO Side Voltage Ripple = 2x FSW
1.14
1.20
1.26
Switching Frequency
LO Side Output Voltage Ripple
FSW
VLO_OUT_PP
CLO_EXT = 0μF, ILO_OUT_DC = 160A, VHI_DC = 42V,
20MHz BW
TCASE ≤ 100ºC
NBM™ in a VIA Package
Page 5 of 23
A
V/V
HI to LO Efficiency (hot)
HI to LO Output Resistance
W
75
At ILO_OUT_DC = 160A, TCASE ≤ 85ºC
K
19.5
VHI_DC = 36V to 46V, TCASE = 25 ºC
VHI_DC = 46V, CLO_EXT = 3000μF, RLOAD_LO = 20% of full
load current
IHI_INR_PK
mA
Rev 1.1
05/2016
%
%
110
MHz
mV
205
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mΩ
NBM3814x46C15A6yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
­Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain High Voltage Side to Low Voltage Side Specification (Forward Direction) Cont.
Effective HI side Capacitance
(Internal)
CHI_INT
Effective Value at 42VHI_DC
16.8
µF
Effective LO Side Capacitance
(Internal)
CLO_INT
Effective Value at 14VLO_DC
140
µF
Effective LO Side Output Capacitance
(External)
CLO_OUT_EXT
Effective LO Side Output Capacitance
CLO_OUT_AEXT
(External)
Excessive capacitance may drive module into SC
protection
3000
µF
1010
ms
CLO_OUT_AEXT Max = N * 0.5 * CLO_OUT_EXT MAX, where
N = the number of units in parallel
Protection High Voltage Side to Low Voltage Side (Forward Direction)
Auto Restart Time
tAUTO_RESTART
Startup into a persistent fault condition. Non-Latching
fault detection given VHI_DC > VHI_UVLO+
940
HI Side Overvoltage Lockout
Threshold
VHI_OVLO+
48
50
52
V
HI Side Overvoltage Recovery
Threshold
VHI_OVLO-
46
48
50
V
HI Side Overvoltage Lockout
Hysteresis
VHI_OVLO_HYST
2
V
HI Side Overvoltage Lockout
Response Time
tHI_OVLO
30
µs
HI Side Undervoltage Lockout
Threshold
VHI_UVLO-
28
30
32
V
HI Side Undervoltage Recovery
Threshold
VHI_UVLO+
30
32
34
V
HI Side Undervoltage Lockout
Hysteresis
VHI_UVLO_HYST
2
V
HI Side Undervoltage Lockout
Response Time
tHI_UVLO
100
µs
From VHI_DC = VHI_UVLO+ to powertrain active, (i.e One
time Startup delay form application of VHI_DC to VLO_DC)
30
ms
From powertrain active. Fast Current limit protection
disabled during Soft-Start
1
ms
HI Side Undervoltage Startup Delay
tHI_UVLO+_DELAY
HI Side Soft-Start Time
tHI_SOFT-START
LO Side Output Overcurrent Trip
Threshold
ILO_OUT_OCP
LO Side Output Overcurrent
Response Time Constant
tLO_OUT_OCP
LO Side Output Short Circuit
Protection Trip Threshold
ILO_OUT_SCP
LO Side Output Short Circuit
Protection Response Time
tLO_OUT_SCP
Overtemperature Shutdown
Threshold
tOTP+
Overtemperature Recovery
Threshold
tOTP–
Undertemperature Shutdown
Threshold
tUTP
Undertemperature Restart Time
NBM™ in a VIA Package
Page 6 of 23
177
Effective internal RC filter
200
240
4
ms
240
A
1
Temperature sensor located inside controller IC
°C
110
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
tUTP_RESTART
Startup into a persistent fault condition. Non-Latching
fault detection given VHI_DC > VHI_UVLO+
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µs
125
105
A
3
115
°C
-45
°C
s
NBM3814x46C15A6yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
­Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
15.3
V
General Powertrain Low Voltage Side to High Voltage Side Specification (Reverse Direction)
LO Side Input Voltage range,
continuous
12
VLO_DC
VLO_DC = 14V, TCASE = 25ºC
LO to HI No Load Power Dissipation
12.5
5
VLO_DC = 14V
PLO_NL
20
29
VLO_DC = 12V to 15.3V, TCASE = 25ºC
22
VLO_DC = 12V to 15.3V
31
W
DC LO Side Input Current
ILO_IN_DC
At IHI_DC = 53.3A, TCASE ≤ 85ºC
162
A
HI Side Output Current (continuous)
IHI_OUT_DC
TCASE ≤ 85°C
53.3
A
10ms pulse, 25% Duty cycle,
IHI_OUT_AVG ≤ 50% rated IHI_OUT_DC
58.7
A
HI Side Output Current (pulsed)
LO to HI Efficiency (ambient)
IHI_OUT_PULSE
ηhAMB
VLO_DC = 14V, IHI_OUT_DC = 53.3A
96.4
VLO_DC = 12V to 15.3V, IHI_OUT_DC= 53.3A
96.1
VLO_DC = 14V, IHI_OUT_DC = 26.7A
97.3
97.8
96.9
LO to HI Efficiency (hot)
hHOT
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = 85°C
96.3
LO to HI Efficiency (over load range)
h20%
10.66A < IHI_OUT_DC < 53.3A
94.6
LO to HI Output Resistance
HI Side Output Voltage Ripple
%
%
%
RHI_COLD
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = -40°C
10
16
20
RHI_AMB
VLO_DC = 14V, IHI_OUT_DC = 53.3A
12
20
24
RHI_HOT
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = 85°C
16
23
26
VHI_OUT_PP
CHI_OUT_EXT = 0µF, IHI_OUT_DC = 53.3A,
VLO_DC = 14V, 20MHz BW
Rev 1.1
05/2016
330
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mΩ
mV
615
TCASE ≤ 100ºC
NBM™ in a VIA Package
Page 7 of 23
97.2
NBM3814x46C15A6yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
­Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
300
µF
Protection Low Voltage Side to High Voltage Side (Reverse Direction)
Excessive capacitance may drive module into SC
protection when starting from low voltage side to high
voltage side
Effective HI Side Output Capacitance
(External)
CHI_OUT_EXT
LO Side Overvoltage Lockout
Threshold
VLO_OVLO+
16
16.7
17.4
V
LO Side Overvoltage Recovery
Threshold
VHI_OVLO-
15.3
16
16.7
V
LO Side Overvoltage Lockout
Response Time
tHI_OVLO
30
µs
LO Side Undervoltage Lockout
Threshold
VLO_UVLO-
9.3
10
10.7
V
LO Side Undervoltage Recovery
Threshold
VHI_UVLO+-
10
10.7
11.4
V
LO Side Undervoltage Lockout
Response Time
tLO_UVLO
HI Side Output Overcurrent Trip
Threshold
IHI_OUT_OCP
Powertrain is stopped but current can flow from LO
Side to HI Side through MOSFET body Diodes
HI Side Output Overcurrent Response
Time Constant
tHI_OUT_OCP
Effective internal RC filter
HI Side Short Circuit Protection Trip
Threshold
IHI_SCP
HI Side Short Circuit Protection
Response Time
tHI_SCP
NBM™ in a VIA Package
Page 8 of 23
100
56
66.7
4
Powertrain is stopped but current can flow from LO
Side to HI Side through MOSFET body Diodes
810
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80
A
ms
A
1
Rev 1.1
05/2016
µs
µs
NBM3814x46C15A6yzz
LO Side Current (A)
200
180
160
140
120
100
80
60
40
20
0
-60
-40
-20
0
20
40
60
80
100
120
Case Temperature (°C)
36 – 46V
Figure 1 — Specified thermal operating area
3000
200
2700
180
LO Side Current (A)
LO Side Power (W)
1. The NBM in a VIA Package is cooled through bottom case (bottom housing).
2. The thermal rating of the NBM in a VIA Package is based on typical measured device efficiency.
3. The case temperature in the graph is the measured temperature of the bottom housing, such that operating internal junction temperature of the NBM in a
VIA Package does not exceed 125°C.
2400
2100
1800
1500
1200
900
600
300
0
160
140
120
100
80
60
40
20
36
37
38
39
40
41
42
43
44
45
0
46
36
37
38
HI Side Voltage (V)
PLO_OUT_DC
39
40
ILO_OUT_DC
PLO_OUT_PULSE
LO Side Capacitance
(% Rated CLO_EXT_MAX)
Figure 2 — Specified electrical operating area using rated RLO_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
LO Side Current (% ILO_OUT_DC)
Figure 3 — Specified HI side start-up into load current and external capacitance
NBM™ in a VIA Package
Page 9 of 23
41
42
43
HI Side Voltage (V)
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100
ILO_OUT_PULSE
44
45
46
NBM™ in a VIA Package
Page 10 of 23
Rev 1.1
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OUTPUT
INPUT
+VLO
+VHI
T
N
-O
N
UR
VµC_ACTIVE
VHI_OVLO+
VNOM
STARTUP
tHI _UVLO+_DELAY
VHI_UVLO+
OVER VOLTAGE
VHI_UVLO-
VHI_OVLO-
E
OV
UT
T
TU
P
E
T
T
PU G E
LIZ OU
I N LTA
PU
A
I
N
E
E
I
IT D
I D VO
C
IN O SI
_D
IS
c
H
V HI
L
µ
RN
N
-O
R
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C
EN
EV
S
HI
T
GE
TA
L
VO
T OFF
U
P IN URN
E
ID T
SHUTDOWN
IT
CU
R
I
tAUTO-RESTART
T
OR
SH
OVER CURRENT
tLO_OUT_SCP
S
RE
>
tHI _UVLO+_DELAY
C
_D
V HI
P
IN
UT
T
R
TA
NBM3814x46C15A6yzz
NBM™ Forward Direction Timing Diagram
NBM™ in a VIA Package
Page 11 of 23
Rev 1.1
05/2016
OUTPUT
INPUT
+VHI
+VLO
T
UT
T
N
-O
N
UR
VLO_OVLO+
VNOM
µ
STARTUP
OVER VOLTAGE
E
AG
T
OL
V
VLO_UVLO-
VLO_OVLO-
ER
TP
E
OV
IZ OU
E
L
D
IA IDE
SI
IT
O
IN HI S
L
c
tHI _UVLO+_DELAY
VHI = +VLO – (~1.4V)
VµC_ACTIVE
IN
C
VLO_UVLO+
VL
D
O_
T
PU
N
UR
N
-O
V LO
>
OVER CURRENT
tHI_OUT_OCP
S
RE
SHUTDOWN
RED LINE: LOAD MUST NOT BE PRESENT
TO PRENEVENT DAMAGE TO UNIT
/ T
NT VEN
FF
E
UT N-O
RR I T E
P
U
R
IN
C CU
E TU
ER CIR
ID GE
V
S
O RT
LO L T A
O
VO
SH
NOT SUPPORTED CONDITION,
PERMANENT DAMAGE MAY OCCUR
P
IN
C
_D
UT
T
R
TA
NBM3814x46C15A6yzz
NBM™ Reverse Direction Timing Diagram
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NBM3814x46C15A6yzz
Application Characteristics
30
HI to LO, Full Load Efficiency (%)
27
24
21
18
15
12
9
6
3
0
36
37
38
39
40
41
42
43
44
45
46
47
98.0
97.5
97.0
96.5
96.0
-40
-25
-10
5
HI Side Input Voltage (V)
-40°C
25°C
VHI:
85°C
80
97
72
95
64
93
56
91
48
89
40
87
32
PD
24
83
16
81
8
79
0
0
16
32
48
64
80
96
112
128
144
HI to LO, Power Dissipation
HI to LO, Efficiency (%)
99
85
42V
72
93
63
91
54
89
45
36
PD
27
83
18
81
9
79
0
64
80
96
112
128
144
160
HI to LO, Power Dissipation
HI to LO, Efficiency (%)
81
95
48
64
56
91
48
89
36V
42V
32
85
24
83
16
81
8
0
79
16
32
48
64
80
96
112
128
144
160
36V
42V
46V
Figure 7 — Efficiency and power dissipation at TCASE = 25°C
3
2
1
0
-40
-20
0
20
40
60
Case Temperature (°C)
46V
Figure 8 — Efficiency and power dissipation at TCASE = 85°C
NBM™ in a VIA Package
Page 12 of 23
40
PD
87
LO Side Output Current (A)
VHI_DC :
46V
93
VHI_DC :
97
32
42V
LO Side Output Current (A)
90
16
36V
72
0
99
0
95
95
160
Figure 6 — Efficiency and power dissipation at TCASE = -40°C
85
80
80
46V
87
65
97
HI to LO, Output Resistance (mΩ)
36V
50
99
LO Side Output Current (A)
VHI_DC :
35
Figure 5 — Full load efficiency vs. temperature; VHI_DC
Figure 4 — No load power dissipation vs. VHI_DC
HI to LO, Efficiency (%)
TTOP SURFACE CASE:
20
Case Temperature (ºC)
HI to LO, Power Dissipation
HI to LO, Power Dissipation (W)
Product is mounted and temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected data from high
voltage side sourced units processing power in forward direction.See associated figures for general trend data.
Rev 1.1
05/2016
ILO_DC:
160A
Figure 9 — RLO vs. temperature; Nominal VHI_DC
ILO_DC = 160A at TCASE = 85°C
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80
100
LO Side Output Voltage Ripple (mV)
NBM3814x46C15A6yzz
60
54
48
42
36
30
24
18
12
6
0
0
16
32
48
64
80
96
112
128
144
160
LO Side Output Current (A)
VHI_DC:
42V
Figure 10 — VLO_OUT_PP vs. ILO_DC ; No external CLO_OUT_EXT. Board
mounted module, scope setting : 20MHz analog BW
Figure 11 — Full load ripple, 300µF CHI_IN_EXT; No external
CLO_OUT_EXT. Board mounted module, scope setting :
20MHz analog BW
Figure 12 — 0A– 160A transient response:
CHI_IN_EXT = 300µF, no external CLO_OUT_EXT
Figure 13 — 160A – 0A transient response:
CHI_IN_EXT = 300µF, no external CLO_OUT_EXT
Figure 14 — Forward start up from application of VHI_DC = 42V, 20%
ILO_DC, 100% CLO_OUT_EXT
Figure 15 — Reverse start up from application of VLO_DC = 14V,
20% IHI_DC, 100% CHI_OUT_EXT
NBM™ in a VIA Package
Page 13 of 23
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NBM3814x46C15A6yzz
General Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
Lug (Chassis) Mount
95.34 / [3.75]
95.59 / [3.76] 95.84 / [3.77]
Length
L
PCB (Board) Mount
95.34 / [3.75]
95.59 / [3.76] 95.84 / [3.77]
Width
W
35.29 / [1.39]
35.54 / [1.40] 35.79 / [1.41]
Height
H
9.019 / [0.355]
9.40 / [0.37] 9.781 / [0.385]
Volume
Vol
Weight
W
Without heatsink
mm / [in]
mm / [in]
mm / [in]
cm3/ [in3]
31.93 / [1.95]
130.4 / [4.6]
g / [oz]
Pin Material
C145 copper, 1/2 hard
Underplate
Low stress ductile Nickel
50
100
Palladium
0.8
6
Soft Gold
0.12
2
NBM3814x46C15A6yzz (T-Grade)
-40
125
NBM3814x46C15A6yzz (C-Grade)
-20
125
NBM3814x46C15A6yzz (T-Grade),
derating applied, see safe thermal
operating area
-40
100
NBM3814x46C15A6yzz (C-Grade),
derating applied, see safe thermal
operating area
-20
100
Pin Finish
mm / [in]
µin
µin
Thermal
Operating junction temperature
Operating case temperature
Thermal resistance top side
Thermal Resistance Coupling between
top case and bottom case
Thermal resistance bottom side
TINTERNAL
TCASE
RJC_TOP
RHOU
RJC_BOT
°C
Estimated thermal resistance to
maximum temperature internal
component from isothermal top
1.39
°C/W
Estimated thermal resistance of thermal
coupling between the top and bottom
case surfaces
0.51
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
0.83
°C/W
52
Ws/°C
Thermal capacity
Assembly
Storage
Temperature
TST
-40
125
°C
NBM3814x46C15A6yzz (C-Grade)
-40
125
°C
ESDHBM
Human Body Model,
“ESDA / JEDEC JDS-001-2012” Class I-C
(1kV to < 2 kV)
1000
ESDCDM
Charge Device Model,
“JESD 22-C101-E” Class II (200V to
< 500V)
200
ESD Withstand
NBM™ in a VIA Package
Page 14 of 23
NBM3814x46C15A6yzz (T-Grade)
Rev 1.1
05/2016
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NBM3814x46C15A6yzz
General Characteristics (Cont.)
Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
N/A
N/A
N/A
pF
Safety
Isolation capacitance
CHI_LO
Unpowered unit
Isolation resistance
RHI_LO
At 500VDC
MTBF
0
MΩ
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
2.2
MHrs
Telcordia Issue 2 - Method I Case III;
25°C Ground Benign, Controlled
3.6
MHrs
Agency approvals / standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
NBM™ in a VIA Package
Page 15 of 23
Rev 1.1
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NBM3814x46C15A6yzz
NBM in a VIA Package
IHI
ILO
RLO
+
+
K • ILO
VHI
+
IHI_Q
–
V•I
K
+
K • VHI
VLO
–
–
–
Figure 16 — NBM DC model (Forward direction)
The NBM in a VIA package uses a high frequency resonant tank
to move energy from high voltage side to low voltage side and
vice versa. The resonant LC tank, operated at high frequency, is
amplitude modulated as a function of HI side voltage and LO side
current. A small amount of capacitance embedded in the high
voltage side and low voltage side stages of the module is sufficient
for full functionality and is key to achieving high power density.
attributes. Assuming that RLO = 0Ω and IHI_Q = 0A, Eq. (3) now
becomes Eq. (1) and is essentially load independent, resistor R is
now placed in series
with VHI.
The NBM3814x46C15A6yzz can be simplified into the preceeding
model.
R
R
Vin
VHI
At no load:
VLO = VHI • K
V
Vout
LO
Figure 17 — K = 1/3 NBM with series HI side resistor
VLO
(2)
VHI
The relationship between VHI and VLO becomes:
VLO = (VHI – IHI • R) • K
In the presence of load, VLO is represented by:
VLO = VHI • K – ILO • RLO
(3)
IHI – IHI_Q
K
(4)
ILO =
RLO represents the impedance of the NBM, and is a function of the
RDS_ON of the HI side and LO side MOSFETs, PC board resistance of
HI side and LO side boards and the winding resistance of the power
auto-transformer. IHI_Q represents the HI side quiescent current
of the NBM control, gate drive circuitry, and core losses. The
use of DC voltage transformation provides additional interesting
Rev 1.1
05/2016
(5)
Substituting the simplified version of Eq. (4)
(IHI_Q is assumed = 0A) into Eq. (5) yields:
VLO = VHI • K – ILO • R • K2
and ILO is represented by:
NBM™ in a VIA Package
Page 16 of 23
NBM
SAC
1/3
KK==1/32
(1)
K represents the “turns ratio” of the NBM.
Rearranging Eq (1):
K=
+
–
(6)
This is similar in form to Eq. (3), where RLO is used to represent the
characteristic impedance of the NBM™. However, in this case a real
R on the high voltage side of the NBM is effectively scaled by K 2
with respect to the low voltage side.
Assuming that R = 1Ω, the effective R as seen from the low voltage
side is 111mΩ, with K = 1/3.
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A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the high voltage side of the NBM.
A switch in series with VHI is added to the circuit. This is depicted in
Figure 18.
S
VHI
Vin
+
–
CC
NBM
SAC
1/3
KK==1/32
VVout
LO
Low impedance is a key requirement for powering a highcurrent, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a NBM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the NBM is too high. The
impedance of the NBM must be low, i.e. well beyond the
crossover frequency of the system.
A solution for keeping the impedance of the NBM low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
Figure 18 — NBM with HI side capacitor
The two main terms of power loss in the NBM module are:
n No load power dissipation (PHI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
A change in VHI with the switch closed would result in a change in
capacitor current according to the following equation:
n Resistive loss (RLO): refers to the power loss across dVHI
Ic(t) = C
dt
the NBM module modeled as pure resistive impedance.
(7)
Assume that with the capacitor charged to VHI, the switch is
opened and the capacitor is discharged through the idealized NBM.
In this case,
Ic= ILO • K
Pdissipated = PHI_NL + PRLO
Therefore,
PLO_OUT = PHI_IN – Pdissipated = PHI_IN – PHI_NL – PRLO
(8)
C dVLO
•
2
K
dt
(9)
PLO_OUT
PHI_IN – PHI_NL – PRLO
=
=
PHI_INPHI_IN
h
The equation in terms of the LO side has yielded a K 2 scaling factor
for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the low voltage side when expressed in terms of the high side.
With a K = 1/3 as shown in Figure 18, C = 1µF would appear as
C = 9µF when viewed from the low voltage side.
VHI • IHI – PHI_NL – (ILO)2 • RLO
=
VHI • IHI
(
PHI_NL + (ILO)2 • RLO
= 1 –
VHI • IHI
NBM™ in a VIA Package
Page 17 of 23
Rev 1.1
05/2016
(11)
The above relations can be combined to calculate the overall
module efficiency:
substituting Eq. (1) and (8) into Eq. (7) reveals:
ILO =
(10)
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(12)
NBM3814x46C15A6yzz
Filter Design
This enables a reduction in the size and number of capacitors used
in a typical system.
A major advantage of NBM systems versus conventional PWM
converters is that the auto-transformer based NBM does not
require external filtering to function properly. The resonant LC
tank, operated at extreme high frequency, is amplitude modulated
as a function of HI side voltage and LO side current and efficiently
transfers charge through the auto-transformer. A small amount
of capacitance embedded in the HI side and LO side stages of the
module is sufficient for full functionality and is key to achieving
power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
n Guarantee low source impedance:
To take full advantage of the NBM module’s dynamic
response, the impedance presented to its HI side terminals
must be low from DC to approximately 5MHz. The
connection of the bus converter module to its power
source should be implemented with minimal distribution
inductance. If the interconnect inductance exceeds
100nH, the HI side should be bypassed with a RC damper
to retain low source impedance and stable operation. With
an interconnect inductance of 200nH, the RC damper
may be as high as 1µF in series with 0.3Ω. A single
electrolytic or equivalent low-Q capacitor may be used in
place of the series RC bypass.
Thermal Considerations
The VIA™ package provides effective conduction cooling from
either of the two module surfaces. Heat may be removed from the
top surface, the bottom surface or both. The extent to which these
two surfaces are cooled is a key component for determining the
maximum power that can be processed by a VIA, as can be seen
from specified thermal operating area in Figure 1. Since the VIA has
a maximum internal temperature rating, it is necessary to estimate
this internal temperature based on a system-level thermal solution.
To this purpose, it is helpful to simplify the thermal solution into a
roughly equivalent circuit where power dissipation is modeled as
a current source, isothermal surface temperatures are represented
as voltage sources and the thermal resistances are represented as
resistors. Figure 19 shows the “thermal circuit” for the VIA module.
RHOU
–
sacrificing dynamic response:
PDISS
n Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
The module high/low side voltage ranges shall not be
exceeded. An internal overvoltage lockout function
prevents operation outside of the normal operating HI side
range. Even when disabled, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it.
Total load capacitance of the NBM module shall not exceed the
specified maximum. Owing to the wide bandwidth and small LO
side impedance of the module, low-frequency bypass capacitance
and significant energy storage may be more densely and efficiently
provided by adding capacitance at the HI side of the module. At
frequencies <500kHz the module appears as an impedance of RLO
between the source and load.
Within this frequency range, capacitance at the HI side appears as
effective capacitance on the LO side per the relationship
defined in Eq. (13).
CLO_EXT =
NBM™ in a VIA Package
Page 18 of 23
CHI_EXT
K2
Rev 1.1
05/2016
TC_TOP
–
n Further reduce HI side and/or LO side voltage ripple without
Given the wide bandwidth of the module, the source
response is generally the limiting factor in the overall
system response. Anomalies in the response of the HI side
source will appear at the LO side of the module multiplied by
its K factor.
+
RJC_TOP
RJC_BOT
s
TC_BOT
+
s
Figure 19 — Double sided cooling VIA thermal model
In this case, the internal power dissipation is PDISS, R JC_TOP and
R JC_BOT are thermal resistance characteristics of the VIA module and
the top and bottom surface temperatures are represented as TC_TOP,
and TC_BOT. It is interesting to notice that the package itself provides
a high degree of thermal coupling between the top and bottom
case surfaces (represented in the model by the resistor RHOU). This
feature enables two main options regarding thermal designs:
n Single side cooling: the model of Figure 19 can be simplified by
calculating the parallel resistor network and using one simple thermal resistance number and the internal power dissipation curves; an example for bottom side cooling only is shown in
Figure 20.
In this case, R JC can be derived as following:
RJC =
(RJC_TOP + RHOU) • RJC_BOT
RJC_TOP + RHOU + RJC_BOT
(13)
vicorpower.com
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NBM3814x46C15A6yzz
VHI
+ TC_BOT
ZHI_EQ1
NBM™1
ZLO_EQ1
R0_1
VLO
–
RJC
s
ZHI_EQ2
NBM™2
PDISS
ZLO_EQ2
R0_2
+ DC
s
Figure 20 — Single-sided cooling VIA thermal model
Load
ZHI_EQn
NBM™n
ZLO_EQn
R0_n
n Double side cooling: while this option might bring limited
advantage to the module internal components (given the
surface-to-surface coupling provided), it might be appealing
in cases where the external thermal system requires allocating
power to two different elements, like for example heatsinks with
independent airflows or a combination of chassis/air cooling.
Current Sharing
Figure 21 — NBM module array
The fuse shall be selected by closely matching system
requirements with the following characteristics:
n Current rating
The performance of the NBM in a VIA package is based on efficient
transfer of energy through an auto-transformer without the need
of closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal auto-transformer with a positive
temperature coefficient series resistance.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
When multiple NBM modules of a given part number are
connected in an array they will inherently share the load current
according to the equivalent impedance divider that the system
implements from the power source to the point of load.
Some general recommendations to achieve matched array
impedances include:
n Dedicate common copper planes/wires within the PCB/Chassis
to deliver and return the current to the VIA modules.
n Provide as symmetric a PCB/Wiring layout as possible among
VIA™ modules
For further details see AN:016 Using BCM Bus Converters
in High Power Arrays.
Fuse Selection
(usually greater than maximum current of NBM module)
n Maximum voltage rating
(usually greater than the maximum possible input voltage)
n Ambient temperature
n Nominal melting I2t
n Recommend fuse: ≤60A Littelfuse TLS Series (HI side)
Startup and Reverse Operation
The NBM3814x46C15A6yzz is capable of startup in forward and
reverse direction once the applied voltage is greater than the
undervoltage lockout threshold.
The non-isolated bus converter modules are capable of reverse
power operation. Once the unit is enabled, energy can be
transferred from low voltage side back to the high voltage side
whenever the low side voltage exceeds VHI • K. The module will
continue operation in this fashion for as long as no faults occur.
Startup loading could be set to no greater than 20% of rated max
current respectively in forward or reverse direction. A load must
not be present on the +VHI pin if the powertrain is not actively
switching. Remove +HI load prior to disabling the module using
+LO power or prior to faults. High voltage side MOSEFT body diode
conduction will occur if unit stops switching while a load is present
on the +VHI and +VLO voltage is two diodes drop higher than +VHI.
In order to provide flexibility in configuring power systems, NBM in
a VIA package modules are not internally fused. Input line fusing of
NBM in a VIA package products is recommended at system level to
provide thermal protection in case of catastrophic failure.
NBM™ in a VIA Package
Page 19 of 23
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NBM™ in a VIA Package
Page 20 of 23
Rev 1.1
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800 927.9474
NA
1.150 [29.200]
1.277 [32.430]
1.277 [32.430]
1.61 [40.93]
1.02 [25.96]
1.61 [40.93]
1.61 [40.93]
1.02 [25.96]
1.02 [25.96]
1.61 [40.93]
1.61 [40.93]
1.61 [40.93]
1.61 [40.93]
2814 (1 STAGE) 2223
2814 (0 STAGE) 3623
3414 (1 STAGE) 3623
3714 (1 STAGE) 4623
3814 (0 STAGE) 2361
3814 (0 STAGE) 2361 NBM
4414 (1 STAGE) 2361
4414 (1 STAGE) 6123
5614 (1 STAGE) 2392
5614 (1 STAGE) 9223
2.970 [75.445]
2.490 [63.250]
1.757 [44.625]
1.277 [32.430]
.789 [20.033]
.789 [20.033]
NA
DIM 'B'
DIM 'A'
1.02 [25.96]
PRODUCT
5.57 [141.37]
5.57 [141.37]
4.35 [110.55]
4.35 [110.55]
3.76 [95.59]
3.76 [95.59]
3.75 [95.12]
3.38 [85.93]
2.80 [70.99]
2.84 [72.05]
2.25 [57.11]
DIM 'C'
$//352'8&76
DIM 'A'
2214 (0 STAGE) 2223
.11
2.90
1.171
29.750
INPUT
INSERT
(41816)
TO BE
REMOVED
PRIOR
TO USE
.37±.015
9.40±.381
DIM 'B'
DIM 'C'
127(6
5(029('
35,25
7286(
287387
,16(57
6((352'8&7'$7$6+((7)253,1'(6,*1$7,216
5R+6&203/,$173(5&67/$7(675(9,6,21
.15
3.86
THRU
(4) PL.
1.40
35.54
NBM3814x46C15A6yzz
NBM in VIA Package Chassis (Lug) Mount Package Mechanical Drawing
NBM™ in a VIA Package
Page 21 of 23
Rev 1.1
05/2016
vicorpower.com
800 927.9474
.11
2.90
.947±.010
24.058±.254
.112±.010
2.846±.254
1.171±.010
29.750±.254
.080
2.032
(6) PL.
.37±.015
9.40±.381
2
1
DIM 'A'
DIM 'F'
±.010 [.254]
11
10
.182 [4.613]
LONG
BOTTOM VEW
DIM 'B'
±.010 [.254]
DIM 'D'
±.010 [.254]
.103 [2.607]
SHORT
DIM 'L'
TOP VIEW
(COMPONENT SIDE)
DIM 'C'
13
12
4
3
0
.150
3.810
(2) PL.
.156±.010
3.970±.254
.859±.010
21.810±.254
SEATING
PLANE
DIM 'L'
±.010 [.254]
1.171±.003
29.750±.076
1.40
35.54
.947±.003
24.058±.076
.112±.003
2.846±.076
.120±.003
3.048±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(6) PL
12
1.277 [32.430]
5614 (1 STAGE) 2392
1.61 [40.93]
2- SEE PRODUCT DATA SHEET FOR PIN DESIGNATIONS.
2.490 [63.250]
1.277 [32.430]
3814 (0 STAGE) 2361 NBM
1.61 [40.93]
1.02 [25.96]
4414 (1 STAGE) 2361
DIM 'B'
1.277 [32.430]
DIM 'A'
1.02 [25.96]
PRODUCT
3814 (0 STAGE) 2361
(COMPONENT SIDE)
DIM 'D'
±.003 [.076]
13
RECOMMENDED HOLE PATTERN
10
11
DIM 'B'
±.003 [.076]
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
NOTES:
1
2
DIM 'F'
±.003 [.076]
DIM 'C'
5.57 [141.37]
4.35 [110.55]
3.76 [95.59]
3.76 [95.59]
DIM 'D'
.156±.003
3.970±.076
5.171 [131.337]
1.439 [36.553]
1.439 [36.553]
.850 [21.590]
.850 [21.590]
DIM 'F'
.859±.003
21.810±.076
3.957 [100.517]
3.368 [85.554]
3.368 [85.554]
3
4
.190±.003
4.826±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(2) PL
NBM3814x46C15A6yzz
NBM in VIA Package PCB (Board) Mount Package Mechanical Drawing and Recommended Hole Pattern
NBM3814x46C15A6yzz
Revision History
Revision
Date
1.0
03/3/16
Initial release
n/a
1.1
05/2/16
New Power Pin Nomenclature
All
NBM™ in a VIA Package
Page 22 of 23
Description
Rev 1.1
05/2016
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Page Number(s)
NBM3814x46C15A6yzz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power
systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls
are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of
all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
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In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the
“Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment
and is not transferable.
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for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes
no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and
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Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact
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product was defective within the terms of this warranty.
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VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support
devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products
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Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
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The products described on this data sheet are protected by the following U.S. Patents Pending
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Andover, MA, USA 01810
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Fax: 978-475-6715
email
Customer Service: [email protected]
Technical Support: [email protected]
NBM™ in a VIA Package
Page 23 of 23
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