ON NLA16T245DTR2G Configurable dual-supply translating transceiver with 3-state output Datasheet

NLA16T245
16-Bit (Dual 8-Bit)
Configurable Dual-Supply
Translating Transceiver
with 3-State Outputs
The NLA16T245 is a 16−bit (dual 8−bit) configurable dual−supply
translating bidirectional transceiver with 3−state outputs. The A− and
B−ports are designed to track two different power supply rails, VCCA
and VCCB respectively. Both supply rails are configurable from 0.9 V
to 4.5 V allowing universal bidirectional voltage translation between
the A− and B−ports.
The Direction inputs, 1DIR and 2DIR, determine the direction of
data flow. 1DIR and 2DIR are independent of each other. When 1DIR
or 2DIR is High, data flows from 1An to 1Bn or 2An to 2Bn
respectively. When 1DIR or 2DIR is Low, data flows from 1Bn to 1An
or 2Bn to 2An respectively. The Output Enable inputs, and , when
High, disables both A− and B−ports by putting them in 3−state. The
1DIR, 2DIR, and signals are all designed to track VCCA.
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1
MARKING DIAGRAM
NLA16T245G
AWLYYWW
Features
• Wide VCCA and VCCB Operating Range: 0.9 V to 4.5 V
• Output Noise Reduction through Dynamic Output Impedance
•
•
•
•
•
•
•
•
•
Change
Drive Capability: ±12 mA @ 3.0 V VCC
Input/Output Pins OVT to 5.5 V
Control Inputs Track VCCA
Non−preferential VCC Sequencing
Outputs at 3−State until Active VCC is reached
Power−Off Protection
Outputs Switch to 3−State with either VCC at GND
Pb−Free Packaging: TSSOP−48
This is a Pb−Free Device
TSSOP−48
DT SUFFIX
CASE1201
1
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NLA16T245DTR2G
TSSOP−48
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
Important Information
• ESD Protection for All Pins:
Human Body Model (HBM) > 2000 V
Machine Model (MM) > 200 V
© Semiconductor Components Industries, LLC, 2013
September, 2013 − Rev. 0
1
Publication Order Number:
NLA16T245/D
NLA16T245
Figure 1. Logic Diagram
Figure 2. Pin Assignment
Pin Names
Function table
Pins
Description
nOE
nDIR
Operating Mode
VCCA
A−Port DC Power Supply
L
L
nB to nA
VCCB
B−Port DC Power Supply
L
H
nA to nB
GND
Ground
H
X
nA and nB Ports at Hi−Z
1OE, 2OE
Output Enable Pins
1DIR, 2DIR
Direction Select Pins
1An, 2An
A−Port I/O
1Bn, 2Bn
B−Port I/O
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2
NLA16T245
MAXIMUM RATINGS
Symbol
VCCA, VCCB
VI
Parameter
Value
DC Supply Voltage
Input Voltage
nOE, nDIR, nA
nB
VO
Condition
−0.5 to +5.5
Output Voltage
V
−0.5 to +4.6
VCCA = 0 V
−0.5 to +5.5
VCCA ≥ 0.9 V
−0.5 to +4.6
VCCB = 0 V
−0.5 to +5.5
VCCB ≥ 0.9 V
(Power−Off Mode) nA, nB
−0.5 to +5.5
VCCA or VCCB = 0
(3−State Mode) nA, nB
−0.5 to +5.5
VCCA, VCCB ≥ 0.9 V
(Active Mode − High or Low State) nA
−0.5 to VCCA + 0.5
VCCA, VCCB ≥ 0.9 V
(Active Mode − High or Low State) nB
−0.5 to VCCB + 0.5
IIK
DC Input Diode Current
IOK
DC Output Diode Current
nOE, nDIR
Unit
V
V
−50
VI < GND
mA
−50
VO < GND
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +125
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCCA, VCCB
Parameter
Input Voltage
VO
Output Voltage
Dt/DV
Max
Unit
0.9
4.5
V
GND
4.5
V
(Power Down) nA, nB
GND
4.5
V
(3−State Mode) nA, nB
GND
4.5
(Active Mode − High or Low State) nA
GND
VCCA
(Active Mode − High or Low State) nB
GND
VCCB
−55
+115
°C
0
10
nS
Positive DC Supply Voltage
VI
TA
Min
Operating Temperature Range
Input Transition Rise or Rate
VI, VIO from 30% to 70% of VCC; VCC =3.3 V ± 0.3 V
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NLA16T245
DC ELECTRICAL CHARACTERISTICS (INPUT)
Symbol
Parameter
Test Conditions
VIH
Input HIGH Voltage,
Data Inputs
VIL
VIH
VIL
Input LOW Voltage,
Data Inputs
Input HIGH Voltage,
Control Inputs
Input LOW Voltage,
Control Inputs
VCCO (Note 2)
(V)
Min
3.6 − 4.5
0.9 − 4.5
2.2
2.7 − 3.6
2.0
1.95 − 2.7
1.7
1.2 − 1.95
0.65 * VCCI
0.9 − 1.2
0.9 * VCCI
Referenced to VCCA
Max
0.8
2.7 − 3.6
0.8
0.7
0.9 − 4.5
1.2 − 1.95
0.35 * VCCI
0.9 − 1.2
0.1 * VCCI
3.6 − 4.5
2.2
2.7 − 3.6
2.0
1.95 − 2.7
1.6
1.2 − 1.95
0.65 * VCCA
0.9 − 1.2
0.9 * VCCA
0.8
2.7 − 3.6
0.8
1.95 − 2.7
0.7
1.2 − 1.95
0.35 * VCCA
0.9 − 1.2
0.1 * VCCA
Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up
sequence of VCCA and VCCB will not damage the IC.
1. VCCI is the VCC associated with the input port.
2. VCCO is the VCC associated with the output port.
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V
V
3.6 − 4.5
NOTE:
Unit
V
3.6 − 4.5
1.95 − 2.7
Referenced to VCCA
−555C to +1155C
VCCI (Note 1)
(V)
V
NLA16T245
DC ELECTRICAL CHARACTERISTICS (continued)
−555C to +1155C
Symbol
VOH
VOL
Parameter
Output HIGH Voltage
Output LOW Voltage
VCCA (V)
VCCB (V)
Min
IOH = −100 mA; VI = VIH
0.9 − 4.5
0.9 − 4.5
VCCO − 0.2
IOH = −0.5 mA; VI = VIH
0.9
0.9
0.75 * VCCO
IOH = −2 mA; VI = VIH
1.4
1.4
1.05
IOH = −4 mA; VI = VIH
1.65
1.65
1.2
IOH = −8 mA; VI = VIH
2.3
2.3
1.75
IOH = −12 mA; VI = VIH
3.0
3.0
2.3
IOH = −12 mA; VI = VIH
4.5
4.5
4.0
IOL = 100 mA; VI = VIL
0.9 − 4.5
0.9 − 4.5
0.2
IOL = 0.5 mA; VI = VIL
0.9
0.9
0.25 * VCCO
IOL = 2 mA; VI = VIL
1.4
1.4
0.35
IOL = 4 mA; VI = VIL
1.65
1.65
0.45
IOL = 8 mA; VI = VIL
2.3
2.3
0.55
IOL = 12 mA; VI = VIL
3.0
3.0
0.7
Test Conditions
IOL = 12 mA; VI = VIL
II
IOFF
IOZ(3)
ICCA
ICCB
Input Leakage Current
VI = VCCA or GND
Power−Off Leakage
Current
VI or VO = 0 to 4.5 V,
3−State Output
Leakage Current
Quiescent Supply
Current
Quiescent Supply
Current
4.5
4.5
0.75
0.9 − 4.5
±2.5
nA
0
0 − 4.5
±10.0
nB
0 − 4.5
0
±10.0
nA, nB
3.6
3.6
±12.5
nA
3.6
0
±12.5
0
3.6
±12.5
0.9
0.9
20
VI = VIH or VIL, VO = VCCO
or GND, nOE = don’t care
nB
VI = VCCI or GND; IO = 0
VI = VCCI or GND; IO = 0
NOTE:
1.6
1.6
20
1.95
1.95
20
2.7
2.7
30
0
3.6
−40
3.6
0
40
3.6
3.6
40
0
4.5
−40
4.5
0
40
4.5
4.5
40
0.9
0.9
20
1.6
1.6
20
1.95
1.95
20
2.7
2.7
30
0
3.6
−40
3.6
0
40
3.6
3.6
40
0
4.5
−40
4.5
0
40
4.5
4.5
40
Connect ground before applying supply voltage VCCA or VCCB. This device is designed with the feature that the power−up
sequence of VCCA and VCCB will not damage the IC.
3. VCCI is the VCC associated with the input port.
4. VCCO is the VCC associated with the output port.
5. For I/O ports, the parameter IOZ includes the input leakage current.
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Unit
V
0.9 − 4.5
nOE
VI = VIH or VIL, VO = VCCO
or GND, nOE = VIH
Max
V
mA
mA
mA
mA
mA
NLA16T245
AC ELECTRICAL CHARACTERISTICS − See Figure 3
−555C to +1155C
VCCB (V)
4.0 − 4.5
Symbol
Parameter
3.0 − 3.6
2.3 − 2.7
1.65 − 1.95
1.4 − 1.6
From
To
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
A
B
0.5
3.2
0.3
3.2
0.7
3.5
0.8
4.2
0.4
4
ns
B
A
0.3
4.5
0.5
5.8
0.5
6
0.7
6.3
1.2
6.8
A
0.2
9.5
1.0
7.7
0.9
8
1.0
9
0.8
8.5
B
0.8
4.5
1.2
4.8
1.4
6.7
1.8
7
1.6
7.5
A
0.8
5.6
1.0
5.6
1.1
5.6
1.1
5.7
1.2
5.7
B
1.2
6
1.2
6.1
1.1
6
2.6
9.2
2.3
9.6
VCCA = 4.0 − 4.5 V
tPD
Propagation
Delay
tEN
Output Enable
tDIS
Output Disable
tOSK
Output to Output Skew
0.15
0.15
0.15
0.15
0.15
ns
ns
ns
VCCA = 3.0 − 3.6 V
tPD
Propagation
Delay
tEN
Output Enable
tDIS
Output Disable
tOSK
Output to Output Skew
A
B
0.5
3.5
0.5
3.1
0.5
3.7
0.7
5.4
0.5
5.9
B
A
0.6
5.5
0.4
5.5
0.7
5.5
0.7
5.8
1.0
6.5
A
0.8
10
1.0
8
1.3
8.0
1.4
9.2
1.3
8.7
B
1.0
5
1.9
4.9
2.0
5.4
1.9
6.7
0.8
7.4
A
1.5
6
1.5
5.4
1.2
5.8
1.6
5.2
1.4
5.4
B
1.7
6.4
1.5
6.1
1.1
5.8
1.7
8.5
1.2
8.8
0.15
0.15
0.15
0.15
0.15
ns
ns
ns
ns
VCCA = 2.3 − 2.7 V
tPD
Propagation
Delay
tEN
Output Enable
tDIS
Output Disable
tOSK
Output to Output Skew
A
B
0.7
4
0.5
3.4
0.4
4.0
0.7
5.6
0.2
6.0
B
A
0.6
4.7
0.5
5.3
0.6
5.0
1.2
5.8
1.0
6.1
A
0.9
12
2.0
9.0
1.7
7.0
1.6
7.9
1.6
8.0
B
0.7
5.7
1.5
5.3
2.2
6.1
2.2
7.0
1.2
7.8
A
2
6.8
1.6
6.2
0.7
6.5
1.5
6.0
2.0
6.5
B
1.2
6
1.4
6.0
1.0
5.6
1.7
8.2
0.9
9.0
0.15
0.15
0.15
0.15
0.15
ns
ns
ns
ns
VCCA = 1.65 − 1.95 V
tPD
Propagation
Delay
tEN
Output Enable
tDIS
Output Disable
tOSK
Output to Output Skew
A
B
1.1
4.2
0.8
4.3
0.9
4.7
1.0
6.0
0.6
6.4
B
A
1.2
4.5
1.3
5.5
0.9
5.8
1.8
6.7
1.4
6.5
A
2.2
9.7
2.0
8.5
2.2
8.9
2.1
9.5
2.5
10.0
B
0.5
8.2
2.7
8.1
2.7
8.1
2.7
8.3
1.8
9.0
A
2
9.3
1.8
8.0
1.5
8.0
2.5
8.8
2.1
8.6
B
1.8
6.2
2.0
6.1
1.0
5.5
2.5
8.3
2.1
8.8
0.15
0.15
0.15
0.15
0.15
ns
ns
ns
ns
VCCA = 1.4 − 1.6 V
tPD
Propagation
Delay
A
B
1.2
5
1.3
5.8
1.0
5.5
1.5
6.3
1.7
6.7
B
A
1
5.5
0.7
7.3
0.9
7.6
1.5
7.4
1.8
6.8
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ns
NLA16T245
AC ELECTRICAL CHARACTERISTICS − See Figure 3
−555C to +1155C
VCCB (V)
4.0 − 4.5
Symbol
Parameter
From
3.0 − 3.6
2.3 − 2.7
1.65 − 1.95
1.4 − 1.6
To
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
A
3
11.5
2.1
10.5
2.3
10.5
2.7
12.0
2.6
12.8
B
2
10
3.2
10.7
3.2
10.8
3.2
10.2
2.7
10.6
A
3
12
2.0
10.5
1.7
10.5
2.5
9.5
2.1
9.7
B
1.2
6
1.3
6.4
1.1
6.5
2.5
8.5
2.1
8.8
Unit
VCCA = 1.4 − 1.6 V
tEN
tDIS
tOSK
Output Enable
Output Disable
Output to Output Skew
0.15
0.15
0.15
ns
ns
0.15
0.15
ns
Test Conditions
Typ
(Note 6)
Unit
CAPACITANCES
Symbol
Parameter
Output State
CIN
Control Pin Input Capacitance
VI = 3.3 V or GND
3.5
pF
CI/O
I/O Pin Input Capacitance
VO = 3.3 V or GND
5.0
pF
CPDA
(Note 7)
CPDB
(Note 7)
Power Dissipation Capacitance per
Enabled
14.0
Transceiver, A−Port Input, B−Port Output
Disabled
Power Dissipation Capacitance per
Enabled
Transceiver, B−Port Input, A−Port Output
Disabled
7.0
Power Dissipation Capacitance per
Enabled
14.0
Transceiver, A−Port Input, B−Port Output
Disabled
Power Dissipation Capacitance per
Enabled
Transceiver, B−Port Input, A−Port Output
Disabled
CL = 0 pF, f = 10 MHz
CL = 0 pF, f = 10 MHz
6. Typical values are at VCCA = VCCB = 3.3 V, TA = +25°C.
7. CPD is defined as the value of the IC’s equivalent capacitance from which the operating current can be calculated from:
ICC(operating) ≈ CPD x VCC x fIN x NSW where ICC = ICCA + ICCB and NSW = total number of outputs switching.
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7.0
20.0
7.0
20.0
7.0
pF
pF
NLA16T245
Figure 3. Load Circuit and Voltage Waveforms
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NLA16T245
PACKAGE DIMENSIONS
TSSOP−48
CASE 1201
ISSUE B
48X
K
K1
K REF
0.12 (0.005)
M
T U
S
V
T U
S
J J1
25
0.254 (0.010)
M
48
SECTION N−N
B
−U−
L
1
N
24
A
−V−
PIN 1
IDENT.
DETAIL E
D
0.076 (0.003)
−T− SEATING
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
N
M
F
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSIONS A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
S
0.25 (0.010)
C
−W−
DETAIL E
H
G
RECOMMENDED
SOLDERING FOOTPRINT*
48X
48X
0.32
1.00
8.45
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MILLIMETERS
MIN
MAX
12.40
12.60
6.00
6.20
−−−
1.10
0.05
0.15
0.50
0.75
0.50 BSC
0.37
−−−
0.09
0.20
0.09
0.16
0.17
0.27
0.17
0.23
7.95
8.25
0_
8_
INCHES
MIN
MAX
0.488
0.496
0.236
0.244
−−−
0.043
0.002
0.006
0.020
0.030
0.0197 BSC
0.015
−−−
0.004
0.008
0.004
0.006
0.007
0.011
0.007
0.009
0.313
0.325
0_
8_
NLA16T245
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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For additional information, please contact your local
Sales Representative
NLA16T245/D
NLA16T245
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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