ON NCV7748 Automotive lin low-side relay driver Datasheet

NCV7748
Automotive LIN Low-Side
Relay Driver
Features
OUTPUT DRIVERS
• Low−side Drivers, 8 Channels
♦ OUT4 & OUT8 0.75 A, RDSon 0.8 W (typ), 1.6 W (max)
♦ OUT1−3 & OUT5−7 0.6 A, RDSon 1.5 W (typ), 3.0 W (max)
• Low Quiescent Current in Sleep Mode
• Fault Reporting
• Global Over Temperature Detection and Shutdown
• Power−on Reset and Undervoltage Detection
LIN−Bus INTERFACE
• Integrated LIN Physical Layer Compliant to SAE J2602/LIN2.x
• Integrated State Machine for SAE J2602 Compliant LIN Protocol
Handling and the LIN Message Decoding
• Virtual LIN Node Concept to Drive up to 32 Relays using One LIN
Node Address with up to Four Slaves Devices
• Device Node Address (NAD) Selectable by External Resistor
• LIN Bus Short−circuit Protection to Supply and Ground
• Automatic Bit Rate Synchronization
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
MARKING
DIAGRAM
14
14
1
SOIC−14
D2 SUFFIX
CASE 751A
NCV7748G
AWLYWW
1
NCV7748 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb−Free Package
PIN CONNECTIONS
VBB
LIN
GND
OUT5
OUT6
OUT7
OUT8
1
14
2
13
3
12
4
5
NCV7748
The NCV7748 is an automotive eight channel low−side driver
providing drive capability up to 0.75 A per channel. Output control is
via a LIN bus with optimized LIN command set allowing high
flexibility while still maintaining compliance to SAE J2602 LIN
specification.
Each output driver includes an output clamp for inductive loads.
All output drivers have overcurrent detection implemented.
Selected low side drivers (OUT4,8) offer additional reporting of faults
for open load (or short to ground) and individual over temperature
conditions which allows connection to a wiring harness outside of the
module.
The NCV7748 is available in an SOIC14 package.
11
10
6
9
7
8
CONF
NAD
GND
OUT1
OUT2
OUT3
OUT4
(Top Views)
ORDERING INFORMATION
See detailed ordering and shipping information on page 29 of
this data sheet.
Typical Applications
•
•
•
•
•
Power Distribution Box (PDB); Power Distribution Center (PDC)
Body Junction Box (BJB); Engine Junction Box (EJB)
Rear Junction Box (RJB); Body Electrical Center (BEC)
Interior Electrical Center (IEC); Rear Electrical Center (REC)
Underhood Electrical Center (UEC); Junction Box (JB)
© Semiconductor Components Industries, LLC, 2017
July, 2017 − Rev. 1
1
Publication Order Number:
NCV7748/D
NCV7748
Bias , Supply monitoring & POR
Prime Pull-Up
(Normal mode)
Rslave_LIN
(33k) Prime
only
LIN
Receiver
Driver &
Slope
Control
OUT1
LIN Protocol & Output
Digital Logic
ILIN_off_dom_slp
(15 μA)
VBB
41V (typ)
OUT2
OUTx
1.5 Ohm
(typ)
OUT5
OUT6
Fault
Overcurrent
NAD
Position of
device in
Virtual Node
OUT4
OUTx
NAD
OUT8
0. 8 Ohm
(typ)
Thermal Shutdown
Fault
ADC
CONF
Overcurrent
Open Load
Figure 1. Block Diagram
www.onsemi.com
2
OUT7
Global Thermal Shutdown
41V (typ)
GND
GND
OUT3
NCV7748
Table 1. PIN FUNCTION DESCRIPTION, NCV7748
Pin No.
Pin Name
Pin Type
Description
1
VBB
Battery supply input
2
LIN
LIN bus interface
3
GND (Note 1)
Ground
4
OUT5
LS driver
Channel 5 Low−side drive output, Ron = 1.5 W (typ)
5
OUT6
LS driver
Channel 6 Low−side drive output, Ron = 1.5 W (typ)
6
OUT7
LS driver
Channel 7 Low−side drive output, Ron = 1.5 W (typ)
7
OUT8
LS driver
Channel 8 Low−side drive output, Ron = 0.8 W (typ)
8
OUT4
LS driver
Channel 4 Low−side drive output, Ron = 0.8 W (typ)
9
OUT3
LS driver
Channel 3 Low−side drive output, Ron = 1.5 W (typ)
10
OUT2
LS driver
Channel 2 Low−side drive output, Ron = 1.5 W (typ)
Channel 1 Low−side drive output, Ron = 1.5 W (typ)
Battery connection
LIN bus pin, low in dominant state
Ground connection
11
OUT1
LS driver
12
GND (Note 1)
Ground
13
NAD
LV analog input/output
Node Addressing via external resistor (NAD selection)
14
CONF
LV analog input/output
Defines virtual node configuration position via external resistor
Ground connection
NOTE: (LV = Low Voltage)
1. Pins 3 and 12 must be shorted externally.
Table 2. EXTERNAL COMPONENTS SPECIFICATION (See Figure 2)
2.
3.
4.
5.
Component
Function
Value
Unit
Tolerance
CVBB
Decoupling capacitor on battery line, ceramic (X7R)
100
nF
20%
CBulk
Bulk capacitor (energy storage)
RNAD
Resistor for defining NAD of device
Depends on minimum battery voltage profile requirements
475 (Note 2)
W
1% (Note 5)
RCONF1
Resistor for defining device’s position in virtual node
10.0 (Note 3)
kW
1% (Note 5)
RCONF2
Resistor for defining device’s position in virtual node
1.00 (Note 4)
kW
1% (Note 5)
D1 – D2
Power supply diode for relays and NCV7748
e.g. MRA4003T3G
DESD
Optional LIN ESD protection diode
e.g. NUP1105LT1G or MMBZ27x
Node Address = 0x60
Position of device in the virtual node = A′
Position of device in the virtual node = B
This tolerance is required for every value of used resistors on NAD and CONF pins selected according to Table 6 and Table 7.
The initial 1% tolerance of resistors must not get worse than 3% over the application life time.
www.onsemi.com
3
NCV7748
Virtual LIN node(one NAD)
RNAD = 475Ω à NAD = 0x60
Optional
D1
VBat
LIN BUS
D2
VS
NCV7748
Optional
VBB
C Bulk
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
CVBB
Optional
LIN
R NAD
NAD
R CONF1
DESD
CONF
GND
GND
VBB
Slave A’
NCV7748
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
CVBB
LIN
R NAD
NAD
R CONF2
CONF
GND
GND
Slave B
Slave C
Slave D
Figure 2. Application Diagram
www.onsemi.com
4
NCV7748
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Unit
Vmax_VBB
Power supply voltage
−0.3
+40
V
Vmax_LIN
DC voltage on LIN pin
−40
+40
V
OUT pins voltage range DC
(voltage internally limited during flyback)
−0.3
38
V
45
V
A
Vmax_OUTx
Vmax_OUTx_peak
Imax_OUT4,8
Imax_OUT1−3,5−7
Clmp_sing
Clmp_rep
OUT pins peak voltage range
Internally limited. Applies to VBB range from 0 V to Vmax_VBB
(powered and unpowered modes)
Maximum OUT4,8 pin current
−0.2
1.3
Maximum OUT1−3, 5−7 pin current
−0.2
1.2
Clamping energy
Maximum (single pulse)
OUT1−3, 5−7 (IOUT = 300 mA, TA = 150°C)
OUT4,8 (IOUT = 400 mA, TA = 150°C)
Repetitive (multiple) 2M pulses, VBB = 15 V, 63 W, 390 mH, TA = 25°C
A
mJ
−
−
40
65
CONF pin DC maximum voltage
−0.3
3.6
V
Vmax_NAD
NAD pin DC maximum voltage
−0.3
3.6
V
RSC_level
AEC Q100−012
Short Circuit Reliability Characterization
Grade A
(minimum of
1 million of cycles)
Vmax_CONF
ESD Human Body Model
(100 pF, 1500 W)
ESD following IEC
61000−4−2 (150 pF, 330 W)
kV
All pins
−2
+2
Pin LIN to GND
−6
+6
Valid for pins VBB to GND and LIN to GND
VBB pin with reverse−protection and filtering capacitor
−6
+6
kV
Junction temperature
−40
+150
°C
Tstg
Storage Temperature Range
−55
+150
°C
MSL
Moisture Sensitivity Level (max. 260°C processing)
Tj_mr
3
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 4. THERMAL CHARACTERISTICS
Value
Unit
Rth_ja_1
Rth_jc_1
Rtj_jl_1
Symbol
Thermal Resistance, Junction−to−Ambient (1S0P) (Note 6)
Thermal Resistance, Junction−to−Case (1S0P) (Note 6)
Thermal Resistance, Junction−to−Lead (1S0P) (Note 6)
Parameter
88
30
61
°C/W
Rth_ja_2
Rth_jc_2
Rth_jl_2
Thermal Resistance, Junction−to−Ambient (2S2P) (Note 7)
Thermal Resistance, Junction−to−Case (2S2P) (Note 7)
Thermal Resistance, Junction−to−Lead (2S2P) (Note 7)
62
30
52
6. Based on JESD51−3, 1.2 mm thick FR4, 1S0P PCB with 2 oz. copper to 645 mm2 spreader. Thermal Information is based on dissipating
125 mW on OUT1−3, 5−7 low−side drivers and 625 mW on OUT4 & 8 low−de drivers.
7. Based on JESD51−7, 1.2 mm thick FR4, 2S2P PCB with 2 oz. copper. Thermal Information is based on dissipating 125 mW on all eight output
drivers.
www.onsemi.com
5
NCV7748
Table 5. ELECTRICAL CHARACTERISTICS 6 V ≤ VBB ≤ 18 V, −40°C ≤ Tj ≤ 150°C; unless otherwise specified; RL(LIN−VBB) =
500 W, unless otherwise specified. Typical values are given at V(VBB) = 12 V and TJ = 25°C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Functional (Note 8)
4
−
38
V
Parameter specification
6
−
18
VBB SUPPLY
VBB
Supply Voltage
VBB_PORH
VBB POR threshold
VBB rising
3.2
−
4
V
VBB_PORL
VBB POR threshold
VBB falling
3
−
3.7
V
VBB_UV_H
UV−threshold voltage high level
VBB rising (Note 8)
4
−
5
V
VBB_UV_L
UV−threshold voltage low level
VBB falling (Note 8)
3.8
−
4.7
V
8. Below 5 V on VBB in normal mode, the LIN bus will either stay recessive or comply with the voltage level specifications and transition time
specifications as required by SAE J2602. It is ensured by the battery monitoring circuit (VBB_UV). Between VBB_UV and VBB_POR levels, OUTx pins status remains as commanded before undervoltage event. Above 18 V on VBB, LIN communication is operational (LIN
pin toggling) but parameters are not guaranteed.
Normal mode, bus communication off,
VLIN = VBB
−
−
5
mA
VBB consumption in Normal mode, Normal mode, bus communication on,
LIN active
VLIN = Low, No Load
−
−
10
mA
I_VBB_sleep
VBB consumption in Sleep mode
Sleep mode
−
−
50
mA
I_ VBB _sleep_i
VBB consumption in Sleep mode
VBB = 12.8V; VLIN = VBB ; Tj = 25°C
Guaranteed by design and prototype
evaluations, not tested in production
−
−
20
mA
Ron_OUT1−3,5−7
On−resistance to ground
OUT1−3 and OUT5−7
I(OUTx) = 90 mA
−
1.5
3
W
Ron_OUT4,8
On−resistance to ground
OUT4 and OUT8
I(OUTx) = 340 mA
−
0.8
1.6
W
I_det_OUT4,8
Overcurrent Detection Current
OUT4 and OUT8
OUTx = VBB
0.75
−
1.3
A
I_det_OUT1−3,5−7
Overcurrent Detection Current
OUT1−3, OUT5−7
OUTx = VBB
0.6
−
1.2
A
Ileak_OUT1−8_r
Output leakage current in sleep
mode (Note 9)
OUTx = VBB = 13.5 V, Tj = 25°C
Guaranteed by design and prototype
evaluations, not tested in production
−
−
1
mA
Ileak_OUT1−8
Output leakage current in sleep
mode (Note 9)
OUTx = VBB = 13.5 V
−
−
5
mA
I(OUTx) = 90 mA
38
−
45
V
I_VBB_norm
I_VBB_norm_c
VBB consumption in Normal mode
OUT DRIVERS
Vclmp_OUT1−3,5−7 Output clamp voltage
Vclmp_OUT4,8
Output clamp voltage
I(OUTx) = 340 mA
38
−
45
V
V_diode
_OUT1−3,5−7
Output Body Diode Voltage
I(OUTx) = −90 mA
−
−
1.1
V
V_diode _OUT4,8
Output Body Diode Voltage
I(OUTx) = −340 mA
−
−
1.1
V
V_th_open
Open Load Detection Threshold
Voltage (OUT4, OUT8)
1
−
2.5
V
I_th_open
Open Load Diagnostic Sink Current 1 V < OUTx < 13.5 V, Normal mode,
(OUT4, OUT8)
drivers commanded OFF
50
100
140
mA
9. In normal mode I_th_open load diagnostic current is flowing and does not allow a leakage current measurement.
MODE TRANSITIONS AND TIMEOUTS
T_init
T_go_to_sleep
T_go_to_sleep_i
Sleep transition time after LIN
wake−up detected
(Duration of INIT mode)
See Figure 5
−
−
10
ms
Time to go to sleep
No communication on LIN
and/or undervoltage
4
−
10
s
Time to go to sleep after LIN
frame received
10.417 kbps or 19.2 kbps
frame received
4
−
5
s
www.onsemi.com
6
NCV7748
Table 5. ELECTRICAL CHARACTERISTICS 6 V ≤ VBB ≤ 18 V, −40°C ≤ Tj ≤ 150°C; unless otherwise specified; RL(LIN−VBB) =
500 W, unless otherwise specified. Typical values are given at V(VBB) = 12 V and TJ = 25°C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
OUTx shorted to VBB
3
15
50
ms
30
115
200
ms
MODE TRANSITIONS AND TIMEOUTS
T_OC_del
Overcurrent Shut−Down Delay
Time on OUTx pins
T_OL_det
Open Load Detection Time OUT4,
OUT8
THERMAL PROTECTION
Tjsd
Tjsd_hys_global
Tjsd_OUT4,8
Tjsd_hys_O4,8
Global Thermal shut−down level
Guaranteed by design and prototype
evaluations, not tested in production
150
175
190
°C
Thermal shut−down hysteresis
Guaranteed by design and prototype
evaluations, not tested in production
−
20
−
°C
Thermal shut−down level on
OUT4 and OUT8
Guaranteed by design and prototype
evaluations, not tested in production
150
175
190
°C
Thermal shut−down hysteresis
Guaranteed by design and prototype
evaluations, not tested in production
−
20
−
°C
LIN TRANSMITTER DC CHARACTERISTICS
VLin_dom_LoSup
LIN dominant output voltage
Bus driven dominant; VBB = 7.3 V
−
−
1.2
V
VLin_dom_HiSup
LIN dominant output voltage
Bus driven dominant; VBB = 18 V
−
−
2
V
VLin_rec
LIN recessive output voltage
Bus left recessive; I(LIN) = 0 mA
VBB −
1.5
−
VBB
V
ILIN_lim
Short circuit current limitation
V(LIN) = VBB = 18 V
40
−
200
mA
Internal pull−up resistance
Activated on prime LIN node only
(See functional description)
20
33
47
kW
Rslave_LIN
LIN RECEIVER DC CHARACTERISTICS
Vbus_dom_LIN
Bus voltage for dominant state
−
−
0.4 x
VBB
V
Vbus_rec_LIN
Bus voltage for recessive state
0.6 x
VBB
−
−
V
Vrec_dom_LIN
Receiver threshold
LIN bus recessive −> dominant
0.4 x
VBB
−
0.5 x
VBB
V
Vrec_rec_LIN
Receiver threshold
LIN bus dominant −> recessive
0.5 x
VBB
−
0.6 x
VBB
V
Vrec_cnt_LIN
Receiver center voltage
(Vrec_dom_LIN + Vrec_rec_LIN) / 2
0.475 x
VBB
−
0.525 x
VBB
V
Vrec_hys_LIN
Receiver hysteresis
(Vrec_rec_LIN − Vrec_dom_LIN)
0.05 x
VBB
−
0.175 x
VBB
V
ILIN_off_dom
LIN output current,
bus in dominant state
Normal mode, driver off;
VBB = 12 V; V(LIN) = 0 V
−1
−
−
mA
ILIN_off_dom_slp
LIN output current,
bus in dominant state
Sleep mode, driver off;
VBB = 12 V; V(LIN) = 0 V
−20
−15
−2
mA
ILIN_off_rec
LIN output current,
bus in recessive state
Driver off; VBB = 12 V
−
−
2
mA
ILIN_no_GND
Communication not affected
VBB = GND = 12 V; 0 < V(LIN) < 18 V
−1
−
1
mA
ILIN_no_VBB
LIN bus remains operational
VBB = GND = 0 V; 0 < V(LIN) < 18 V
−
−
5
mA
www.onsemi.com
7
NCV7748
Table 5. ELECTRICAL CHARACTERISTICS 6 V ≤ VBB ≤ 18 V, −40°C ≤ Tj ≤ 150°C; unless otherwise specified; RL(LIN−VBB) =
500 W, unless otherwise specified. Typical values are given at V(VBB) = 12 V and TJ = 25°C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
LIN TRANSMITTER DYNAMIC CHARACTERISTICS (The following bus loads are considered: BL1 = 1 kW / 1 nF; BL2 = 660 W / 6.8 nF;
BL3 = 500 W / 10 nF)(Resistor = Vbat to LIN, Capacitor = LIN to GND)
D1
Duty Cycle 1 =
tBUS_rec(min) / (2 x TBit)
(see Figure 3)
THRec(max) = 0.744 x VBB,
THDom(max) = 0.581 x VBB,
Tbit = 50 ms,
VBB = 7 V to 18 V, BL1, BL2, BL3
D2
Duty Cycle 2 =
tBUS_rec(max) / (2 x TBit)
(see Figure 3)
THRec(min) = 0.422 x VBB,
THDom(min) = 0.284 x VBB,
Tbit = 50 ms,
VBB = 7.6 V to 18 V, BL1, BL2, BL3
D3
Duty Cycle 3 =
tBUS_rec(min) / (2 x TBit)
(see Figure 3)
THRec(max) = 0.788 x VBB,
THDom(max) = 0.616 x VBB,
Tbit = 96 ms,
VBB = 7 V to 18 V BL1, BL2, BL3
D4
Duty Cycle 4 =
tBUS_rec(max) / (2 x TBit)
(see Figure 3)
THRec(min) = 0.389 x VBB,
THDom(min) = 0.251 x VBB,
Tbit = 96 ms
VBB = 7.6 V to 18 V, BL1, BL2, BL3
T_fall_LIN
LIN falling edge (see Figure 4)
BL1,BL2
VBB = 12 V; BL1, BL2
40% to 60% measurements
extrapolated to 0% to 100%
22.5
ms
T_rise_LIN
LIN rising edge (see Figure 4)
BL1,BL2
VBB = 12 V; BL1, BL2
40% to 60% measurements
extrapolated to 0% to 100%
22.5
ms
T_sym_LIN
LIN slope symmetry
BL1,BL2
Normal mode VBB = 12 V; BL1, BL2
6
ms
T_fall_LIN_L3
LIN falling edge (see Figure 4)
BL3
VBB = 12 V; BL3
40% to 60% measurements
extrapolated to 0% to 100%
27
ms
T_rise_LIN_L3
LIN rising edge (see Figure 4)
BL3
VBB = 12 V; BL3
40% to 60% measurements
extrapolated to 0% to 100%
27
ms
T_sym_LIN_L3
LIN slope symmetry
BL3
Normal mode; VBB = 12 V; BL3
0
6
ms
Capacitance of the LIN pin
Guaranteed by design;
not tested in production
20
30
pF
90
150
ms
C_LIN
0.396
0.5
0.5
0.581
0.417
0.5
0.5
0.59
−6
−6
0
LIN RECEIVER DYNAMIC CHARACTERISTICS
T_LIN_wake
Dominant duration for wakeup
30
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
8
NCV7748
tBUS_dom(max)
LIN
tBUS_rec(min)
THRec(max)
THDom(max)
Thresholds of
receiving node 1
THRec(min)
THDom(min)
Thresholds of
receiving node 2
t
tBUS_dom(min)
t BUS_rec(max)
Figure 3. LIN Dynamic Characteristics − Duty Cycles
LIN
100%
60%
60%
40%
40%
0%
t
T_fall
T_rise
Figure 4. LIN Dynamic Characteristics – Transmitter Slope
LIN
Detection of Remote Wake−Up
Device in Normal mode
VS
recessive
T_LIN_wake
60% VS
T_init
40% VS
(NAD, CONF read)
dominant
t
Figure 5. LIN Wake Up and Normal Mode Transition
www.onsemi.com
9
NCV7748
Functional Description
Sleep Mode
The NCV7748 is an automotive eight channel low−side
driver providing drive capability up to 0.75 A or 0.6 A per
channel depending on channel selection. Output control is
via a LIN bus with an optimized LIN command set allowing
high flexibility while still maintaining compliance to the
SAE J2602 LIN specification. Use of a virtual LIN node
concept allows driving up to 32 channels with one LIN
command.
Each output driver includes an output clamp for inductive
loads.
All output drivers have overcurrent detection
implemented. Select low side driver(s) offer additional fault
reporting of open load (or short to ground) and local over
temperature conditions which allows connection to a wiring
harness outside of the module.
Sleep mode is entered from Normal mode or
Undervoltage mode if there is no activity on the bus for
longer time than limited by the T_go_to_sleep parameter.
No activity is defined as no transition from recessive to
dominant.
Another way to enter the Sleep mode from the Normal
mode is successful reception of the Go to sleep command.
(See Supported LIN commands chapter).
In Sleep Mode all outputs are off, the device is in Wake−up
mode and there is no change in the state of the ERR bits.
If a valid LIN wake−up (See T_LIN_wake) is detected, the
Sleep mode transitions to INIT mode.
Internal LIN Transceiver Modes
Within the NCV7748, the LIN transceiver has three
internal modes of operation, normal active mode (On),
Disabled mode (OFF), and within the NCV7748 sleep mode
the LIN transceiver is powered down waiting to be woken
up and is said to be in Wake−Up Mode.
LIN is active (On) during Normal Mode.
LIN is disabled (Off) during Un−Powered mode, Reset,
and INIT mode.
In Sleep Mode, the internal LIN transceiver is in
Wake−Up Mode waiting for a dominant signal (low) with a
minimum continuous duration of T_LIN_wake. A remote
wake−up occurs after T_LIN_wake and the return of LIN to
a high (60% VS) (Figure 5).
When a LIN Wake−Up occurs, the device enters the INIT
mode.
Operating Modes
The NCV7748 integrated circuit has two BASIC modes
of operation:
1. Normal mode Fully functional.
2. Sleep mode Low quiescent current. Device is
inactive waiting for LIN bus wake up.
The principal operating modes of the NCV7748 are
shown in Figure 7.
There are also additional transition modes of operation:
Un−powered, INIT, Reset and Undervoltage mode. Global
thermal shutdown mode is shown in Figure 8. Within normal
mode as shown in Figure 10, the device can transition into
overcurrent mode (driver 1 to 3 and 5 to 7) or as shown in
Figure 9 overcurrent/local thermal shutdown mode on
drivers four and eight.
Reset Mode
After a successful reception of a broadcast or targeted
reset frame, the device enters Reset mode.
All registers are set to their default values and ERR.0 bit
is set to high.
Un−Powered and INIT Mode
The device is held in power−on reset when VBB is below
the VBB_POR level. All outputs are in HiZ state and LIN is
disabled. Note: While LIN is disabled the weak pull up is
activated (See ILIN_off_dom_slp parameter)
As soon as the VBB main supply exceeds the power−on
reset level, the device enters the INIT Mode and begins an
initialization sequence. ERR.0 bit is set high after the
power−on reset. (See Table 15)
All the registers are set to their default values.
The device is reading the configuration resistors on the
NAD and CONF pins. (Details of the device configuration
based on NAD and CONF pins are in the Supported LIN
commands chapter)
If the NAD and CONF pins are successfully read, the
device enters normal mode. Otherwise (e.g. NAD, CONF
pins shorted to ground, open or short between these pins) the
device will enter Sleep mode. LIN is disabled during INIT
mode and all OUTx outputs are in HiZ state.
The device stays in the INIT mode for a maximum time
of T_init.
Normal Mode
Normal mode is entered after a successful transition
through the INIT mode.
The internal LIN transceiver is active and drivers are set
as defined by LIN commands. (Details are in Supported LIN
commands chapter.)
Open Load Detection
Open Load Detection is achieved for drivers OUT4 and
OUT8 with the Open Load Detection Threshold Voltage
reference voltage (V_th_open) and its corresponding Open
Load Diagnostic Sink Current (I_th_open) (when the output
driver [OUT4 or OUT8] is off) in both normal mode and
after power up. The output driver maintains its functionality
with and without the output status bit set (i.e. it can turn on
and off).
www.onsemi.com
10
NCV7748
ǒ14 V * 2.5 VǓ
During normal operation, the open circuit impedance
(Roc) is zero ohms (Figure 6). This sets the voltage on
OUT4 or OUT8 to VS volts. As long as VS is above
V_th_open no open circuit fault will be recognized. The
voltage appearing on OUT4 or OUT8 is a result of VS and
the voltage drop across Roc realized by the current flow
created by I_th_open.
The NCV7748 voltage level trip points are referenced to
ground. The threshold range is between 1.0 V and 2.5 V.
With a nominal battery voltage (VS) of 14 V, the resultant
worst case thresholds of detection are as follows.
140 mA
ǒ14 V * 1.0 VǓ
50 mA
+ 82.1 KW
+ 260 KW
The maximum impedance detection threshold is 260 KW,
but may not be detected until the minimum impedance of
82.1 KW.
Note – Electrical parameter magnitudes in the Open Load
Detection diagram are shown as typical values.
ǒVS * OpenLoadDetectionThresholdvoltageǓ
OpenLoad
+ Impedance
OpenLoadDiagnosticSinkCurrent
VS
Channel x
Open Load
detection
−
+
Open
Load
Flag
V_th_open
Roc
1.75 V
OUT4,8
I_th_open
100 mA
GND
Output Turn−
on Control
V_th _open = Open Load Detection Threshold Voltage
(OUT4, OUT8)
I_th _open = Open Load Diagnostic Sink Current
(OUT4, OUT8)
Figure 6. Open Load Detection
www.onsemi.com
11
Open Load Detection is
active when the output
driver is off.
NCV7748
Dual Reporting APPINFO 01000b
masked to low (00100b). The mode is automatically exited
if the junction cools down below the TJ_SD minus hysteresis
Tjsd_hys_global threshold. APPINFO.2 is not latched and is
cleared when mode is exited.
Both Local Thermal Shutdown and Overcurrent
Detection are reported in the APPINFO register (01000b) as
an OR’d bit. Either or both of these conditions will be
reported as a “1”. (See Table 17)
Undervoltage Mode
Local Thermal Shutdown
If the voltage on the battery pin VBB goes below
VBB_UV_L, the device enters Undervoltage mode. LIN is
disabled (both transmitter and receiver) but drivers’ status
remains unchanged.
The device returns to Normal mode if the battery voltage
goes above VBB_UV_H level. Un−powered mode is entered
if VBB voltage drops below VBB_POR_L level.
As LIN timeout counter is running during the
Undervoltage mode as well, the device is suspended to the
Sleep mode when the timeout of T_go_to_sleep elapses.
Output 4 and 8 have local thermal shutdown sensors
protecting the drivers. If OUT4/8 thermal shutdown
threshold (Tjsd_OUT4,8) is reached, the corresponding
driver is latched off and fault flags are set. The local thermal
shutdown on OUT4 and OUT8 is latched in the OUT Status
readout register (See Table 16) as well as in the APPINFO
register. (See Table 17, APPINFO.3 bit).
The only way to leave the overcurrent / local thermal
shutdown state and at the same time clear out the output
status and APPINFO register is to command OFF the
affected driver.
The overcurrent /local thermal shutdown info in the
APPINFO register is only kept high if Global thermal
shutdown is not activated. Global thermal shutdown has
higher priority and masks APPINFO.3 to low as long as
Global thermal shutdown is active. This is to avoid having
both APPINFO.2 and APPINFO.3 bits high at the same time
as this combination is reserved in some systems for ECU
fault diagnostics.
Error Field (ERR [2:0]) & APPINFO (J2602 STATUS BYTE)
The NCV7748 uses a 3 bit error field (ERR[2:0]) as
specified in SAE J2602 for LIN Protocol Error reporting and
is reported in response to the GET STATUS COMMAND and
the GET NODE ID COMMAND. Errors are reported and
cleared in response to these commands in a serial prioritized
sequence. The 8 Error states are reported from highest priority
(7) to lowest priority (0) which is No Error. Each command
clears just one error as they are reported until all errors are clear.
Error State Definitions
Overcurrent Detection
(See Table 15)
No Error – No detected fault.
Reset – VBB POR, Targeted reset (from normal mode),
Broadcast reset (from normal mode)
Data Error – A TxD Bit Error shall be detected when the
bit or byte value that is received is different from the bit or
byte value that is transmitted.
Data Checksum – A Checksum Error shall be detected if
the sum of all values and subtract 255 every time the sum is
greater or equal to 256 over all received data bytes and the
protected identifier (when using enhanced checksum) and
the received checksum byte field does not result in $FF.
Byte Field Framing Error – The receiver shall detect a
Byte Field Framing Error if the ninth bit after a valid start bit
is dominant (low).
ID Parity Error – The receiver shall detect an ID Parity
Error if the received ID parity (bits 6 & 7) does not match the
ID parity calculated from P0 = ID0 ⊕ ID1 ⊕ ID2 ⊕ ID4 (1),
P1 = ¬ (ID1 ⊕ ID3 ⊕ ID4 ⊕ ID5).
All eight drivers have overcurrent detection implemented.
Drivers are latched off if the load current exceeds
I_det_OUTx level for the time longer than T_OC_del (see
Figures 9 and 10).
The overcurrent status on OUT4 and OUT8 is latched in
the OUT Status readout register (See Table 16) as well as in
the APPINFO register. (See Table 17, APPINFO.3 bit). On
OUT1−3 and OUT5−7 the overcurrent status is latched in
the OUT status register but not in the APPINFO register.
The only way to leave the overcurrent / local thermal
shutdown state and at the same time clear out the output
status and APPINFO register is to command OFF the
affected driver.
The overcurrent / local thermal shutdown info in the
APPINFO register is only kept high if Global thermal
shutdown is not activated. Global thermal shutdown has
higher priority and masks APPINFO.3 to low as long as
Global thermal shutdown is active. This is to avoid having
both APPINFO.2 and APPINFO.3 bits high at the same time
as this combination is reserved in some systems for ECU
fault diagnostics.
APPINFO [4:0]
The NCV7748 uses a 5 bit application specific field as
specified in SAE J2602 for reporting the APPINFO register
(reference Table 17) and is reported in response to the GET
STATUS COMMAND and the GET NODE ID
COMMAND. Global Thermal Shutdown is prioritized to
report ahead of OUT4, OUT8 Thermal Shutdown or OUT4,
OUT8 Overcurrent. All thermal shutdown and overcurrent
faults must be cleared by commanding off the affected driver
before they can be turned back on. Commanding off the
affected driver will also clear APPINFO.
Global Thermal Shutdown Mode
The device junction temperature is monitored in order to
avoid permanent degradation or damage of the chip.
Junction temperature exceeding the Shutdown level TJ_SD
puts the chip into Thermal Shutdown mode. (See Figure 8)
In Global thermal Shutdown mode, all OUTx drivers are
deactivated, LIN transceiver remains active. APPINFO.2
bit is set high and APPINFO.3 as mentioned above is
www.onsemi.com
12
NCV7748
VS< VBB_PORL
Sleep Mode
Un−Powered
ERR: (0b001)
(ERR.Reset = 1)
Targeted reset
(from Normal mode only)
OUT1−8: Off
LIN: Wake−up mode
ERR: no change
R NAD , R CONFIG
out of range
LIN wake−up
VS > VBB_PORH
Broadcast reset
(from Normal mode only)
INIT
OUT1−8: Off
OUT.Control.reg:
set to default value
LIN: Disabled
ERR: no change
APPINFO: (default 0b00000)
Duration time: T_init
Reset
LIN: Tg. Reset positive
response ready
(If Targeted)
ERR: (0b001)
(ERR0 = 1)
Go to sleep LIN command
Or
LIN timeout
R NAD , RCONF readout OK
Normal mode
Undervoltage
OUT1−8: Not changed
(Or forced Off by TSD)
VS < VBB_UV_L
OUT1−8: Set by LIN command
(Or forced Off by TSD)
VS > VBB_UV_H
LIN: On
LIN: Disabled
LIN timeout
Figure 7. Basic State Diagram
www.onsemi.com
13
NCV7748
Tj > TTSD
Junction Temperature OK
OUT1−8: Set by LIN command
LIN: On
APINFO3 = ‘0’ (‘1’ if OUT4/8: OC/LTSD)
APINFO2 = ‘0’
Tj < (TTSD −Tjsd_hys)
Global Thermal Shutdown
OUT1−8: Off
LIN: Enable (If Normal mode)
: Wake−Up (If Sleep mode)
APINFO3 = ‘0’
APINFO2 = ‘1’
Figure 8. Global Thermal Shutdown State Diagram
Iout1−3, 5−7 > I_det_out1−3, 5−7
No Overcurrent
OUT1−3, 5−7: Overcurrent
OUT1−8: Set by LIN command
LIN: On
APPINFO3 = ‘0’
APPINFO2 = ‘0’ (‘1’ if Global TSD)
Affected driver(s): Off
Affected driver(s): Status “11”
LIN: On
(OUT1−3.5−7 no impact to APPINFO)
OUT1−3.5−7 = “01” (M2S)
Figure 9. OUT1−3 and OUT5−7 Overcurrent Protection
Tj OUT4/8 > TTSD
Or
Iout4/8 > I_det_out4/8
No Overcurrent
OUT1−8: Set by LIN command
LIN: On
APPINFO3 = ‘0’
APPINFO2 = ‘0’ (‘1’ if Global TSD)
Tj OUT4/8 < TTSD
And
OUT4/8 = “01” (M2S)
OUT4/8: Overcurrent /
Local Thermal Shutdown
OUT1−3, OUT5−7: Set by LIN command
Affected driver(s): Off (Out 4/8 only)
Affected driver(s) Status: ”11” (Out 4/8 only)
LIN: On
APPINFO3 = ‘1’ (‘0’ if Global TSD)
APPINFO2 = ‘0’ (‘1’ if Global TSD)
Figure 10. OUT4/8 Overcurrent/local Thermal Shutdown State Diagram
M2S = Master to Slave Output Turn−Off Command
www.onsemi.com
14
NCV7748
LIN Physical Layer
Virtual Slave Node Configuration
NCV7748 integrates an on−chip LIN transceiver interface
between the physical LIN bus and the integrated LIN
protocol controller. (See Supported LIN Commands)
This LIN physical layer is compatible to LIN2.x and
J2602 specifications.
The NCV7748 LIN2.2 compliant physical layer can be
combined on the network with all the previous LIN physical
layers.
The NCV7748 LIN transceiver consists of a transmitter,
receiver and wakeup detector.
The position of the particular device within the virtual
node is defined by the value of a resistor on the CONF pin
(see Table 7) decoded during the INIT mode.
Table 7. DEVICE IDENTIFICATION WITHIN THE
VIRTUAL LIN NODE
Slave
A
B
C
D
A′
B′
RCONF
475W
1.00kW
2.21kW
4.75kW
10.0kW
22.1kW
C′
D′
47.5kW 100.0kW
Every virtual node must have exactly one prime node
(marked with A′, B′, C′ or D′). The prime node will respond
to the Targeted Reset and Get Node ID (of the virtual node).
Non−prime nodes will not respond to these commands.
Only the prime node has an internal LIN pull−up resistor
activated (see Rslave_LIN parameter in electrical
characteristics section).
Table 9 shows an overview of all the supported LIN
commands.
Automatic Bit Rate Detection
Automatic bit rate synchronization to any LIN master bit
rate between 1 kbps and 20 kbps. Note: the parameter
T_go_to_sleep_i in the MODE TRANSITIONS AND
TIMEOUTS table is the only effected parameter for the two
mentioned communication speeds.
Supported LIN Commands
ID to PID Mapping
A virtual LIN node concept was used to address the
NCV7748. (See Figure 11). It allows
• Flexibility to drive up to 32 relays on one node via a
LIN bus
• Compliance to SAE J2602 specification
• Provide enough free NAD addresses to other nodes on
the LIN bus.
The relationship between protected identifier (PID) and
message ID is explained in Table 8. The PID field consists
of two sub−fields; the frame identifier and the parity. Bits 0
to 5 are the frame identifier and bits 6 and 7 (P0, P1) are the
parity.
Table 8. ID TO PID MAPPING
PID
Virtual Slave Node Address
Parity
Virtual node means that up to four LIN relay driver chips
will share the same NAD. That means up to four devices can
be externally addressable as one LIN node.
The NAD of the virtual node is defined by the value of a
resistor on the pin NAD according to the Table 6.
The external resistor value is compared to internal
references and decoded during the INIT mode.
P1
P0
5
4
3
2
1
0
1
0
0
0
0
0
0
0
P0 and P1 are used for parity check over <ID0> to <ID5>,
(compliant to LIN2.x specification)
P0 = <ID0> ⊕ <ID1> ⊕ <ID2> ⊕ <ID4> (even parity) and
P1 = NOT(<ID1> ⊕ <ID3> ⊕ <ID4> ⊕ <ID5>) (odd parity)
Table 6. VIRTUAL SLAVE NODE ADDRESS
NAD
0x60
RNAD
475W
0x62
0x64
0x66
0x68
0x6A
ID
0x6C
1.00kW 2.21kW 4.75kW 10.0kW 22.1kW 47.5kW
www.onsemi.com
15
NCV7748
NCV7748
NCV7748
NCV7748
NCV7748
D
C
B
A'
Get
Node ID
VBat
(Prime)
RNAD = 475Ω RNAD = 475Ω RNAD = 475Ω RNAD = 475Ω
RCONF = 4.75k RCONF = 2.21k RCONF = 1.00k RCONF = 10.0k
LIN BUS
Virtual LIN node (one NAD)
RNAD = 475 W → NAD = 0x60
Targeted
reset
response
Figure 11. Virtual LIN Node Concept
Table 9. SUMMARY OF SUPPORTED LIN COMMANDS
Frame Type
Data Length
PID[7:0]
Spec
Sets all outputs in one virtual node
8
Depends on NAD
(See Table 12)
N/A
Get Node ID
Reads identity of prime device in virtual node.
(In frame slave Response)
8
Depends on NAD
(See Table 23)
N/A
Get Status
Reads diagnostics of one device (LS driver).
(In frame slave Response)
8
Depends on CONF
(See Table 7) and NAD
(See Table 18)
N/A
Targeted Reset
master Request
Re−initialization of one virtual node.
This includes all devices on the virtual node.
8
0x3C
J2602−1
Targeted Reset
slave response
Positive response by prime device
8
0x7D
Read by identifier
master request
Reads identity of device supplier
8
0x3C
Read by Identifier
slave Response
Successfully processed request
(Positive Response by prime)
8
0x7D
Slave could not process the request
(Negative Response by prime)
8
Broadcast Reset
Re−initialization of all nodes
8
0x3C
J2602−1
Goto Sleep
All devices enter Sleep Mode
8
0x3C
LIN2.2
Output Control
Description
www.onsemi.com
16
LIN2.2
NCV7748
OUTPUT CONTROL FRAME
Table 10. OUTPUT CONTROL COMMAND
Structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte
Content
0
Identifier
1
Data 1
OUT4_A/A’
OUT3_A/A’
OUT2_A/A’
OUT1_A/A’
2
Data 2
OUT8_A/A’
OUT7_A/A’
OUT6_A/A’
OUT5_A/A’
3
Data 3
OUT4_B/B’
OUT3_B/B’
OUT2_B/B’
OUT1_B/B’
4
Data 4
OUT8_B/B’
OUT7_B/B’
OUT6_B/B’
OUT5_B/B’
5
Data 5
OUT4_C/C’
OUT3_C/C’
OUT2_C/C’
OUT1_C/C’
6
Data 6
OUT8_C/C’
OUT7_C/C’
OUT6_C/C’
OUT5_C/C’
7
Data 7
OUT4_D/D’
OUT3_D/D’
OUT2_D/D’
OUT1_D/D’
8
Data 8
OUT8_D/D’
OUT7_D/D’
OUT6_D/D’
OUT5_D/D’
9
Checksum
Master
PID
Enhanced Checksum
The ID of the control frame depends on the chosen NAD
of the virtual LIN node. The mapping of the ID to be used
based on NAD is shown in Table 12.
The output Control command is used to control all the
connected drivers in the virtual node. Each data byte
controls up to four channels where each two bits are assigned
to one output channel. (See Table 10) The decoding of the
2−bit output control is shown in the Table 11.
Table 12. NAD TO OUTPUT CONTROL COMMAND
ID/PID MAPPING
Table 11. OUTPUT ENCODING
RNAD
NAD
ID
PID
OUTx_A[1]
OUTx_A[0]
Output
475 W
0x60
0x01
0xC1
0
0
No change
1.00 kW
0x62
0x09
0x49
0
1
OUTx Off*
2.21 kW
0x64
0x11
0x11
1
0
OUTx On
4.75 kW
0x66
0x19
0x99
1
1
No change
10.0 kW
0x68
0x21
0x61
22.1 kW
0x6A
0x29
0xE9
47.5 kW
0x6C
0x31
0xB1
*Outputs OUT4 and OUT8 have open load diagnostics,
which are enabled when the output is off.
Table 13 shows NAD to ID mapping in the context of SAEJ2602 spec.
Table 13. OUTPUT CONTROL COMMAND NAD TO ID MAPPING LINKED TO SAEJ2602 SPEC
NAD
Message ID
$60
$0
$1
$62
PID
NAD
Message ID
$64
$10
0xC1
$11
PID
NAD
Message ID
$68
$20
0x11
$21
PID
NAD
Message ID
$6C
$30
0x61
$31
$2
$12
$22
$32
$3
$13
$23
$33
$4
$14
$24
$34
$5
$15
$25
$35
$6
$16
$26
$36
$7
$17
$27
$37
$66
$8
$9
0x49
$6A
$18
$19
0x99
$28
$29
$0A
$1A
$2A
$0B
$1B
$2B
$0C
$1C
$2C
$0D
$1D
$2D
$0E
$1E
$2E
$0F
$1F
$2F
www.onsemi.com
17
$6E
No
Message
IDs defined
$6F
No
Message
IDs defined
0xE9
PID
0xB1
NCV7748
GET STATUS AND DIAGNOSTIC
Table 14. GET STATUS REQUEST
Structure
Bit 7
Bit 6
Bit 5
Bit 3
Bit 2
Bit 1
Bit 0
Content
0
Identifier
1
Data 1
2
Data 2
OUT4 STATUS
OUT3 STATUS
OUT2 STATUS
OUT1 STATUS
3
Data 3
OUT8 STATUS
OUT7 STATUS
OUT6 STATUS
OUT5 STATUS
4
Data 4
0x00 (NULL)
5
Data 5
0x00 (NULL)
6
Data 6
0x00 (NULL)
7
Data 7
0x00 (NULL)
8
Data 8
0x00 (NULL)
9
Checksum
Enhanced Checksum
Slave
PID
ERR2
ERR1
ERR0
GET STATUS COMMAND
ERR0
Error States
STATUS
Output
Command
Description
Note
00b
OFF
Open Load Fault
(non−latching)
Only OUT4/8
01b
OFF
Per setting or
active Global
TSD
All OUTx,
Default after
reset
10b
ON
Per setting
All OUTx
11b
ON
Latched OFF
from ON state
due to TSD/OC
TSD / OUT4/8;
OC on all OUTx
Table 17. APPINFO REGISTER
APPINFO
Table 15. J2602−1 ERROR FIELD
ERR1
APPINFO
Table 16. OUT STATUS READOUT
The Get Status Request frame (see Table 14) is issued by
the master to receive application specific diagnostics.
The error bits decrypted from Data1 of this command are
as per SAEJ2602 in Table 15.
The ERR.[2:0] bits are cleared by readout. That means
every command response containing ERR.[2:0] clears the
error register.
Every driver status (Data 2 and 3) is stored in two bits of
information. Only drivers OUT4 and OUT8 allow readout
of open load fault (OL) and local TSD. All drivers flag
overcurrent info. (See Table 16)
Table 17 describes APPINFO register content.
ERR2
Bit 4
Byte
Master
Priority
0 (lowest)
Error States
00000b
Default − No Failure to Report
00100b
Global Thermal Shutdown
01000b
OUT4 & OUT8 Thermal Shutdown or
Overcurrent
1XXXXb
Not Supported (Slave is not requiring
configuration / calibration)
0
0
0
No Error
0
0
1
Reset
1
0
1
0
Reserved
2
0
1
1
Reserved
3
1
0
0
Data Error
4
X11XXb
Not Supported (No ECU fault reporting)
1
0
1
Data Checksum
5
XXX1Xb
Not Supported (No input fault reporting)
1
1
0
Byte Field Framing Error
6
XXXX1b
Not Supported
1
1
1
ID Parity Error
7 (highest)
NOTE: “X” = don’t care
www.onsemi.com
18
NCV7748
Table 18 defines the PID depending on NAD and CONF.
Table 18. GET STATUS ID MAPPING
ID
Slave
RNAD
NAD
PID
ID
PID
ID
PID
ID
A
B
C
D
A′
B′
C′
D′
PID
475 W
0x60
0x02
0x42
0x03
0x03
0x04
0xC4
0x05
0x85
1.00 kW
0x62
0x0A
0xCA
0x0B
0x8B
0x0C
0x4C
0x0D
0x0D
2.21 kW
0x64
0x12
0x92
0x13
0xD3
0x14
0x14
0x15
0x55
4.75 kW
0x66
0x1A
0x1A
0x1B
0x5B
0x1C
0x9C
0x1D
0xDD
10.0 kW
0x68
0x22
0xE2
0x23
0xA3
0x24
0x64
0x25
0x25
22.1 kW
0x6A
0x2A
0x6A
0x2B
0x2B
0x2C
0xEC
0x2D
0xAD
47.5 kW
0x6C
0x32
0x32
0x33
0x73
0x34
0xB4
0x35
0xF5
Table 19 shows get status ID to NAD and node position within a virtual node in context of SAEJ2602 spec.
Table 19. GET STATUS ID MAPPING LINKED TO SAEJ2602 SPEC
NAD
Message ID
$60
$0
PID
NAD
Message ID
$64
$10
$1
$62
PID
NAD
Message ID
$68
$20
$11
PID
NAD
Message ID
$6C
$30
$21
PID
$31
$2
0x42
$12
0x92
$22
0xE2
$32
0x32
$3
0x03
$13
0xD3
$23
0xA3
$33
0x73
$4
0xC4
$14
0x14
$24
0x64
$34
0xB4
$5
0x85
$15
0x55
$25
0x25
$35
0xF5
$6
$16
$26
$36
$7
$17
$27
$37
$66
$8
$6A
$18
$28
$9
0xCA
$19
$0A
0x8B
$1A
$0B
0x4C
$1B
0x5B
$2B
0x2B
$0C
0x0D
$1C
0x9C
$2C
0xEC
$0D
$1D
0xDD
$2D
0xAD
$0E
$1E
$2E
$0F
$1F
$2F
$6E
No
Message
IDs defined
$6F
No
Message
IDs defined
$29
0x1A
$2A
www.onsemi.com
19
0x6A
NCV7748
Example of the Get Status command
Reference Figure 12 for bit sequencing.
ID = 0x02 [Table ID] => PID = 0x42 [LIN2.2]
(Reference Table 19)
Data1 = 0x08 => OUT4,OUT8 TSD / OC
(0b 000 01000)
Data2 = 0x59 => OUT1 :
(0b 01 01 10 01) OUT2 :
OUT3 :
OUT4 :
Off
ON
Off
Off
(01)
(10)
(01)
(01)
Data3 = 0xDA => OUT5 :
(0b 11 01 10 10) OUT6 :
OUT7 :
OUT8 :
ON
ON
Off
Off
(10)
(10)
(01)
(11)Latched Off due to TSD/OC
Note the placement of the bits for LSB and MSB!
It is not intuitive. LSB is sent first.
Table 20. GET STATUS EXAMPLE HEX RESPONSE
Status
Hex Response
OUT Number
1
2
3
4
OUT1−4
0x59
LSB
10
01
10
10
MSB
OUT5−8
0xDA
LSB
01
01
10
11
MSB
MASTER
Break
field
SLAVE
PID
Data
1
LSB MSB
Break
delimiter
(1 Bit)
Synch.
(0x55)
PID
(0x42)
Out1 Out2 Out3 Out4
Out5 Out6 Out7 Out8
1 001101 0
0101 1011
LSB
ERROR
(0x08)
MSB LSB
OUT 1-4 Status
(0x59)
Data
4
Data
5
Data
6
Data
7
NULL
(0x00)
NULL
(0x00)
NULL
(0x00)
NULL
(0x00)
Data
8
ECH
MSB
OUT5-8 Status
(0xDA)
Figure 12. Example of Waveform of Get Status Command
www.onsemi.com
20
Enhanced
NULL Checksum
(0x00)
(0x81)
NCV7748
GET NODE ID COMMAND
Table 21. GET NODE ID
Structure
Master
Slave
Bit 7
Bit 6
Bit 5
Bit 4
Bit 2
Content
0
Identifier
1
Data 1
2
Data 2
Index Byte (0x00)
3
Data 3
Supplier ID, MSB (0x00)
4
Data 4
Supplier ID, LSB (0x24)
5
Data 5
Function ID, MSB (0x60)
6
Data 6
Function ID, LSB (0x48/0x44)
7
Data 7
Silicon Version
8
Data 8
0x00 (null)
9
Checksum
Enhanced Checksum
ERR2
ERR1
ERR0
Group
Sub−group
6
0
Bit 0
APPINFO
Table 23. GET NODE ID / PID MAPPING
RNAD
NAD
ID
PID
475 W
0x60
0x00
0x80
1.00 kW
0x62
0x08
0x08
2.21 kW
0x64
0x10
0x50
4.75 kW
0x66
0x18
0xD8
10.0 kW
0x68
0x20
0x20
22.1 kW
0x6A
0x28
0xA8
47.5 kW
0x6C
0x30
0xF0
Table 22. FUNCTION ID ASSIGNMENT
Function ID, MSB
Bit 1
PID
The Get Node ID Request frame (see Table 21) is issued
by the master to receive Supplier ID and Function ID
information. (Only prime node responds)
Data 1 is the same as in the Get status command. The
mapping of the ID to be used based on NAD is shown in
Table 23.
The Index byte is fixed to zero as the NCV7748 sends out
only six bytes of part number data.
The Supplier ID for ON Semiconductor (Data3, 4) is
0x0024.
Table 22 shows the function ID assignment for the
NCV7748.
NCV7748
Bit 3
Byte
Function ID, LSB
Part Number
4
8
www.onsemi.com
21
NCV7748
Table 24 shows get status ID to NAD and node position within virtual node in context of the SAEJ2602 spec.
Table 24. GET NODE ID COMMAND MAPPING LINKED TO SAEJ2602 SPEC
NAD
Message ID
PID
NAD
Message ID
PID
NAD
Message ID
PID
NAD
Message ID
PID
$60
$0
0x80
$64
$10
0x50
$68
$20
0x20
$6C
$30
0xF0
$1
$11
$21
$31
$2
$12
$22
$32
$3
$13
$23
$33
$4
$14
$24
$34
$5
$15
$25
$35
$6
$16
$26
$36
$7
$62
$8
$17
0x08
$66
$18
$27
$6A
0xD8
$28
$9
$19
$29
$0A
$1A
$2A
$0B
$1B
$2B
$0C
$1C
$2C
$0D
$1D
$2D
$0E
$1E
$2E
$0F
$1F
$2F
www.onsemi.com
22
$37
0xA8
$6E
No
Message
IDs defined
$6F
No
Message
IDs defined
NCV7748
READ BY IDENTIFIER COMMAND
Table 25. READ BY IDENTIFIER
Structure
Master
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Byte
Content
0
Identifier
1
Data 1
2
Data 2
0x06 (PCI)
3
Data 3
0xB2 (SID)
4
Data 4
Node Identifier (see Node Identification Table 28)
5
Data 5
Supplier ID LSB (0x24) or 0xFF (Wildcard Supplier ID)
6
Data 6
Supplier ID MSB (0x00) or 0x7F (Wildcard Supplier ID)
7
Data 7
Function ID LSB (0x48/0x44) or 0xFF (Wildcard Function ID)
8
Data 8
Function ID MSB (0x60) or 0xFF (Wildcard Function ID)
9
Checksum
Classic Checksum
0x00 (Parity)
Bit 0
0x3C (ID)
NAD or 0x7F (Wildcard NAD)
Table 26. POSITIVE RESPONSE FOR READ BY IDENTIFIER
Structure
Master
Slave
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
2
Data 2
0x06 (PCI)
3
Data 3
0xF2 (RSID)
4
Data 4
Supplier ID LSB (0x24)
5
Data 5
Supplier ID MSB (0x00)
6
Data 6
Function ID LSB (0x48/0x44)
7
Data 7
Function ID MSB (0x60)
8
Data 8
Silicon Version
9
Checksum
Classic Checksum
0x01 (Parity)
Bit 2
Bit 1
Bit 0
Bit 1
Bit 0
0x3D (ID)
NAD
Table 27. NEGATIVE RESPONSE FOR READ BY IDENTIFIER
Structure
Master
Slave
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
NAD
2
Data 2
0x03 (PCI)
3
Data 3
0x7F (RSID)
4
Data 4
0xB2 (Requested SID)
5
Data 5
0x12 (Error Code)
6
Data 6
0xFF
7
Data 7
0xFF
0x01 (Parity)
Bit 2
0x3D (ID)
8
Data 8
0xFF
9
Checksum
Classic Checksum
www.onsemi.com
23
NCV7748
device can be addressed by either the 0x00 (′) identifier or
the identifier associated with its letter designator (A, B, C, D).
An example of Read by Identifier request / response is
shown below.
The Read by Identifier Request frame (see Table 25) is
issued by the master to receive application specific
diagnostics.
Data1 (NAD selection) is explained previously (See Table
6 and Table 7). Data 4 (Node identifier) determines which of
the nodes in the virtual LIN node should respond. (See Table
28). The identification of nodes within the virtual node is
defined in Table 7.
If the Node identifier is in accordance with Table 28, the
addressed slave answers by the Positive response (see
Table 26). If the Identifier is out of range in Table 28 (not
equal to 0x00, 0x20, 0x21, 0x22 or 0x23), the prime slave
answers with the Negative response (see Table 27). A prime
Table 28. NODE IDENTIFICATION
Identifier
Responding Slave
0x00
Prime (Marked with ′)
0x20
A
0x21
B
0x22
C
0x23
D
MASTER
Break field
ID
Data
1
Data
2
Data
3
Data
4
NAD
(0x60)
PCI
(0x06)
SID
(0xB2)
Identifier
(0x00)
LSB MSB
Break
delimiter
(1 Bit)
Synch.
(0 x55)
PID
(0x3C)
MASTER
ID
Data
1
Data
2
Data
3
NAD
(0x60)
PCI
(0x06)
RSID
(0xF2)
LSB MSB
Synch.
(0 x55)
Data
6
LSB
MSB
(0xFF)
(0x7F)
Wildcard Supplier ID
Data
7
Data
8
CH
LSB
MSB
Classic
(0xFF)
(0xFF)
Checksum
Wildcard Function ID
(0x67)
SLAVE
Break field
Break
delimiter
(1 Bit)
Data
5
PID
(0x7D)
Data
4
Data
5
Data
6
Data
7
LSB
(0x24)
MSB
(0x00)
LSB
(0x48)
MSB
(0x60)
Function ID
Supplier ID
Data
8
CH
Classic
Version Checksum
(0x01)
(0xD8)
Figure 13. Example of Read by Identifier, NAD = 0x60, Prime Slave Addressed and Positive Responding
BROADCAST RESET COMMAND
Table 29. BROADCAST RESET FRAME
Structure
Master
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
0x7F
2
Data 2
0x01
3
Data 3
0xB5
4
Data 4
0xFF
5
Data 5
0xFF
6
Data 6
0xFF
7
Data 7
0xFF
0x00 (Parity)
Bit 2
0x3C (ID)
8
Data 8
0xFF
9
Checksum
Classic Checksum
Table 29 describes the command to reset all nodes. No slave response.
www.onsemi.com
24
Bit 1
Bit 0
NCV7748
TARGETED RESET COMMAND
Table 30. TARGETED RESET REQUEST COMMAND
Structure
Master
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
NAD
2
Data 2
0x01
3
Data 3
0xB5
4
Data 4
0xFF
5
Data 5
0xFF
6
Data 6
0xFF
7
Data 7
0xFF
0x00 (Parity)
Bit 2
Bit 1
Bit 0
Bit 1
Bit 0
0x3C (ID)
8
Data 8
0xFF
9
Checksum
Classic Checksum
Table 31. TARGETED RESET POSITIVE RESPONSE
Structure
Master
Slave
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
2
Data 2
0x06
3
Data 3
0xF5
4
Data 4
Supplier ID LSB (0x24)
5
Data 5
Supplier ID MSB (0x00)
6
Data 6
Function ID LSB (0x48/0x44)
7
Data 7
Function ID MSB (0x60)
8
Data 8
Silicon Version
9
Checksum
Classic Checksum
0x01 (Parity)
Bit 2
0x3D (ID)
NAD
Targeted reset (See Table 30) puts all the outputs into the off state (Table 11, OUTx Off), resets the error flags ERR.1,2 and
sets the ERR.0 =1 in the ERR status byte (Table 15).
Targeted reset puts all outputs for all devices in a virtual node in the off state.
The node giving positive response (prime node) within the virtual node is defined by Table 31.
GO TO SLEEP COMMAND
Table 32. GO TO SLEEP COMMAND
Structure
Master
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Byte
Content
0
Identifier
1
Data 1
0x00
2
Data 2
0xXX
3
Data 3
0xXX
4
Data 4
0xXX
5
Data 5
0xXX
6
Data 6
0xXX
7
Data 7
0xXX
8
Data 8
0xXX
9
Checksum
Classic Checksum
0x00 (Parity)
Bit 2
Bit 1
Bit 0
0x3C (ID)
The Go to sleep command (see Table 32) deactivates all the drivers and puts all the slave nodes connected to the LIN bus
into the Sleep mode. In 0xXX, XX stands for don’t care.
www.onsemi.com
25
NCV7748
Output Driver Fault Handling
A summary of output driver device performance under fault conditions is summarized below. This includes reporting to the
APPINFO register, the driver condition both during and after fault conditions, and what is required to clear reported faults.
Table 33. FAULT HANDLING
Drivers
Condition
during Fault
Drivers
Condition after
Parameters
within Specified
Limits
Output Register
clearing
Requirement
APPINFO
Register
Clearing
Requirement
APPINFO
Register
OUTPUT
Register
Open load
(OUT4 and OUT8)
Not signaled.
Signaled in OFF
Mode
Per setting
Driver in Normal
operation
Load
re−connected
NA
Overcurrent
Latched
latched
Affected driver
turns off after
T_OC_det time
Affected driver is
latched off
Command OFF
the affected
driver
Command OFF
the affected driver
(OUT4 and OUT8)
Local Thermal
Shutdown
(OUT4 and OUT8)
Latched +
masked low
when Global
TSD
latched
All driver turns off
Affected driver is
latched off
Global Thermal
Shutdown (TSD)
Not latched
Signaled
All drivers
switched OFF
Returns to the
previous
programmed
state
Exit Global TSD
Exit Global TSD
Undervoltage
NA
Register is not
accessible as LIN
is disabled
Per Setting
(Change of state
not possible as
LIN is disabled)
Driver in Normal
operation
NA
NA
Fault
Exit Local TSD
Exit Local TSD
Command OFF
Command OFF
the affected driver the affected driver
(OUT4 and OUT8) (OUT4 and OUT8)
Table 34. FAULT REPORTING
Drivers
Fault
OUT1−3, 5−7
OUT4, 8
Open Load (OFF state)
No
Yes
Overcurrent (ON state)
Yes (0.6 A min)
Yes (0.75 A min)
Individual Over Temperature
No
Yes
1S0P Thermal Performance
Figure 14. SOIC−14 qJ−A (1s0p) Copper Spreader Area
www.onsemi.com
26
NCV7748
Figure 15. SOIC−14 Single Pulse Heating Curve (1s0p)
Figure 16. SOIC−14 Thermal Duty Cycle Curve on 645 mm2 Spreader Test Board (1s0p)
www.onsemi.com
27
NCV7748
2S2P Thermal Performance
Figure 17. SOIC−14 qJ−A (2s2p) Copper Spreader Area
Figure 18. SOIC−14 Single Pulse Heating Curve (2s2p)
www.onsemi.com
28
NCV7748
Figure 19. SOIC−14 Thermal Duty Cycle Curve on 645 mm2 Spreader Test Board (2s2p)
ORDERING INFORMATION
Device Order Number
NCV7748D2R2G
Number of Channels
Package
Shipping†
8
SOIC−14
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
29
NCV7748
PACKAGE DIMENSIONS
D
SOIC−14 NB
CASE 751A
ISSUE L
A
B
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
8
A3
E
H
L
1
0.25
M
DETAIL A
7
B
13X
M
DIM
A
A1
A3
b
D
E
e
H
h
L
M
b
0.25
M
C A
S
B
S
X 45 _
M
A1
e
DETAIL A
h
A
C
SEATING
PLANE
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
◊
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
30
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV7744/D