TI1 BQ27426YZFR System-side impedance track fuel gauge Datasheet

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bq27426
SLUSC91C – OCTOBER 2015 – REVISED FEBRUARY 2016
bq27426 System-Side Impedance Track™ Fuel Gauge
1 Features
3 Description
•
The Texas Instruments bq27426 battery fuel gauge is
a single-cell gauge that requires minimal userconfiguration and system microcontroller firmware
development, leading to quick system bring-up.
1
•
•
•
Single-Cell Li-Ion Battery Fuel Gauge
– Resides on System Board
– Supports Embedded or Removable Batteries
– Powers Directly from the Battery with
Integrated LDO
– Supports a Low-Value External Sense Resistor
(10 mΩ)
Ultra Low Power Consumption in NORMAL
(50 µA) and SLEEP (9 µA) Modes
Battery Fuel Gauging Based on Patented
Impedance Track™ Technology
– Provides Three Selectable Pre-Programmed
Profiles for 4.2-V, 4.35-V, and 4.4-V Cells
– Reports Remaining Capacity and State-ofCharge (SOC) with Smoothing Filter
– Adjusts Automatically for Battery Aging, SelfDischarge, Temperature, and Rate Changes
– Estimates Battery State-of-Health (Aging)
Microcontroller Peripheral Interface Supports:
– 400-kHz I2C™ Serial Interface
– Configurable SOC Interrupt or
Battery Low Digital Output Warning
– Internal Temperature Sensor OR Host
Reported Temperature OR External Thermistor
Three chemistry profiles are pre-programmed to
enable minimum user-configuration, and to help
manage customer inventory across projects with
different battery chemistries. The bq27426 battery
fuel gauge has very low sleep power consumption
leading to longer battery run time. Configurable
interrupts help save system power and free up the
host from continuous polling. Accurate temperature
sensing is supported via an external thermistor.
The bq27426 battery fuel gauge uses the patented
Impedance Track™ algorithm for fuel gauging, and
provides information such as remaining battery
capacity (mAh), state-of-charge (%), and battery
voltage (mV).
Battery fuel gauging with the bq27426 fuel gauge
requires connections only to PACK+ (P+) and PACK–
(P–) for a removable battery pack or embedded
battery circuit. The tiny, 9-ball, 1.62 mm x 1.58 mm,
0.5 mm pitch NanoFree™ chip scale package
(DSBGA) is ideal for space-constrained applications.
Device Information(1)
PART NUMBER
bq27426
2 Applications
•
•
•
•
•
•
PACKAGE
YZF (9)
BODY SIZE (NOM)
1.62 mm x 1.58 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Smartphones, Feature Phones, and Tablets
Wearables
Building Automation
Portable Medical/Industrial Handsets
Portable Audio
Gaming
Simplified Schematic
I 2C
Bus
SRN
SCL
Coulomb
Counter
SDA
VSYS
SRP
CPU
Battery Pack
GPOUT
ADC
BAT
PACKP
BIN
T
VDD
1.8 V
LDO
2.2 µF
VSS
1 µF
PACKN
Li-Ion
Cell
Protection
IC
NFET
NFET
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27426
SLUSC91C – OCTOBER 2015 – REVISED FEBRUARY 2016
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Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Supply Current .......................................................... 5
Digital Input and Output DC Characteristics ............. 5
LDO Regulator, Wake-up, and Auto-Shutdown DC
Characteristics ........................................................... 5
6.8 LDO Regulator, Wake-up, and Auto-Shutdown AC
Characteristics ........................................................... 6
6.9 ADC (Temperature and Cell Measurement)
Characteristics ........................................................... 6
6.10 Integrating ADC (Coulomb Counter) Characteristics
................................................................................... 6
6.11 I2C-Compatible Interface Communication Timing
Characteristics ........................................................... 6
6.12 SHUTDOWN and WAKE-UP Timing ...................... 8
6.13 Typical Characteristics ............................................ 8
7
Detailed Description .............................................. 9
7.1
7.2
7.3
7.4
8
Overview ................................................................... 9
Functional Block Diagram ......................................... 9
Feature Description................................................... 9
Device Functional Modes........................................ 11
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Applications ................................................ 12
9
Power Supply Recommendation ........................ 15
9.1 Power Supply Decoupling ....................................... 15
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Example .................................................... 16
11 Device and Documentation Support ................. 17
11.1
11.2
11.3
11.4
11.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
12 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
Changes from Revision B (February 2016) to Revision C
Page
•
Changed the Simplified Schematic......................................................................................................................................... 1
•
Changed the Functional Block Diagram ................................................................................................................................ 9
2
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5 Pin Configuration and Functions
Top View
3
2
1
C
B
A
Bottom View
1
2
3
C
B
A
Pin Functions
PIN
NAME
BAT
BIN
(1)
NUMBER
C3
B1
TYPE (1)
DESCRIPTION
PI, AI
LDO regulator input and battery voltage measurement input. Kelvin sense connect to positive
battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor
close to the gauge.
DI
Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is
detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS
through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should
use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If
the battery is embedded in the system, it is recommended to leave [BI_PU_EN] = 1 and use a
10-kΩ pulldown resistor from BIN to VSS. If [BI_PU_EN] = 0, then the host must inform the gauge
of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. A 10kΩ pulldown resistor should be placed between BIN and VSS, even if this pin is unused.
NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN
pin must be connected only to VDD and not an external voltage rail. If an external thermistor is
used for temperature input, the thermistor should be connected between this pin and VSS.
IO = Digital input-output, AI = Analog input, P = Power connection
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Pin Functions (continued)
PIN
NAME
TYPE (1)
NUMBER
DESCRIPTION
This open-drain output can be configured to indicate BAT_LOW when the OpConfig
[BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt
function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal
polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not
be left floating, even if unused; therefore, a 10-kΩ pullup resistor is recommended. If the device
is in SHUTDOWN mode, toggling GPOUT will make the gauge exit SHUTDOWN.
It is recommended to connect GPOUT to a GPIO of the host MCU so that in case of any
inadvertent shutdown condition, the gauge can be commanded to come out of SHUTDOWN.
GPOUT
A1
DO
SCL
A3
DIO
SDA
A2
DIO
SRN
C2
AI
SRP
C1
AI
VDD
B3
PO
1.8-V regulator output. Decouple with 2.2-μF ceramic capacitor to VSS. This pin is not intended to
provide power for other devices in the system.
VSS
B2
PI
Ground pin
Slave I2C serial bus for communication with system (Master). Open-drain pins. Use with external
10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected
from these pins during normal operation, recommend using external 1-MΩ pulldown resistors to
VSS at each pin to avoid floating inputs.
Coulomb counter differential inputs expecting an external 10 mΩ, 1% sense resistor in the highside current path. Kelvin sense connect SRP to the positive battery terminal (PACKP) side of the
external sense resistor. Kelvin sense connect SRN to the other side of the external sense
resistor, the positive connection to the system (VSYS). No calibration is required. The fuel gauge
is pre-calibrated for a standard 10 mΩ, 1% sense resistor.
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
MIN
VBAT
VSR
MAX
UNIT
BAT pin input voltage range
–0.3
6
V
SRP and SRN pins input voltage range
–0.3
VBAT + 0.3
V
2
V
2
V
V
Differential voltage across SRP and SRN. ABS(SRP – SRN)
VDD
VDD pin supply voltage range (LDO output)
–0.3
VIOD
Open-drain IO pins (SDA, SCL)
–0.3
6
VIOPP
Push-pull IO pins (BIN)
–0.3
VDD + 0.3
V
TA
Operating free-air temperature range
–40
85
°C
–65
150
°C
Storage temperature, Tstg
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±1500
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±250
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
TA = 30°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN
External input capacitor for internal
LDO between BAT and VSS
CBAT (1)
CLDO18 (1)
(1)
4
Nominal capacitor values specified. Recommend
a 5% ceramic X5R-type capacitor located close to
External output capacitor for internal the device.
LDO between VDD and VSS
NOM
MAX
UNIT
0.1
μF
2.2
μF
Specified by design. Not production tested.
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Recommended Operating Conditions (continued)
TA = 30°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN
VPU (1)
External pullup voltage for opendrain pins (SDA, SCL, GPOUT)
NOM
1.62
MAX
UNIT
3.6
V
6.4 Thermal Information
bq27426
THERMAL METRIC (1)
YZF (DSBGA)
UNIT
9 PINS
RθJA
Junction-to-ambient thermal resistance
64.1
°C/W
RθJCtop
Junction-to-case (top) thermal resistance
59.8
°C/W
RθJB
Junction-to-board thermal resistance
52.7
°C/W
ψJT
Junction-to-top characterization parameter
0.3
°C/W
ψJB
Junction-to-board characterization parameter
28.3
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
2.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Supply Current
TA = 30°C and VREGIN = VBAT = 3.6V (unless otherwise noted)
PARAMETER
ICC (1)
ISLP
(1)
ISD (1)
(1)
(2)
TEST CONDITIONS
NORMAL mode current
MIN
TYP
MAX
UNIT
ILOAD > Sleep Current (2)
50
μA
(2)
9
μA
0.6
μA
SLEEP mode current
ILOAD < Sleep Current
SHUTDOWN mode current
Fuel gauge in host commanded
SHUTDOWN mode.
(LDO regulator output disabled)
Specified by design. Not production tested.
Wake Comparator Disabled.
6.6 Digital Input and Output DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1) (1)
PARAMETER
TEST CONDITIONS
(2)
VIH(OD)
Input voltage, high
VIH(PP)
Input voltage, high
VIL
Input voltage, low (2)
External pullup resistor to VPU
(3)
MIN
TYP
MAX
UNIT
VPU × 0.7
V
1.4
V
(3)
0.6
(2)
V
VOL
Output voltage, low
0.6
V
IOH
Output source current, high (2)
0.5
mA
IOL(OD)
Output sink current, low (2)
–3
mA
5
pF
1
μA
CIN
(1)
Input Leakage Current (SCL, SDA,
BIN, GPOUT)
Ilkg
(1)
(2)
(3)
Input capacitance
(2) (3)
Specified by design. Not production tested.
Open Drain pins: (SCL, SDA, GPOUT)
Push-Pull pin: (BIN)
6.7 LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1) (1)
PARAMETER
VBAT
BAT pin regulator input
VDD
Regulator output voltage
(1)
TEST CONDITIONS
MIN
TYP
2.45
MAX
UNIT
4.5
1.85
V
V
Specified by design. Not production tested.
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LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics (continued)
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1)(1)
PARAMETER
TEST CONDITIONS
UVLOIT+
VBAT undervoltage lock-out
LDO wake-up rising threshold
UVLOIT–
VBAT undervoltage lock-out
LDO auto-shutdown falling threshold
VWU+ (1)
GPOUT (input) LDO Wake-up rising LDO Wake-up from SHUTDOWN
edge threshold (2)
mode
(2)
MIN
TYP
MAX
UNIT
2
V
1.95
V
1.2
V
If the device is commanded to SHUTDOWN via I2C with VBAT > UVLOIT+, a wake-up rising edge trigger is required on GPOUT.
6.8 LDO Regulator, Wake-up, and Auto-Shutdown AC Characteristics
TA = –40°C to 85°C, typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
tSHDN
(1)
tSHUP (1)
tVDD
(1)
TEST CONDITIONS
SHUTDOWN entry time
Time delay from SHUTDOWN
command to LDO output disable.
SHUTDOWN GPOUT low time
Minimum low time of GPOUT (input)
in SHUTDOWN before WAKEUP
tWUVDD (1)
Wake-up VDD output delay
tPUCD
Power-up communication delay
Time delay from rising edge of
REGIN to the Active state. Includes
firmware initialization time.
TYP
MAX
UNIT
250
ms
μs
10
Initial VDD output delay
Time delay from rising edge of
GPOUT (input) to nominal VDD
output.
(1)
MIN
13
ms
8
ms
250
ms
Specified by design. Not production tested.
6.9 ADC (Temperature and Cell Measurement) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1) (1)
PARAMETER
TEST CONDITIONS
VIN(BAT)
BAT pin voltage measurement range Voltage divider enabled
tADC_CONV
Conversion time
MIN
Effective resolution
(1)
TYP
2.45
MAX
4.5
UNIT
V
125
ms
15
bits
Specified by design. Not tested in production.
6.10 Integrating ADC (Coulomb Counter) Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted)(Force Note1) (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
VSR
Input voltage range from BAT to
SRP/SRN pins
tSR_CONV
Conversion time
Single conversion
1
s
Effective Resolution
Single conversion
16
bits
(1)
BAT ± 25
UNIT
mV
Specified by design. Not tested in production.
6.11 I2C-Compatible Interface Communication Timing Characteristics
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1) (1)
MIN
NOM
MAX
UNIT
Standard Mode (100 kHz)
td(STA)
Start to first falling edge of SCL
tw(L)
SCL pulse duration (low)
(1)
6
4
μs
4.7
μs
Specified by design. Not production tested.
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I2C-Compatible Interface Communication Timing Characteristics (continued)
TA = –40°C to 85°C; typical values at TA = 30°C and VREGIN = 3.6 V (unless otherwise noted) (Force Note1)(1)
MIN
μs
μs
Host drives SDA
250
ns
Host drives SDA
0
ns
4
μs
Setup for repeated start
tsu(DAT)
Data setup time
th(DAT)
Data hold time
tsu(STOP)
Setup time for stop
t(BUF)
Bus free time between stop and start Includes Command Waiting Time
tf
SCL or SDA fall time (1)
SCL or SDA rise time
Clock frequency (2)
UNIT
4
SCL pulse duration (high)
tsu(STA)
fSCL
MAX
4.7
tw(H)
tr
NOM
μs
66
300
(1)
ns
300
ns
100
kHz
Fast Mode (400 kHz)
td(STA)
Start to first falling edge of SCL
600
ns
tw(L)
SCL pulse duration (low)
1300
ns
tw(H)
SCL pulse duration (high)
600
ns
tsu(STA)
Setup for repeated start
600
ns
tsu(DAT)
Data setup time
Host drives SDA
100
ns
th(DAT)
Data hold time
Host drives SDA
0
ns
tsu(STOP)
Setup time for stop
600
ns
t(BUF)
Bus free time between stop and start Includes Command Waiting Time
tf
SCL or SDA fall time (1)
300
ns
tr
SCL or SDA rise time (1)
300
ns
400
kHz
fSCL
(2)
Clock frequency
μs
66
(2)
If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at
400 kHz. (See I2C Interface and I2C Command Waiting Time.)
tSU(STA)
tw(H)
tf
tw(L)
tr
t(BUF)
SCL
SDA
td(STA)
tsu(STOP)
tf
tr
th(DAT)
tsu(DAT)
REPEATED
START
STOP
START
Figure 1. I2C-Compatible Interface Timing Diagrams
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6.12 SHUTDOWN and WAKE-UP Timing
tPUCD
tSHUP
tVDD
tSHDN
tPUCD
tWUVDD
REGIN
VDD
I2C Bus
GPOUT
SHUTDOWN_
ENABLE
SHUTDOWN
*
State
Off
WAKE-UP
Active
SHUTDOWN
WAKE-UP
Active
* GPOUT is configured as an input for wake-up signaling.
Figure 2. SHUTDOWN and WAKE-UP Timing Diagram
6.13 Typical Characteristics
10%
Temperature Accuracy Error
0
Voltage Accuracy Error
-0.05%
-0.1%
-0.15%
-0.2%
-0.25%
-40
-20
0
20
40
Temperature (qC)
60
80
100
5%
0
-5%
-10%
-15%
-40
-20
D001
Figure 3. Voltage Accuracy Error
0
20
40
Temperature (qC)
60
80
100
D002
Figure 4. Internal Temperature Accuracy Error
0.7%
Current Accuracy Error
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
-40
-20
0
20
40
Temperature (qC)
60
80
100
D003
Figure 5. Current Accuracy Error
8
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7 Detailed Description
7.1 Overview
The bq27426 fuel gauge accurately predicts the battery capacity and other operational characteristics of a single
Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information, such as
state-of-charge (SoC).
NOTE
The following formatting conventions are used in this document:
Commands: italics with parentheses() and no breaking spaces, for example, Control().
Data Flash: italics, bold, and breaking spaces, for example, Design Capacity.
Register bits and flags: italics with brackets [ ], for example, [TDA]
Data flash bits: italics, bold, and brackets [ ], for example, [LED1]
Modes and states: ALL CAPITALS, for example, UNSEALED mode.
7.2 Functional Block Diagram
I 2C
Bus
SRN
SCL
Coulomb
Counter
SDA
VSYS
SRP
CPU
Battery Pack
GPOUT
ADC
BAT
PACKP
BIN
T
VDD
1.8 V
LDO
2.2 µF
VSS
Li-Ion
Cell
Protection
IC
1 µF
PACKN
NFET
NFET
7.3 Feature Description
Information is accessed through a series of commands, called Standard Commands. Further capabilities are
provided by the additional Extended Commands set. Both sets of commands, indicated by the general format
Command), are used to read and write information contained within the control and status registers, as well as its
data locations. Commands are sent from system to gauge using the I2C serial communications engine, and can
be executed during application development, system manufacture, or end-equipment operation.
The key to the high-accuracy gas gauging prediction is Texas Instruments proprietary Impedance Track™
algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-of-charge
predictions that can achieve high accuracy across a wide variety of operating conditions and over the lifetime of
the battery.
The fuel gauge measures the charging and discharging of the battery by monitoring the voltage across a smallvalue sense resistor. When a cell is attached to the fuel gauge, cell impedance is computed based on cell
current, cell open-circuit voltage (OCV), and cell voltage under loading conditions.
The fuel gauge uses an integrated temperature sensor for estimating cell temperature. Alternatively, the host
processor can provide temperature data for the fuel gauge.
More details are found in the bq27426 Technical Reference Manual (SLUUBB0).
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Feature Description (continued)
7.3.1 Communications
7.3.1.1 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, quick read, one-byte write, and incremental
write functions. The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as
1010101. The first 8 bits of the I2C protocol are, therefore, 0xAA or 0xAB for write or read, respectively.
Host generated
S
ADDR[6:0]
0 A
Gauge generated
CMD [7:0]
A
DATA [7:0]
A P
S
ADDR[6:0]
(a) 1-byte write
S
ADDR[6:0]
0 A
1 A
DATA [7:0]
N P
(b) quick read
CMD [7:0]
A Sr
ADDR[6:0]
1 A
DATA [7:0]
N P
(c) 1- byte read
S
ADDR[6:0]
0 A
CMD [7:0]
A Sr
ADDR[6:0]
1 A
DATA [7:0]
A ...
DATA [7:0]
N P
(d) incremental read
S
ADDR[6:0]
0 A
CMD[7:0]
A
DATA [7:0]
A
DATA [7:0]
A
...
A P
(e) incremental write
(S = Start , Sr = Repeated Start , A = Acknowledge , N = No Acknowledge , and P = Stop).
Figure 6. I2C Interface
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
The following command sequences are not supported:
Figure 7. Attempt To Write a Read-only Address (Nack After Data Sent By Master)
Figure 8. Attempt To Read an Address Above 0x6B (Nack Command):
7.3.1.2 I2C Time Out
The I2C engine releases both SDA and SCL if the I2C bus is held low for 2 seconds. If the fuel gauge is holding
the lines, releasing them frees them for the master to drive the lines. If an external condition is holding either of
the lines low, the I2C engine enters the low-power SLEEP mode.
10
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Feature Description (continued)
7.3.1.3 I2C Command Waiting Time
To ensure proper operation at 400 kHz, a t(BUF) ≥ 66 μs bus-free waiting time must be inserted between all
packets addressed to the fuel gauge. In addition, if the SCL clock frequency (fSCL) is > 100 kHz, use individual 1byte write commands for proper data flow control. The following diagram shows the standard waiting time
required between issuing the control subcommand the reading the status result. For read-write standard
command, a minimum of 2 seconds is required to get the result updated. For read-only standard commands,
there is no waiting time required, but the host must not issue any standard command more than two times per
second. Otherwise, the gauge could result in a reset issue due to the expiration of the watchdog timer.
S
ADDR [6:0]
0 A
CMD [7:0]
A
DATA [7:0]
A P
66ms
S
ADDR [6:0]
0 A
CMD [7:0]
A
DATA [7:0]
A P
66ms
S
ADDR [6:0]
0 A
CMD [7:0]
A Sr
ADDR [6:0]
1 A
DATA [7:0]
A
DATA [7:0]
N P
66ms
N P
66ms
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < fSCL £ 400 kHz)
S
ADDR [6:0]
0 A
CMD [7:0]
A
S
ADDR [6:0]
0 A
CMD [7:0]
A Sr
DATA [7:0]
ADDR [6:0]
A
1 A
DATA [7:0]
A P
DATA [7:0]
A
66ms
DATA [7:0]
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for fSCL £ 100 kHz)
S
ADDR [6:0]
DATA [7:0]
0 A
A
CMD [7:0]
DATA [7:0]
A Sr
N P
ADDR [6:0]
1 A
DATA [7:0]
A
DATA [7:0]
A
66ms
Waiting time inserted after incremental read
Figure 9. I2C Command Waiting Time
7.3.1.4 I2C Clock Stretching
A clock stretch can occur during all modes of fuel gauge operation. In SLEEP mode, a short ≤ 100-µs clock
stretch occurs on all I2C traffic as the device must wake-up to process the packet. In the other modes
(INITIALIZATION, NORMAL), a ≤ 4-ms clock stretching period may occur within packets addressed for the fuel
gauge as the I2C interface performs normal data flow control.
7.4 Device Functional Modes
To minimize power consumption, the fuel gauge has several power modes: INITIALIZATION, NORMAL, SLEEP,
and SHUTDOWN. The fuel gauge passes automatically between these modes, depending upon the occurrence
of specific events, though a system processor can initiate some of these modes directly. More details are found
in the bq27426 Technical Reference Manual (SLUUBB0).
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8 Application and Implementation
NOTE
Information in the following application section is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The bq27426 fuel gauge is a microcontroller peripheral that provides system-side fuel gauging for single-cell LiIon batteries. The device requires minimal configuration and uses One Time Programmable (OTP) Non-Volatile
Memory (NVM). Battery fuel gauging with the fuel gauge requires connections only to PACK+ and PACK– for a
removable battery pack or embedded battery circuit. To allow for optimal performance in the end application,
special considerations must be taken to ensure minimization of measurement error through proper printed circuit
board (PCB) board layout. Such requirements are detailed in Design Requirements.
8.2 Typical Applications
Ext VCC
EXT_VCC
TP4
EXT_VCC
J3
GND
VDD
VDD
J4
R2
1.8 Meg
PGND
EXT_VCC
BIN
JP1
JP2
EXT_VCC
J2
J1
SDA
SCL
VSS
R4
10.0k
4
3
2
1
R5
10.0k
R3
5.1k
GPOUT
GPOUT
SDA
SCL
VDD
U1
PGND
Recommended to be connected
GPOUT
to a GPIO on the host.
BIN
C3
BAT
VDD
B3
A3
A2
SCL
SDA
SRP
SRN
C1
C2
A1
GPOUT
B1
BIN
VSS
B2
TP5
C3
0.47 µF
PGND PGND
Pack+
Pack+
BIN
Pack-
1 TP1
2
3
VDD
C1
2.2 µF
PGND
BIN
R1
0.01
Load+
TP2
J6
Load-
J7
Load+(Host)
Charger+
J5
C2
1 µF
TP3
ChargerLoad-(Host)
PGND
PGND
Figure 10. Typical Application Schematic
8.2.1 Design Requirements
As shipped from the Texas Instruments factory, many bq27426 parameters in OTP NVM are left in the
unprogrammed state (zero) while some parameters directly associated with the CHEMID are preprogrammed.
This partially programmed configuration facilitates customization for each end application. Upon device reset, the
contents of OTP are copied to associated volatile RAM-based Data Memory blocks. For proper operation, all
parameters in RAM-based Data Memory require initialization—either by updating Data Memory parameters in a
lab/evaluation situation or by programming the OTP for customer production. The bq27426 Technical Reference
Manual (SLUUBB0) shows the default value and a typically expected value appropriate for most of applications.
12
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Typical Applications (continued)
8.2.2 Detailed Design Procedure
8.2.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It proves most effective in applications with load profiles that
exhibit high-frequency current pulses (that is, cell phones) but is recommended for use in all applications to
reduce noise on this sensitive high-impedance measurement node.
8.2.2.2 Integrated LDO Capacitor
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor of value
at least 2.2 μF should be connected between the VDD pin and VSS. The capacitor must be placed close to the
gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide power
for other devices in the system.
8.2.2.3 Sense Resistor Selection
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect
the resulting differential voltage, and derived current, it senses. As such, it is recommended to select a sense
resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard
recommendation based on best compromise between performance and price is a 1% tolerance, 50 ppm drift
sense resistor with a 1-W power rating.
8.2.3 External Thermistor Support
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a Semitec 103AT type thermistor profile and so that
is the default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance
profile (for example, JT-2 or others) requires an update to the default thermistor coefficients which can be
modified in RAM to ensure highest accuracy temperature measurement performance.
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Typical Applications (continued)
8.2.4 Application Curves
10%
Temperature Accuracy Error
0
Voltage Accuracy Error
-0.05%
-0.1%
-0.15%
-0.2%
-0.25%
-40
-20
0
20
40
Temperature (qC)
60
80
100
5%
0
-5%
-10%
-15%
-40
-20
D001
Figure 11. Voltage Accuracy Error
0
20
40
Temperature (qC)
60
80
100
D002
Figure 12. Internal Temperature Accuracy Error
0.7%
Current Accuracy Error
0.6%
0.5%
0.4%
0.3%
0.2%
0.1%
0
-40
-20
0
20
40
Temperature (qC)
60
80
100
D003
Figure 13. Current Accuracy Error
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9 Power Supply Recommendation
9.1 Power Supply Decoupling
The battery connection on the BAT pin is used for two purposes:
• To supply power to the fuel gauge
• To provide an input for voltage measurement of the battery.
A capacitor of value of at least 1 µF should be connected between BAT and VSS. The capacitor should be placed
close to the gauge IC and have short traces to both the BAT pin and VSS.
The fuel gauge has an integrated LDO with an output on the VDD pin of approximately 1.8 V. A capacitor of value
at least 2.2 µF should be connected between the VDD pin and VSS. The capacitor should be placed close to the
gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be used to provide power
for other devices in the system.
10 Layout
10.1 Layout Guidelines
•
•
•
•
A capacitor of a value of at least 2.2 µF is connected between the VDD pin and VSS. The capacitor should be
placed close to the gauge IC and have short traces to both the VDD pin and VSS. This regulator must not be
used to provide power for other devices in the system.
It is required to have a capacitor of at least 1.0 µF connect between the BAT pin and VSS if the connection
between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be
placed close to the gauge IC and have short traces to both the VDD pin and VSS.
If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power
operation, it is recommended to use external 1-MΩ pulldown resistors to VSS to avoid floating inputs to the I2C
engine.
The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus
capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 1.
Table 1. Recommended Values for SCL and SDA Pullup Resistors
VPU
RPU
•
•
•
•
•
•
1.8 V
3.3 V
Range
Typical
Range
Typical
400 Ω ≤ RPU ≤ 37.6 kΩ
10 kΩ
900 Ω ≤ RPU ≤ 29.2 kΩ
5.1 kΩ
If the host is not using the GPOUT functionality, then it is recommended that GPOUT be connected to a
GPIO of the host so that in cases where the device is in SHUTDOWN, toggling GPOUT can wake the gauge
up from the SHUTDOWN state.
If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a
10-kΩ resistor.
The BIN pin should not be shorted directly to VDD or VSS.
The actual device ground is pin 3 (VSS).
The SRP and SRN pins should be Kelvin connected to the RSENSE terminals. SRP to the battery pack side of
RSENSE and SRN to the system side of the RSENSE.
Kelvin connects the BAT pin to the battery PACKP terminal.
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10.2 Layout Example
Kelvin connect SRP
and SRN connections
right at Rsense
terminals
RSENSE
VSYSTEM
If battery pack’s
thermistor will not be
connected to BIN pin, a
10-kΩ pulldown resistor
should be connected to
the BIN pin.
SRP
BAT
SRN
VDD
CBAT
C VDD
VDD
The BIN pin should not be
shorted directly to VDD or
VSS.
Battery Pack
PACK+
Li-Ion
Cell
TS
+
BIN
Vpullup( do not pull to gauge VDD)
VSS
R BIN
RSCL
SCL
GPOUT
R SDA
Place close to
gauge IC. Trace
to pin and VSS
should be short
SDA
R THERM
Protection
IC
PACK-
RGPOUT
NFET
NFET
SCL
Via connects to Power Ground
SDA
GPOUT
Figure 14. bq27426 Board Layout
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
• bq27426 Technical Reference Manual (SLUUBB0)
• Single Cell Gas Gauge Circuit Design (SLUA456)
• Single Cell Impedance Track Printed-Circuit Board Layout Guide (SLUA457)
• ESD and RF Mitigation in Handheld Battery Electronics (SLUA460)
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
Impedance Track, NanoFree, E2E are trademarks of Texas Instruments.
I2C is a trademark of NXP Semiconductors N.V.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OUTLINE
YZF0009-C01
DSBGA - 0.625 mm max height
SCALE 9.000
DIE SIZE BALL GRID ARRAY
1.65
1.59
B
A
BALL A1
CORNER
1.61
1.55
C
0.625 MAX
SEATING PLANE
0.35
0.15
0.05 C
BALL TYP
1 TYP
0.5 TYP
C
SYMM
B
0.5
TYP
1
TYP
A
0.35
0.25
C A
B
9X
0.015
1
2
3
SYMM
4222180/A 07/2015
NanoFree Is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
TM
3. NanoFree package configuration.
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EXAMPLE BOARD LAYOUT
YZF0009-C01
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
9X (
0.245)
2
1
3
A
(0.5) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MAX
( 0.245)
METAL
METAL UNDER
SOLDER MASK
0.05 MIN
( 0.245)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4222180/A 07/2015
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
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EXAMPLE STENCIL DESIGN
YZF0009-C01
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
9X ( 0.25)
1
3
2
A
(0.5)
TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:40X
4222180/A 07/2015
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ27426YZFR
ACTIVE
DSBGA
YZF
9
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
BQ27426
BQ27426YZFT
ACTIVE
DSBGA
YZF
9
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
BQ27426
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
23-Feb-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Feb-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
BQ27426YZFR
DSBGA
YZF
9
3000
180.0
8.4
BQ27426YZFT
DSBGA
YZF
9
250
180.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.78
1.78
0.69
4.0
8.0
Q1
1.78
1.78
0.69
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Feb-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ27426YZFR
DSBGA
YZF
9
3000
182.0
182.0
20.0
BQ27426YZFT
DSBGA
YZF
9
250
182.0
182.0
20.0
Pack Materials-Page 2
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