Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 CC1350 SimpleLink™ Ultra-Low-Power Dual-Band Wireless MCU 1 Device Overview 1.1 Features 1 • World's First Dual-Band (Sub-1 GHz and 2.4 GHz) Wireless Microcontroller • Microcontroller – Powerful ARM® Cortex®-M3 Processor – EEMBC CoreMark® Score: 142 – EEMBC ULPBench™ Score: 158 – Clock Speed up to 48-MHz – 128KB of In-System Programmable Flash – 8KB of SRAM for Cache (or as General-Purpose RAM) – 20KB of Ultra-Low-Leakage SRAM – 2-Pin cJTAG and JTAG Debugging – Supports Over-the-Air (OTA) Update • Ultra-Low-Power Sensor Controller – Can Run Autonomously From the Rest of the System – 16-Bit Architecture – 2KB of Ultra-Low-Leakage SRAM for Code and Data • Efficient Code-Size Architecture, Placing Parts of TI-RTOS, Drivers, Bluetooth® low energy Controller and Bootloader in ROM • RoHS-Compliant Package – 7-mm × 7-mm RGZ VQFN48 (30 GPIOs) – 5-mm × 5-mm RHB VQFN32 (15 GPIOs) – 4-mm × 4-mm RSM VQFN32 (10 GPIOs) • Peripherals – All Digital Peripheral Pins Can Be Routed to Any GPIO – Four General-Purpose Timer Modules (Eight 16-Bit or Four 32-Bit Timers, PWM Each) – 12-Bit ADC, 200 ksamples/s, 8-Channel Analog MUX – Continuous Time Comparator – Ultra-Low-Power Clocked Comparator – Programmable Current Source – UART – 2× SSI (SPI, MICROWIRE, TI) – I2C, I2S – Real-Time Clock (RTC) – AES-128 Security Module – True Random Number Generator (TRNG) – Support for Eight Capacitive Sensing Buttons – Integrated Temperature Sensor SPACER SPACER 1 SPACER SPACER • External System – On-Chip Internal DC-DC Converter – Seamless Integration With the SimpleLink™ CC1190 and CC2592 Range Extenders • Low Power – Wide Supply Voltage Range: 1.8 to 3.8 V – RX: 5.4 mA (Sub-1 GHz), 6.4 mA (Bluetooth low energy, 2.4 GHz) – TX at +10 dBm: 13.4 mA (Sub-1 GHz) – TX at +9 dBm: 22.3 mA (Bluetooth low energy, 2.4 GHz) – TX at +0 dBm: 10.5 mA (Bluetooth low energy, 2.4 GHz) – Active-Mode MCU 48 MHz Running Coremark: 2.5 mA (51 µA/MHz) – Active-Mode MCU: 48.5 CoreMark/mA – Active-Mode Sensor Controller at 24 MHz: 0.4 mA + 8.2 µA/MHz – Sensor Controller, One Wakeup Every Second Performing One 12-Bit ADC Sampling: 0.95 µA – Standby: 0.7 µA (RTC Running and RAM and CPU Retention) – Shutdown: 185 nA (Wakeup on External Events) • RF Section – 2.4-GHz RF Transceiver Compatible With Bluetooth low energy 4.2 Specification – Excellent Receiver Sensitivity –124 dBm Using Long-Range Mode, –110 dBm at 50 kbps (Sub-1 GHz), –87 dBm at Bluetooth low energy – Excellent Selectivity (±100 kHz): 56 dB – Excellent Blocking Performance (±10 MHz): 90 dB – Programmable Output Power up to +15 dBm (Sub-1 GHz) and +9 dBm at 2.4 GHz (Bluetooth low energy) – Single-Ended or Differential RF Interface – Suitable for Systems Targeting Compliance With Worldwide Radio Frequency Regulations – ETSI EN 300 220, EN 303 204 (Europe) – EN 300 440 Class 2 (Europe) – EN 300 328 (Europe) – FCC CFR47 Part 15 (US) – ARIB STD-T66 (Japan) – ARIB STD-T108 (Japan) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com – Wireless M-Bus and Selected IEEE® 802.15.4g PHY • Tools and Development Environment – Full-Feature and Low-Cost Development Kits – Multiple Reference Designs for Different RF Configurations 1.2 • • • • • • • • Packet Sniffer PC Software Sensor Controller Studio SmartRF™ Studio SmartRF Flash Programmer 2 IAR Embedded Workbench® for ARM Code Composer Studio™ Applications 315-, 433-, 470-, 500-, 779-, 868-, 915-, 920-MHz and 2.4-GHz ISM and SRD Systems Low-Power Wireless Systems With 50-kHz to 5-MHz Channel Spacing Home and Building Automation Wireless Alarm and Security Systems Industrial Monitoring and Control Bluetooth low energy Beacon Management Bluetooth low energy Commissioning Smart Grid and Automatic Meter Reading 1.3 – – – – – – • • • • • • • • Wireless Healthcare Applications Wireless Sensor Networks Active RFID IEEE 802.15.4g, IP-Enabled Smart Objects (6LoWPAN), Wireless M-Bus, KNX Systems, Wi-SUN™, and Proprietary Systems Energy-Harvesting Applications Electronic Shelf Label (ESL) Long-Range Sensor Applications Heat-Cost Allocators Description The CC1350 is a member of the CC26xx and CC13xx family of cost-effective, ultra-low-power, 2.4-GHz and Sub-1 GHz RF devices from Texas Instruments™. Very low active RF and microcontroller (MCU) current consumption, in addition to flexible low-power modes, provide excellent battery lifetime and allow long-range operation on small coin-cell batteries and in energy-harvesting applications. The CC1350 is the first device in the CC13xx and CC26xx family of cost-effective, ultra-low-power wireless MCUs capable of handling both Sub-1 GHz and 2.4-GHz RF frequencies. The CC1350 device combines a flexible, very low-power RF transceiver with a powerful 48-MHz ARM® Cortex®-M3 microcontroller in a platform supporting multiple physical layers and RF standards. A dedicated Radio Controller (Cortex®-M0) handles low-level RF protocol commands that are stored in ROM or RAM, thus ensuring ultra-low power and flexibility to handle both Sub-1 GHz protocols and 2.4 GHz protocols (for example Bluetooth® low energy). This enables the combination of a Sub-1 GHz communication solution that offers the best possible RF range together with a Bluetooth low energy smartphone connection that enables great user experience through a phone application. The Sub-1 GHz only device in this family is the CC1310. The CC1350 device is a highly integrated, true single-chip solution incorporating a complete RF system and an on-chip DC-DC converter. Sensors can be handled in a very low-power manner by a dedicated autonomous ultra-low-power MCU that can be configured to handle analog and digital sensors; thus the main MCU (Cortex-M3) can maximize sleep time. The CC1350 power and clock management and radio systems require specific configuration and handling by software to operate correctly, which has been implemented in the TI-RTOS. TI recommends using this software framework for all application development on the device. The complete TI-RTOS and device drivers are offered in source code free of charge. Device Information (1) PACKAGE BODY SIZE (NOM) CC1350F128RGZ PART NUMBER VQFN (48) 7.00 mm × 7.00 mm CC1350F128RHB VQFN (32) 5.00 mm × 5.00 mm CC1350F128RSM VQFN (32) 4.00 mm × 4.00 mm (1) 2 For more information, see Section 9. Device Overview Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 1.4 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Functional Block Diagram Figure 1-1 shows a block diagram for the CC1350 device. SimpleLinkTM CC1350 Wireless MCU cJTAG RF core ROM Main CPU: ADC ARM® Cortex®-M3 128-KB Flash ADC Digital PLL DSP Modem 8-KB Cache 20-KB SRAM ARM® Cortex®-M0 4x 32-Bit Timers UART 2x SSI (SPI,µW,TI) ROM Sensor Controller General Peripherals / Modules I 2C 4-KB SRAM Sensor Controller Engine 12-Bit ADC, 200ks/s I2S Watchdog Timer 2x Analog Comparators 10 / 15 / 30 GPIOs TRNG SPI / I2C Digital Sensor IF AES Temp. / Batt. Monitor Constant Current Source 32 ch. PDMA RTC Time-to-Digital Converter 2-KB SRAM DC-DC Converter Copyright © 2016, Texas Instruments Incorporated Figure 1-1. CC1350 Block Diagram Device Overview Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 3 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com Table of Contents 1 2 3 Device Overview ......................................... 1 5.20 Thermal Characteristics ............................. 25 1.1 Features .............................................. 1 5.21 Timing and Switching Characteristics ............... 25 1.2 Applications ........................................... 2 5.22 Typical Characteristics .............................. 29 1.3 Description ............................................ 2 1.4 Functional Block Diagram ............................ 3 ............... .................. Detailed Description ................................... 6.1 Overview ............................................ 6.2 Main CPU ........................................... 6.3 RF Core ............................................. 6.4 Sensor Controller ................................... 6.5 Memory .............................................. 6.6 Debug ............................................... 6.7 Power Management ................................. 6.8 Clock Systems ...................................... 6.9 General Peripherals and Modules .................. 6.10 Voltage Supply Domains ............................ 6.11 System Architecture ................................. Application, Implementation, and Layout ......... Revision History ......................................... 5 Device Comparison ..................................... 6 3.1 4 4 Related Products ..................................... 6 Terminal Configuration and Functions .............. 7 4.1 Pin Diagram – RSM Package ........................ 7 4.2 Signal Descriptions – RSM Package ................. 8 ........................ 9 4.4 Signal Descriptions – RHB Package ................ 10 4.5 Pin Diagram – RGZ Package ....................... 11 4.6 Signal Descriptions – RGZ Package ................ 12 Specifications ........................................... 14 5.1 Absolute Maximum Ratings ......................... 14 5.2 ESD Ratings ........................................ 14 5.3 Recommended Operating Conditions ............... 14 5.4 Power Consumption Summary...................... 15 5.5 RF Characteristics .................................. 16 5.6 Receive (RX) Parameters, 861 MHz to 1054 MHz . 16 5.7 Receive (RX) Parameters, 431 MHz to 527 MHz .. 17 5.8 Transmit (TX) Parameters, 861 MHz to 1054 MHz . 19 5.9 Transmit (TX) Parameters, 431 MHz to 527 MHz .. 20 5.10 1-Mbps GFSK (Bluetooth low energy) – RX ........ 20 5.11 1-Mbps GFSK (Bluetooth low energy) – TX ........ 21 5.12 PLL Parameters ..................................... 22 5.13 ADC Characteristics................................. 22 5.14 Temperature Sensor ................................ 23 5.15 Battery Monitor ...................................... 23 5.16 Continuous Time Comparator ....................... 23 5.17 Low-Power Clocked Comparator ................... 24 5.18 Programmable Current Source ..................... 24 5.19 DC Characteristics .................................. 24 4.3 5 6 Pin Diagram – RHB Package 7 5.23 Typical Characteristics – Sub-1 GHz 5.24 Typical Characteristics – 2.4 GHz 7.1 8 9 30 35 37 37 37 38 39 40 40 41 42 42 43 43 44 SimplelinkTM CC1350 LaunchPad™ Bluetooth® and Sub-1 GHz Long Range Wireless Development Kit 44 Device and Documentation Support ............... 45 8.1 Device Nomenclature ............................... 45 8.2 Tools and Software 8.3 Documentation Support ............................. 47 8.4 Texas Instruments Low-Power RF Website 8.5 Low-Power RF eNewsletter ......................... 47 8.6 Additional Information ............................... 47 8.7 Community Resources .............................. 48 8.8 Trademarks.......................................... 48 ................................. ........ 46 47 8.9 Electrostatic Discharge Caution ..................... 49 8.10 Export Control Notice 8.11 Glossary ............................................. 49 ............................... 49 Mechanical, Packaging, and Orderable Information .............................................. 49 9.1 Packaging Information Table of Contents .............................. 49 Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from June 20, 2016 to November 20, 2016 • • • • • • • • • • • • • Page Added 4-mm × 4-mm and 5-mm × 5-mm packages ............................................................................. 1 Added Figure 4-1 ..................................................................................................................... 7 Added Figure 4-2 ..................................................................................................................... 9 Added support for split supply rail to Section 5.1 ............................................................................... 14 Added OOK modulation support to Section 5.4 ................................................................................. 15 Added OOK modulation sensitivity to Section 5.6 .............................................................................. 17 Added receive parameters for 431-MHz to 527-MHz band in Section 5.7 .................................................. 17 Added transmit parameters for 431-MHz to 527-MHz band in Section 5.9 ................................................. 20 Changed ADC reference voltage to correct value in Section 5.13 ........................................................... 23 Added thermal characteristics for RHB and RSM packages in Section 5.20 ............................................... 25 Added Figure 5-10 .................................................................................................................. 29 Added Section 6.10 ................................................................................................................. 43 Changed Figure 8-1 ................................................................................................................. 45 Revision History Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 5 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 3 Device Comparison Table 3-1 lists the device family overview. Table 3-1. Device Family Overview DEVICE PHY SUPPORT FLASH (KB) RAM (KB) GPIOs PACKAGE SIZE CC1350F128RGZ Proprietary, Wireless M-Bus, IEEE 802.15.4g, Bluetooth low energy 128 20 30 7 mm × 7 mm CC1350F128RHB Proprietary, Wireless M-Bus, IEEE 802.15.4g, Bluetooth low energy 128 20 15 5 mm × 5 mm CC1350F128RSM Proprietary, Wireless M-Bus, IEEE 802.15.4g, Bluetooth low energy 128 20 10 4 mm × 4 mm 3.1 Related Products Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF solutions suitable for a broad range of application. The offerings range from fully customized solutions to turnkey offerings with precertified hardware and software (protocol). Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of Sub-1 GHz ISM bands. Companion Products Review products that are frequently purchased or used with this product. Reference Designs for CC1350 The TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor, and connectivity. Created by TI experts to help you jump-start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market. Search and download designs at ti.com/tidesigns. 6 Device Comparison Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 4 Terminal Configuration and Functions 4.1 Pin Diagram – RSM Package 17 VSS 18 DCDC_SW 19 VDDS_DCDC 20 VSS 21 RESET_N 22 DIO_5 23 DIO_6 24 DIO_7 Figure 4-1 shows the RSM pinout diagram. DIO_8 25 16 DIO_4 DIO_9 26 15 DIO_3 VDDS 27 14 JTAG_TCKC VDDR 28 13 JTAG_TMSC VSS 29 12 DCOUPL X24M_N 30 11 VDDS2 X24M_P 31 10 DIO_2 3 4 5 6 7 8 VSS X32K_Q1 X32K_Q2 VSS DIO_0 2 RX_TX 1 RF_P 9 RF_N VDDR_RF 32 DIO_1 Figure 4-1. RSM (4-mm × 4-mm) Pinout, 0.4-mm Pitch Top View I/O pins marked in Figure 4-1 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_0 • Pin 9, DIO_1 • Pin 10, DIO_2 • Pin 13, JTAG_TMSC • Pin 15, DIO_3 • Pin 16, DIO_4 I/O pins marked in Figure 4-1 in italics have analog capabilities; they are as follows: • Pin 22, DIO_5 • Pin 23, DIO_6 • Pin 24, DIO_7 • Pin 25, DIO_8 • Pin 26, DIO_9 Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 7 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 4.2 www.ti.com Signal Descriptions – RSM Package Table 4-1. Signal Descriptions – RSM Package PIN NAME NO. TYPE DESCRIPTION DCDC_SW 18 Power Output from internal DC-DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor (2) DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_4 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_5 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_6 23 Digital or analog I/O GPIO, Sensor Controller, analog DIO_7 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 26 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC JTAG_TCKC 14 Digital I/O JTAG TCKC RESET_N 21 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 4 RF I/O Optional bias pin for the RF LNA VDDS 27 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 19 Power 1.8-V to 3.8-V DC-DC supply VDDR 28 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) 3, 7, 17, 20, 29 Power Ground X32K_Q1 5 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 6 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 VSS (1) (2) (3) (4) 8 Ground; exposed ground pad Reset, active low. No internal pullup. See the technical reference manual listed in Section 8.3 for more details. Do not supply external circuitry from this pin. If internal DC-DC is not used, this pin is supplied internally from the main LDO. If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 4.3 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Pin Diagram – RHB Package 17 DCDC_SW 18 VDDS_DCDC 19 RESET_N 20 DIO_7 21 DIO_8 22 DIO_9 23 DIO_10 24 DIO_11 Figure 4-2 shows the RHB pinout diagram. DIO_12 25 16 DIO_6 DIO_13 26 15 DIO_5 DIO_14 27 14 JTAG_TCKC VDDS 28 13 JTAG_TMSC VDDR 29 12 DCOUPL X24M_N 30 11 VDDS2 X24M_P 31 10 DIO_4 1 2 3 4 5 6 7 8 RF_P RX_TX X32K_Q1 X32K_Q2 DIO_0 DIO_1 DIO_2 9 RF_N VDDR_RF 32 DIO_3 Figure 4-2. RHB (5-mm × 5-mm) Pinout, 0.5-mm Pitch Top View I/O pins marked in Figure 4-2 in bold have high-drive capabilities; they are as follows: • Pin 8, DIO_2 • Pin 9, DIO_3 • Pin 10, DIO_4 • Pin 15, DIO_5 • Pin 16, DIO_6 I/O pins marked in Figure 4-2 in italics have analog capabilities; they are as follows: • Pin 20, DIO_7 • Pin 21, DIO_8 • Pin 22, DIO_9 • Pin 23, DIO_10 • Pin 24, DIO_11 • Pin 25, DIO_12 • Pin 26, DIO_13 • Pin 27, DIO_14 Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 9 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 4.4 www.ti.com Signal Descriptions – RHB Package Table 4-2. Signal Descriptions – RHB Package PIN NAME TYPE NO. DESCRIPTION DCDC_SW 17 Power Output from internal DC-DC (1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling (2) DIO_0 6 Digital I/O GPIO, Sensor Controller DIO_1 7 Digital I/O GPIO, Sensor Controller DIO_2 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_4 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_5 15 Digital I/O GPIO, high-drive capability, JTAG_TDO DIO_6 16 Digital I/O GPIO, high-drive capability, JTAG_TDI DIO_7 20 Digital or analog I/O GPIO, Sensor Controller, analog DIO_8 21 Digital or analog I/O GPIO, Sensor Controller, analog DIO_9 22 Digital or analog I/O GPIO, Sensor Controller, analog DIO_10 23 Digital or analog I/O GPIO, Sensor Controller, Analog DIO_11 24 Digital or analog I/O GPIO, Sensor Controller, analog DIO_12 25 Digital or analog I/O GPIO, Sensor Controller, analog DIO_13 26 Digital or analog I/O GPIO, Sensor Controller, analog DIO_14 27 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 13 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 14 Digital I/O JTAG TCKC RESET_N 19 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX RX_TX 3 RF I/O Optional bias pin for the RF LNA VDDR 29 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3) VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) VDDS 28 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1) VDDS_DCDC 18 Power 1.8-V to 3.8-V DC-DC supply X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (1) (2) (3) (4) 10 Ground; exposed ground pad Reset, active low. No internal pullup. For more details, see the technical reference manual listed in Section 8.3. Do not supply external circuitry from this pin. If internal DC-DC is not used, this pin is supplied internally from the main LDO. If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 4.5 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Pin Diagram – RGZ Package 25 JTAG_TCKC 26 DIO_16 27 DIO_17 29 DIO_19 28 DIO_18 31 DIO_21 30 DIO_20 33 DCDC_SW 32 DIO_22 35 RESET_N 34 VDDS_DCDC 36 DIO_23 Figure 4-3 shows the RGZ pinout diagram. DIO_24 37 24 JTAG_TMSC DIO_25 38 23 DCOUPL DIO_26 39 22 VDDS3 DIO_27 40 DIO_28 41 21 DIO_15 20 DIO_14 DIO_29 42 DIO_30 43 19 DIO_13 18 DIO_12 VDDS 44 17 DIO_11 16 DIO_10 VDDR 45 15 DIO_9 14 DIO_8 X24M_N 46 X24M_P 47 13 VDDS2 5 6 7 8 9 X32K_Q2 DIO_1 DIO_2 DIO_3 DIO_4 DIO_7 12 4 X32K_Q1 DIO_6 11 3 DIO_5 10 2 RF_N RX_TX RF_P 1 VDDR_RF 48 Figure 4-3. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch Top View I/O pins marked in Figure 4-3 in bold have high-drive capabilities; they are as follows: • Pin 10, DIO_5 • Pin 11, DIO_6 • Pin 12, DIO_7 • Pin 24, JTAG_TMSC • Pin 26, DIO_16 • Pin 27, DIO_17 I/O pins marked in Figure 4-3 in italics have analog capabilities; they are as follows: • Pin 36, DIO_23 • Pin 37, DIO_24 • Pin 38, DIO_25 • Pin 39, DIO_26 • Pin 40, DIO_27 • Pin 41, DIO_28 • Pin 42, DIO_29 • Pin 43, DIO_30 Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 11 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 4.6 www.ti.com Signal Descriptions – RGZ Package Table 4-3. Signal Descriptions – RGZ Package PIN NAME TYPE NO. DESCRIPTION DCDC_SW 33 Power Output from internal DC-DC (1) (2) DCOUPL 23 Power 1.27-V regulated digital-supply (decoupling capacitor) (2) DIO_1 6 Digital I/O GPIO, Sensor Controller DIO_2 7 Digital I/O GPIO, Sensor Controller DIO_3 8 Digital I/O GPIO, Sensor Controller DIO_4 9 Digital I/O GPIO, Sensor Controller DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_8 14 Digital I/O GPIO DIO_9 15 Digital I/O GPIO DIO_10 16 Digital I/O GPIO DIO_11 17 Digital I/O GPIO DIO_12 18 Digital I/O GPIO DIO_13 19 Digital I/O GPIO DIO_14 20 Digital I/O GPIO DIO_15 21 Digital I/O GPIO DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability DIO_18 28 Digital I/O GPIO DIO_19 29 Digital I/O GPIO DIO_20 30 Digital I/O GPIO DIO_21 31 Digital I/O GPIO DIO_22 32 Digital I/O GPIO DIO_23 36 Digital or analog I/O GPIO, Sensor Controller, analog DIO_24 37 Digital or analog I/O GPIO, Sensor Controller, analog DIO_25 38 Digital or analog I/O GPIO, Sensor Controller, analog DIO_26 39 Digital or analog I/O GPIO, Sensor Controller, analog DIO_27 40 Digital or analog I/O GPIO, Sensor Controller, analog DIO_28 41 Digital or analog I/O GPIO, Sensor Controller, analog DIO_29 42 Digital or analog I/O GPIO, Sensor Controller, analog DIO_30 43 Digital or analog I/O GPIO, Sensor Controller, analog EGP – Power JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 25 Digital I/O JTAG TCKC (3) RESET_N 35 Digital input RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX VDDR 45 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4) (1) (2) (3) (4) 12 Ground; exposed ground pad Reset, active-low. No internal pullup. See technical reference manual listed in Section 8.3 for more details. Do not supply external circuitry from this pin. For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual. If internal DC-DC is not used, this pin is supplied internally from the main LDO. Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Table 4-3. Signal Descriptions – RGZ Package (continued) PIN NAME TYPE NO. DESCRIPTION VDDR_RF 48 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (5) VDDS 44 Power 1.8-V to 3.8-V main chip supply (1) VDDS2 13 Power 1.8-V to 3.8-V DIO supply (1) VDDS3 22 Power 1.8-V to 3.8-V DIO supply (1) VDDS_DCDC 34 Power 1.8-V to 3.8-V DC-DC supply X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2 RX_TX 3 RF I/O X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 (5) Optional bias pin for the RF LNA If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO. Terminal Configuration and Functions Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 13 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) VDDS, VDDS2, and VDDS3 MIN MAX UNIT Supply voltage –0.3 4.1 V Voltage on any digital pin (3) –0.3 VDDSn + 0.3, max 4.1 V Voltage on crystal oscillator pins X32K_Q1, X32K_Q2, X24M_N, and X24M_P –0.3 VDDR + 0.3, max 2.25 V Voltage scaling enabled –0.3 VDDS Voltage scaling disabled, internal reference –0.3 1.49 Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9 10 dBm –40 150 °C Voltage on ADC input Vin Input RF level Tstg (1) (2) (3) Storage temperature V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to ground, unless otherwise noted. Each pin is referenced to a specific VDDSn (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 6-3. 5.2 ESD Ratings VALUE VESD (1) (2) 5.3 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1) Charged device model (CDM), per JESD22-C101 (2) All pins ±3000 All pins ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX –40 85 °C 1.8 3.8 V Rising supply voltage slew rate 0 100 mV/µs Falling supply voltage slew rate 0 20 mV/µs (1) 3 mV/µs No limitation for negative temperature gradient, or outside standby mode 5 °C/s Ambient temperature For operation in battery-powered and 3.3-V systems (internal DC-DC can be used to minimize power consumption) Operating supply voltage (VDDS) Falling supply voltage slew rate, with low-power flash setting Positive temperature gradient in standby (1) (2) 14 (2) UNIT For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be used to ensure compliance with this slew rate. Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see Section 5.21.3.4). Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 5.4 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Power Consumption Summary Measured on the Texas Instruments CC1310EM-7XD-7793 reference design unless otherwise noted. Tc = 25°C, VDDS = 3.6 V with DC-DC enabled, unless otherwise noted. Using boost mode (increasing VDDR to 1.95 V), will increase currents in this table by 15% (does not apply to TX 14-dBm setting where this current is already included). PARAMETER Icore Core current consumption TEST CONDITIONS TYP Reset. RESET_N pin asserted or VDDS below power-on-reset threshold 100 Shutdown. No clocks running, no retention 185 Standby. With RTC, CPU, RAM, and (partial) register retention. RCOSC_LF 0.7 Standby. With RTC, CPU, RAM, and (partial) register retention. XOSC_LF 0.8 UNIT nA µA Idle. Supply Systems and RAM powered. 570 Active. MCU running CoreMark at 48 MHz 1.2 mA + 25.5 µA/MHz Active. MCU running CoreMark at 48 MHz 2.5 Active. MCU running CoreMark at 24 MHz 1.9 Radio RX, measured on CC1350EM-7XD-Dual Band reference design, 868 MHz 5.4 mA Radio RX, measured on CC1350EM-7XD-Dual Band reference design, Bluetooth low energy, 2440 MHz 6.4 mA Radio TX, 10-dBm output power, (G)FSK, 868 MHz 13.4 mA Radio TX, 10-dBm output power, measured on CC1350EM-7XDDualBand reference design, 868 MHz 14.2 mA Radio TX, OOK modulation, 10-dBm output power, AVG, 868 MHz 11.2 mA Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power, (G)FSK, 868 MHz 23.5 mA Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power, measured on CC1350EM-7XD-Dual Band reference design, 868 MHz 24.4 mA Radio TX, OOK modulation, boost mode (VDDR = 1.95 V), 14-dBm, AVG, 868 MHz 14.8 mA Radio TX Bluetooth low energy, 0-dBm output power, measured on CC1350EM-7XD-DualBand reference design, 2440 MHz 10.5 mA Radio TX Bluetooth low energy, boost mode (VDDR = 1.95 V), 9dBm output power, measured on CC1350EM-7XD-Dual Band reference design, 2440 MHz 22.3 mA Radio TX, boost mode (VDDR = 1.95 V), 15-dBm output power, (G)FSK, measured on CC1310EM-7XD-4251, 433.92 MHz 25.1 mA Radio TX, 10-dBm output power, measured on CC1310EM-7XD4251, 433.92 MHz 13.2 mA mA PERIPHERAL CURRENT CONSUMPTION Iperi Peripheral power domain Delta current with domain enabled 20 Serial power domain Delta current with domain enabled 13 RF core Delta current with power domain enabled, clock enabled, RF core idle 237 µDMA Delta current with clock enabled, module idle 130 Timers Delta current with clock enabled, module idle 113 I2C Delta current with clock enabled, module idle 12 I2S Delta current with clock enabled, module idle 36 SSI Delta current with clock enabled, module idle 93 UART Delta current with clock enabled, module idle 164 Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 µA 15 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 5.5 www.ti.com RF Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER MIN Frequency bands (1) (1) 5.6 TYP MAX (287) (351) (359) (439) 431 527 (718) (878) 861 1054 2152 2635 UNIT MHz For more information, see the CC1350 SimpleLink Wireless MCU Silicon Errata. Receive (RX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN Data rate Data rate offset tolerance, IEEE 802.15.4g PHY 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–3 Data rate step size TYP MAX UNIT 50 kbps 1600 ppm 1.5 bps Digital channel filter programmable bandwidth Using VCO divide by 5 setting Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 868 MHz and 915 MHz –109 dBm Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 868 MHz and 915 MHz. Measured on CC1310EM-7XD-7793. –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44, 47 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 48, 53 dB Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 62 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 64, 65 dB Blocking ±5 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 67, 68 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 76, 76 dB 16 Specifications 40 4000 kHz Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Receive (RX) Parameters, 861 MHz to 1054 MHz (continued) Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN Spurious emissions 1 GHz to 13 GHz Radiated emissions measured according to (VCO leakage at 3.5 GHz) and 30 MHz ETSI EN 300 220 to 1 GHz TYP MAX UNIT –70 dBm Image rejection (image compensation enabled, the image compensation is calibrated in production) Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44 dB RSSI dynamic range 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit. This range will give an accuracy of ±2 dB. 95 dB RSSI accuracy 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode). Starting from the sensitivity limit across the given dynamic range. ±2 dB Receiver sensitivity, long-range mode 625 bps 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHz. –124 dBm Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±100 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 56, 56 dB Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±200 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 62, 65 dB Blocking ±1 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 73, 77 dB Blocking ±2 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 79, 79 dB Blocking ±10 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 91, 91 dB Receiver sensitivity, OOK 4.8 kbps 4.8 kbps, OOK, 40-kHz RX bandwidth, BER = 10–2 868 MHz and 915 MHz. Measured on CC1310EM-7XD7793. –115 dBm 5.7 Receive (RX) Parameters, 431 MHz to 527 MHz Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity, 50 kbps 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 –110 dBm Receiver saturation 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 10 dBm Selectivity, ±200 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 44, 47 dB Selectivity, ±400 kHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 42, 50 dB Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 17 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com Receive (RX) Parameters, 431 MHz to 527 MHz (continued) Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Blocking ±1 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 53, 58 dB Blocking ±2 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 59, 60 dB Blocking ±10 MHz, 50 kbps Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 74, 74 dB Spurious emissions 1 GHz to 13 GHz Radiated emissions measured according to ETSI EN (VCO leakage at 3.5 GHz) and 30 MHz 300 220 to 1 GHz Image rejection (image compensation enabled, the image compensation is calibrated in production) Wanted signal 3 dB above sensitivity limit. 50 kbps, GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same modulation format as IEEE 802.15.4g mandatory mode), BER = 10–2 Receiver sensitivity, long-range mode 625 bps 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. 868 MHz and 915 MHZ. –74 dBm 43 dB –124 dBm Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±100 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 56, 56 dB Wanted signal 3 dB above sensitivity limit. 10 ksym/s, Selectivity, ±200 kHz, long-range mode GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 625 bps 40-kHz RX bandwidth, BER = 10–2 62, 65 dB Blocking ±1 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 68, 73 dB Blocking ±2 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 74, 74 dB Blocking ±10 MHz, long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 88, 89 dB Image rejection (image compensation enabled, the image compensation is calibrated in production), long-range mode 625 bps Wanted signal 3 dB above sensitivity limit. 10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 40-kHz RX bandwidth, BER = 10–2 55 dB 18 Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 5.8 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Transmit (TX) Parameters, 861 MHz to 1054 MHz Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Maximum output power, boost mode VDDR = 1.95 V Minimum VDDS for boost mode is 2.1 V 868 MHz and 915 MHz 14 dBm Maximum output power 868 MHz and 915 MHz 12 dBm 24 dB Output power programmable range Output power variation Tested at +10-dBm setting ±0.9 dB Output power variation, boost mode +14 dBm ±0.5 dB Spurious emissions (excluding harmonics) (1) Harmonics Spurious emissions out-of-band, 915 MHz (1) Spurious emissions out-of-band, 920.6 MHz (1) (1) Transmitting +14 dBm ETSI restricted bands <–59 Transmitting +14 dBm outside ETSI restricted bands <–51 1 GHz to 12.75 GHz Transmitting +14 dBm measured in 1-MHz bandwidth (ETSI) <–37 Second harmonic Transmitting +14 dBm, conducted 868 MHz, 915 MHz –52, –55 Third harmonic Transmitting +14 dBm, conducted 868 MHz, 915 MHz –58, –55 Fourth harmonic Transmitting +14 dBm, conducted 868 MHz, 915 MHz –56, –56 30 MHz to 88 MHz (within FCC restricted bands) Transmitting +14 dBm, conducted <–66 88 MHz to 216 MHz (within FCC restricted bands) Transmitting +14 dBm, conducted <–65 216 MHz to 960 MHz (within FCC restricted bands) Transmitting +14 dBm, conducted <–65 960 MHz to 2390 MHz and above 2483.5 MHz (within FCC restricted band) Transmitting +14 dBm, conducted <–52 1 GHz to 12.75 GHz Transmitting +14 dBm, conducted (outside FCC restricted bands) <–43 Below 710 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–50 710 MHz to 900 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–60 900 MHz to 915 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–57 930 MHz to 1000 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–57 1000 MHz to 1215 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–59 Above 1215 MHz (ARIB T-108) Transmitting +14 dBm, conducted <–45 30 MHz to 1 GHz dBm dBm dBm dBm Suitable for systems targeting compliance with EN 300 220, EN 54-25, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108. Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 19 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 5.9 www.ti.com Transmit (TX) Parameters, 431 MHz to 527 MHz Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path. PARAMETER Maximum output power, boost mode TEST CONDITIONS MIN TYP VDDR = 1.95 V Minimum VDDS for boost mode is 2.1 V Maximum output power 30 MHz to 1 GHz Spurious emissions (excluding harmonics) (1) 1 GHz to 12.75 GHz (1) MAX UNIT 15 dBm 14 dBm Transmitting +10 dBm, 433 MHz Inside ETSI restricted bands <–63 Transmitting +10 dBm, 433 MHz Outside ETSI restricted bands <–39 Transmitting +10 dBm, 433 MHz Outside ETSI restricted bands, measured in 1-MHz bandwidth (ETSI) <–52 Transmitting +10 dBm, 433 MHz Inside ETSI restricted bands, measured in 1-MHz bandwidth (ETSI) <–58 dBm Suitable for systems targeting compliance with EN 300 220, EN 54-25, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108. 5.10 1-Mbps GFSK (Bluetooth low energy) – RX Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. All tests with Bluetooth low energy PHY (1 Mbps), 37-byte payload unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity Differential mode. Measured at the CC1350_7XDDual Band SMA connector, 37-byte payload BER = 10–3 –87 dBm Receiver sensitivity Differential mode. Measured at the CC1350_7XDDual Band SMA connector, 255-byte payload BER = 10–3 –86 dBm Receiver saturation Differential mode. Measured at the CC1350_7XDDual Band SMA connector, BER = 10–3 0 dBm Frequency error tolerance Difference between the incoming carrier frequency and the internally generated carrier frequency. Input signal 10 dB above sensitivity limit –350 350 kHz Data rate error tolerance Difference between incoming data rate and the internally generated data rate. Input signal 10 dB above sensitivity limit –750 750 ppm Co-channel rejection (1) Wanted signal at –67 dBm, modulated interferer in channel, BER = 10–3 –6 dB Selectivity, ±1 MHz (1) Wanted signal at –67 dBm, modulated interferer at ±1 MHz, BER = 10–3 7 / 4 (2) dB Selectivity, +2 MHz (1) Wanted signal at –67 dBm, modulated interferer at +2 MHz, BER = 10–3 38 dB Selectivity, ±3 MHz (1) Wanted signal at –67 dBm, modulated interferer at ±3 MHz, BER = 10–3. Note that –3 MHz is –1 MHz from the image frequency. 36 / 41 (2) dB Selectivity, ±4 MHz (1) Wanted signal at –67 dBm, modulated interferer at ±4 MHz, BER = 10–3 39 / 38 (2) dB Selectivity, ±5 MHz (1) Wanted signal at –67 dBm, modulated interferer at ±5 MHz, BER = 10–3 35 / 39 (2) dB Selectivity, ±6 MHz (1) Wanted signal at –67 dBm, modulated interferer at ≥ ±6 MHz, BER = 10–3 42 / 37 (2) dB Selectivity, ±15 MHz or more (1) Wanted signal at –67 dBm, modulated interferer at ≥ ±15 MHz or more, BER = 10–3 55 dB (1) (2) 20 Numbers given as I/C dB. X / Y, where X is +N MHz and Y is –N MHz. Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 1-Mbps GFSK (Bluetooth low energy) – RX (continued) Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. All tests with Bluetooth low energy PHY (1 Mbps), 37-byte payload unless otherwise noted. PARAMETER TEST CONDITIONS Selectivity, Image frequency (image compensation enabled, the image compensation is calibrated in production) (1) Wanted signal at –67 dBm, modulated interferer at image frequency, BER = 10–3 37 dB Selectivity, Image frequency ±1 MHz (1) Wanted signal at –67 dBm, modulated interferer at ±1 MHz from image (–3 MHz and –1 MHz from wanted) frequency, BER = 10–3 4 / 41 (2) dB Out-of-band blocking (3) 30 MHz to 2000 MHz –25 dBm Out-of-band blocking 2003 MHz to 2399 MHz >–20 dBm Out-of-band blocking 2484 MHz to 2997 MHz >–20 dBm Out-of-band blocking 3000 MHz to 12.75 GHz >–30 dBm Intermodulation Wanted signal at 2402 MHz, –64 dBm. Two interferers at 2405 and 2408 MHz, respectively, at the given power level –30 dBm Spurious emissions, 30 to 1000 MHz Conducted measurement in a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 –72 dBm Spurious emissions, 1 to 12.75 GHz Conducted measurement in a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 –65 dBm RSSI dynamic range 70 dB RSSI accuracy ±4 dB (3) MIN TYP MAX UNIT Excluding one exception at Fwanted / 2, per Bluetooth Specification. 5.11 1-Mbps GFSK (Bluetooth low energy) – TX Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power, boost mode Differential mode, delivered to a single-ended 50-Ω load through a balun. VDDR = 1.95 V Minimum VDDS for boost mode is 2.1 V. 9 dBm Output power Differential mode, delivered to a single-ended 50-Ω load through a balun. 5 dBm Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm f < 1 GHz, outside restricted bands –59 f < 1 GHz, restricted bands ETSI –55 f < 1 GHz, restricted bands FCC –61 f > 1 GHz, including harmonics –47 Spurious emission conducted measurement (1) (1) dBm Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 21 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 5.12 PLL Parameters Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V PARAMETER TEST CONDITIONS Phase noise in the 868-MHz band Phase noise in the 915-MHz band MIN TYP ±100-kHz offset –101 ±200-kHz offset –108 ±400-kHz offset –115 ±1000-kHz offset –124 ±2000-kHz offset –131 ±10000-kHz offset –140 ±100-kHz offset –98 ±200-kHz offset –106 ±400-kHz offset –114 ±1000-kHz offset –122 ±2000-kHz offset –130 ±10000-kHz offset –140 MAX UNIT dBc/Hz dBc/Hz 5.13 ADC Characteristics Tc = 25°C, VDDS = 3.0 V, DC-DC disabled. Input voltage scaling enabled, unless otherwise noted. (1) PARAMETER TEST CONDITIONS Input voltage range MIN TYP 0 Resolution VDDS 12 Sample rate DNL (3) INL (4) ENOB MAX UNIT V Bits 200 ksamples/s Offset Internal 4.3-V equivalent reference (2) 2.1 LSB Gain error Internal 4.3-V equivalent reference (2) –0.14 LSB >–1 LSB ±2 LSB Differential nonlinearity Integral nonlinearity Effective number of bits Internal 4.3-V equivalent reference (2), 200 ksamples/s, 9.6-kHz input tone 10.0 VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 10.2 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksamples/s, 300-Hz input tone 11.1 Bits (2) THD Total harmonic distortion Internal 4.3-V equivalent reference , 200 ksamples/s, 9.6-kHz input tone –65 VDDS as reference, 200 ksamples/s, 9.6-kHz input tone –72 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksamples/s, 300-Hz input tone –75 dB (2) SINAD and SNDR Signal-to-noise and distortion ratio Internal 4.3-V equivalent reference , 200 ksamples/s, 9.6-kHz input tone 62 VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 63 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksamples/s, 300-Hz input tone 69 dB (2) SFDR (1) (2) (3) (4) 22 Spurious-free dynamic range Internal 4.3-V equivalent reference , 200 ksamples/s, 9.6-kHz input tone 74 VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 75 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksamples/s, 300-Hz input tone 75 dB Conversion time Including sampling time 5 µs Current consumption Internal 4.3-V equivalent reference (2) 0.66 mA Current consumption VDDS as reference 0.75 mA Using IEEE Std 1241™ 2010 for terminology and test methods. Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V. Applied voltage must be within the absolute maximum ratings (see Section 5.1) at all times. No missing codes. Positive DNL typically varies from 0.3 to 1.7, depending on the device (see Figure 5-7). For a typical example, see Figure 5-6. Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 ADC Characteristics (continued) Tc = 25°C, VDDS = 3.0 V, DC-DC disabled. Input voltage scaling enabled, unless otherwise noted.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (2) Reference voltage Equivalent fixed internal reference(voltage scaling enabled) For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1. Reference voltage Fixed internal reference (input voltage scaling disabled). (2) For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3 V) as follows: Vref = 4.3 V × 1408 / 4095 Reference voltage 4.3 V 1.48 V VDDS as reference (Also known as RELATIVE) (input voltage scaling enabled) VDDS V Reference voltage VDDS as reference (Also known as RELATIVE) (input voltage scaling disabled) VDDS / 2.82 V Input Impedance 200 ksamples/s, voltage scaling enabled. Capacitive input, input impedance depends on sampling frequency and sampling time >1 MΩ 5.14 Temperature Sensor Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Resolution TYP MAX 4 Range –40 UNIT °C 85 °C Accuracy ±5 °C Supply voltage coefficient (1) 3.2 °C/V (1) Automatically compensated when using supplied driver libraries. 5.15 Battery Monitor Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Resolution TYP MAX 50 Range 1.8 Accuracy UNIT mV 3.8 13 V mV 5.16 Continuous Time Comparator Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS Input voltage range 0 DCOUPL as reference Offset Hysteresis Decision time Step from –10 mV to 10 mV Current consumption when enabled (1) (1) TYP 0 External reference voltage Internal reference voltage MIN MAX UNIT VDDS V VDDS V 1.27 V 3 mV <2 mV 0.72 µs 8.6 µA Additionally, the bias module must be enabled when running in standby mode. Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 23 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 5.17 Low-Power Clocked Comparator Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Input voltage range TYP 0 MAX UNIT VDDS Clock frequency V 32.8 kHz Internal reference voltage, VDDS / 2 1.49 to 1.51 V Internal reference voltage, VDDS / 3 1.01 to 1.03 V Internal reference voltage, VDDS / 4 0.78 to 0.79 V Internal reference voltage, DCOUPL / 1 1.25 to 1.28 V Internal reference voltage, DCOUPL / 2 0.63 to 0.65 V Internal reference voltage, DCOUPL / 3 0.42 to 0.44 V Internal reference voltage, DCOUPL / 4 0.33 to 0.34 Offset V <2 Hysteresis Decision time Step from –50 mV to 50 mV Current consumption when enabled mV <5 mV 1 clock-cycle 362 nA 5.18 Programmable Current Source Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Current source programmable output range Resolution Current consumption (1) (1) TYP MAX UNIT 0.25 to 20 µA 0.25 µA 23 µA Including current source at maximum programmable output Additionally, the bias module must be enabled when running in standby mode. 5.19 DC Characteristics PARAMETER TEST CONDITIONS MIN TYP 1.32 1.54 MAX UNIT TA = 25°C, VDDS = 1.8 V GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only GPIO VOH at 4-mA load IOCURR = 1 GPIO VOL at 4-mA load IOCURR = 1 0.21 GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 71.7 µA GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 21.1 µA GPIO high/low input transition, no hysteresis IH = 0, transition between reading 0 and reading 1 0.88 V GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.07 V GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 0.74 V GPIO input hysteresis IH = 1, difference between 0 → 1 and 1 → 0 voltage transition points 0.33 V GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 2.68 V GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.33 V GPIO VOH at 4-mA load IOCURR = 1 2.72 V GPIO VOL at 4-mA load IOCURR = 1 0.28 V 0.26 1.32 V 0.32 1.58 V V 0.32 V TA = 25°C, VDDS = 3.0 V 24 Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 DC Characteristics (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C, VDDS = 3.8 V GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 277 µA GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 113 µA GPIO high/low input transition, no hysteresis IH = 0, transition between reading 0 and reading 1 1.67 V GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.94 V GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 1.54 V GPIO input hysteresis IH = 1, difference between 0 → 1 and 1 → 0 voltage transition points 0.4 V VIH Lowest GPIO input voltage reliably interpreted as a High VIL Highest GPIO input voltage reliably interpreted as a Low (1) 0.8 VDDS (1) VDDS (1) 0.2 Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in Section 8.3 for more details. 5.20 Thermal Characteristics CC1350 RSM (VQFN) RHB (VQFN) RGZ (VQFN) 32 PINS 32 PINS 48 PINS 36.9 32.8 29.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 30.3 24.0 15.7 °C/W RθJB Junction-to-board thermal resistance 7.6 6.8 6.2 °C/W ψJT Junction-to-top characterization parameter 0.4 0.3 0.3 °C/W ψJB Junction-to-board characterization parameter 7.4 6.8 6.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 2.1 1.9 1.9 °C/W THERMAL METRIC (1) RθJA (1) (2) Junction-to-ambient thermal resistance UNIT (2) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics. °C/W = degrees Celsius per watt. 5.21 Timing and Switching Characteristics 5.21.1 Reset Timing MIN RESET_N low duration TYP MAX UNIT 1 µs 5.21.2 Switching Characteristics: Wakeup and Timing Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. The times listed here do not include RTOS overhead. PARAMETER TEST CONDITIONS MCU, Idle → Active MCU, Standby → Active MCU, Shutdown → Active MIN TYP MAX UNIT 14 µs 174 µs 1097 µs Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 25 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 5.21.3 Clock Specifications 5.21.3.1 24-MHz Crystal Oscillator (XOSC_HF) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. (1) MIN TYP Crystal frequency 24 ESR equivalent series resistance 20 LM motional inductance, relates to the load capacitance that is used for the crystal (CL in Farads) CL crystal load capacitance UNIT MHz 60 < 1.6 × 10–24 / CL 2 5 Ω H 9 Start-up time (2) (1) (2) MAX 150 pF µs Probing or otherwise stopping the crystal while the DC-DC converter is enabled may cause permanent damage to the device. The crystal start-up time is low because it is kick-started by using the RCOSC_HF oscillator (temperature and aging compensated) that is running at the same frequency. 5.21.3.2 32.768-kHz Crystal Oscillator (XOSC_LF) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. (1) MIN Crystal frequency ESR equivalent series resistance 30 Crystal load capacitance (CL) (1) TYP MAX 32.768 6 UNIT kHz 100 kΩ 12 pF Probing or otherwise stopping the crystal while the DC-DC converter is enabled may cause permanent damage to the device. 5.21.3.3 48-MHz RC Oscillator (RCOSC_HF) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. MIN Frequency TYP 48 Uncalibrated frequency accuracy ±1% Calibrated frequency accuracy (1) ±0.25% Startup time (1) MAX UNIT MHz 5 µs Accuracy relative to the calibration source (XOSC_HF) 5.21.3.4 32-kHz RC Oscillator (RCOSC_LF) Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. MIN Calibrated frequency (1) 32.768 Temperature coefficient (1) 26 TYP 50 MAX UNIT kHz ppm/°C The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC Oscillator. The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF relative to XOSC_HF and compensating the RTC tick speed. Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 5.21.4 Flash Memory Characteristics Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN Supported flash erase cycles before failure TYP MAX 100 Flash page or sector erase current Average delta current UNIT k Cycles 12.6 mA Flash page or sector erase time (1) 8 ms Flash page or sector size 4 KB 8.15 mA 8 µs Flash write current Average delta current, 4 bytes at a time Flash write time (1) 4 bytes at a time (1) This number is dependent on flash aging and increases over time and erase cycles. 5.21.5 Synchronous Serial Interface (SSI) Characteristics Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER NO. S1 S2 (1) S3 (1) (1) PARAMETER MIN TYP tclk_per SSIClk cycle time 12 tclk_high SSIClk high time 0.5 × tclk_per tclk_low SSIClk low time 0.5 × tclk_per MAX UNIT 65024 system clocks See the SSI timing diagrams, Figure 5-1, Figure 5-2, and Figure 5-3. S1 S2 SSIClk S3 SSIFss SSITx SSIRx MSB LSB 4 to 16 bits Figure 5-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 27 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 S2 www.ti.com S1 SSIClk S3 SSIFss SSITx MSB LSB 8-bit control SSIRx 0 MSB LSB 4 to 16 bits output data Figure 5-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer S1 S2 SSIClk (SPO = 0) S3 SSIClk (SPO = 1) SSITx (Master) MSB SSIRx (Slave) MSB LSB LSB SSIFss Figure 5-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1 28 Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 5.22 Typical Characteristics 7 5 6 4.5 Current Consumption (PA) Current Consumption (mA) Active Mode Current 4 3.5 3 2.5 2.3 2.8 VDDS (V) 3.3 3 2 0 -40 3.8 -20 0 20 40 60 Temperature (qC) D007 Figure 5-4. Active Mode (MCU) Current Consumption vs Supply Voltage (VDDS) 80 100 110 D037 Figure 5-5. Standby MCU Current Consumption, 32-kHz Clock, RAM and MCU Retention 2 1.5 Differential Nonlinearity (LSB) Integral Nonlinearity (LSB) 4 1 2 1.8 1 0 -1 -2 1 0.5 0 -0.5 -1 0 500 1000 1500 2000 2500 3000 Digital Output Code 3500 4000 0 1006.2 1007 1006 1006.5 1005.8 1006 ADC Code 1007.5 1005.6 1005.4 1005 1004 3.3 3.8 1003.5 -40 D012 Figure 5-8. SoC ADC Output vs Supply Voltage (Fixed Input, Internal Reference, No Scaling) 3500 4000 D008 1005 1004.5 2.8 VDDS (V) 1500 2000 2500 3000 Digital Output Code 1005.5 1005.2 2.3 1000 Figure 5-7. SoC ADC, Differential Nonlinearity vs Digital Output Code 1006.4 1004.8 1.8 500 D007 Figure 5-6. SoC ADC, Integral Nonlinearity vs Digital Output Code ADC Code 5 -20 0 20 40 60 Termperature (qC) 80 100 D036 Figure 5-9. SoC ADC Output vs Temperature (Fixed Input, Internal Reference, No Scaling) Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 29 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com Figure 5-10. RX, (50-kbps) Packet Error Rate (PER) vs Input RF Level vs Frequency Offset, 868 MHz 5.23 Typical Characteristics – Sub-1 GHz -100 -100 -102 -102 Sensitivity (dBm) Sensitivity (dBm) Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. -104 -106 -108 865 867 869 871 Frequency (MHz) 873 875 876 -108 -112 903 908 D001 Figure 5-11. RX (50 kbps) Sensitivity vs Frequency 863 MHz to 876 MHz 30 -106 -110 -110 -112 863 -104 913 918 Frequency (MHz) 923 928 D002 Figure 5-12. RX (50 kbps) Sensitivity vs Frequency 902 MHz to 928 MHz Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. -104 -106 -107 Sensitivity (dBm) Sensitivity (dBm) -106 -108 -108 -109 -110 -110 -111 -112 -40 -20 0 20 40 60 Temperature (qC) 80 -107.5 -107.5 -108 -108 Sensitivity (dBm) -107 -108.5 -109 -109.5 -110.5 2.6 2.8 3 Voltage (V) 3.2 3.4 3.6 8 7.5 7.5 7 7 6.5 6 5.5 4.5 80 100 110 4 -40 D007 Figure 5-17. RX (50 kbps) Current vs Temperature at 868 MHz 2.6 2.8 3 Voltage (V) 3.2 3.4 3.6 3.8 D006 5.5 4.5 20 40 60 Temperature (qC) 2.4 6 5 0 2.2 6.5 5 -20 D004 Figure 5-16. RX (50 kbps) Sensitivity vs Voltage 915 MHz 8 4 -40 2 D005 Current (mA) Current (mA) -111 1.8 3.8 Figure 5-15. RX (50 kbps) Sensitivity vs Voltage 868 MHz 100 110 -109.5 -110.5 2.4 80 -109 -110 2.2 20 40 60 Temperature (qC) -108.5 -110 2 0 Figure 5-14. RX (50 kbps) Sensitivity vs Temperature 915 MHz -107 -111 1.8 -20 D003 Figure 5-13. RX (50 kbps) Sensitivity vs Temperature 868 MHz Sensitivity (dBm) -112 -40 100 110 -20 0 20 40 60 Temperature (qC) 80 100 110 D008 Figure 5-18. RX (50 kbps) Current vs Temperature at 915 MHz Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 31 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 12 12 11 11 10 10 Current (mA) Current (mA) Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. 9 8 7 5 5 2 2.2 2.4 2.6 2.8 3 Voltage (V) 3.2 3.4 3.6 4 1.8 3.8 80 70 70 60 60 50 50 40 30 20 0 6 8 -10 -10 10 -8 -6 D011 Figure 5-21. RX (50 kbps) Selectivity With Wanted Signal at 868 MHz, 3 dB Above Sensitivity Limit 70 70 60 60 50 50 Selectivity (dB) 80 30 20 10 3.4 3.6 3.8 D010 -4 -2 0 2 4 Frequency Offset (MHz) 6 8 10 D012 Figure 5-22. RX (50 kbps) Selectivity With Wanted Signal at 915 MHz, 3 dB Above Sensitivity Limit 80 40 3.2 20 0 -4 -2 0 2 4 Frequency Offset (MHz) 2.6 2.8 3 Voltage (V) 30 10 -6 2.4 40 10 -8 2.2 Figure 5-20. RX (50 kbps) Current vs Voltage at 915 MHz 80 -10 -10 2 D009 Selectivity (dB) Selectivity (dB) 7 6 Figure 5-19. RX (50 kbps) Current vs Voltage at 868 MHz Selectivity (dB) 8 6 4 1.8 40 30 20 10 0 0 -10 -10 -10 -10 -8 -6 -4 -2 0 2 4 Frequency Offset (MHz) 6 8 10 -8 D013 Figure 5-23. RX (50 kbps) Selectivity With Wanted Signal at 868 MHz, –96 dBm 32 9 -6 -4 -2 0 2 4 Frequency Offset (MHz) 6 8 10 D014 Figure 5-24. RX (50 kbps) Selectivity With Wanted Signal at 915 MHz, –96 dBm Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 15 15 14.5 14.5 Output Power (dBm) Output Power (dBm) Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. 14 13.5 13 12.5 12 863 865 867 869 871 Frequency (MHz) 873 13 12 903 875 876 15 14.5 14.5 14 13.5 13 12.5 923 928 D016 14 13.5 13 12.5 -20 0 20 40 60 Temperature (qC) 80 12 -40 100 -20 0 D017 Figure 5-27. TX Maximum Output Power vs Temperature, 868 MHz 15 14.5 14.5 14 13.5 13.5 Current (mA) 14 13 12.5 12 11.5 20 40 60 Temperature (qC) 80 100 D018 Figure 5-28. TX Maximum Output Power vs Temperature, 915 MHz 15 13 12.5 12 11.5 11 11 10.5 10.5 10 2.1 913 918 Frequency (MHz) Figure 5-26. TX Maximum Output Power, 902 MHz to 928 MHz 15 12 -40 908 D015 Output Power (dBm) Output Power (dBm) 13.5 12.5 Figure 5-25. TX Maximum Output Power, 863 MHz to 876 MHz Current (mA) 14 2.3 2.5 2.7 2.9 3.1 Voltage (V) 3.3 3.5 10 2.1 3.7 2.3 D019 Figure 5-29. TX Maximum Output Power vs VDDS, 868 MHz 2.5 2.7 2.9 3.1 Voltage (V) 3.3 3.5 3.7 D020 Figure 5-30. TX Maximum Output Power vs VDDS, 915 MHz Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 33 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 26 26 25.5 25.5 25 25 Current (mA) Current (mA) Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. 24.5 24 23.5 23 863 865 867 869 871 Frequency (MHz) 873 23 903 875 876 26.5 26.5 26 26 25.5 25.5 Current (mA) Current (mA) 27 25 24.5 24 923 928 D022 25 24.5 24 23.5 23 23 22.5 22.5 -20 0 20 40 60 Temperature (qC) 80 22 -40 100 110 38 38 36 36 34 34 Current (mA) 40 32 30 28 24 3.3 3.5 22 2.1 3.7 2.3 D025 Figure 5-35. TX Current With Maximum Output Power vs Voltage, 868 MHz 100 110 D024 28 24 2.9 3.1 Voltage (V) 80 30 26 2.7 20 40 60 Temperature (qC) 32 26 2.5 0 Figure 5-34. TX Current With Maximum Output Power vs Temperature, 915 MHz 40 2.3 -20 D023 Figure 5-33. TX Current With Maximum Output Power vs Temperature, 868 MHz 22 2.1 913 918 Frequency (MHz) Figure 5-32. TX Current With Maximum Output Power, 902 MHz to 928 MHz 27 22 -40 908 D021 23.5 Current (mA) 24 23.5 Figure 5-31. TX Current With Maximum Output Power, 863 MHz to 876 MHz 34 24.5 2.5 2.7 2.9 3.1 Voltage (V) 3.3 3.5 3.7 D026 Figure 5-36. TX Current With Maximum Output Power vs Voltage, 915 MHz Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 5.24 Typical Characteristics – 2.4 GHz -80 -80 -81 -81 -82 -82 -83 -83 Current (mA) Sensitivity (dBm) Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. -84 -85 -86 -84 -85 -86 -87 -87 -88 -88 -89 -89 -90 2400 -90 -40 2410 2420 2430 2440 2450 Frequency (MHz) 2460 2470 2480 -20 0 D027 Figure 5-37. RX Bluetooth low energy Sensitivity vs Frequency 2402 MHz to 2480 MHz 20 40 60 Temperature (qC) 80 100 110 D028 Figure 5-38. RX Bluetooth low energy Sensitivity vs Temperature 2440 MHz -80 8 -81 7.5 -83 Current (mA) Sensitivity (dBm) -82 -84 -85 -86 -87 -88 7 6.5 6 5.5 -89 -90 1.8 2 2.2 2.4 2.6 2.8 3 Voltage (V) 3.2 3.4 3.6 5 -40 3.8 Figure 5-39. RX Bluetooth low energy Sensitivity vs Voltage, 2440 MHz 70 13 60 12 20 40 60 Temperature (qC) 80 100 110 D030 50 11 Selectivity (dB) Current (mA) 0 Figure 5-40. RX Bluetooth low energy Current vs Temperature at 2440 MHz 14 10 9 8 40 30 20 10 7 0 6 5 1.8 -20 D029 2 2.2 2.4 2.6 2.8 3 Voltage (V) 3.2 3.4 3.6 3.8 -10 -40 -30 D031 Figure 5-41. RX Bluetooth low energy Current vs Voltage at 2440 MHz -20 -10 0 10 20 Frequency Offset (MHz) 30 40 45 D032 Figure 5-42. RX Bluetooth low energy Selectivity vs Frequency Offset Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 35 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the internal DC-DC converter enabled. 10 10 9.5 Output Power (dBm) Output Power (dBm) 9.5 9 8.5 8 7.5 7 2400 9 8.5 8 7.5 7 6.5 2410 2420 2430 2440 2450 Frequency (MHz) 2460 2470 6 -40 2480 -20 0 20 40 60 Temperature (qC) D033 Figure 5-43. TX Bluetooth low energy Maximum Output Power, 2402 MHz to 2480 MHz 80 100 110 D034 Figure 5-44. TX Bluetooth low energy Maximum Output Power vs Temperature, 2440 MHz 10 Output Power (dBm) 9.5 9 8.5 8 7.5 7 2.1 2.3 2.5 2.7 2.9 3.1 Voltage (V) 3.3 3.5 3.7 D035 Figure 5-45. TX Bluetooth low energy Maximum Output Power vs VDDS, 2440 MHz 36 Specifications Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 6 Detailed Description 6.1 Overview Section 1.4 shows a block diagram of the core modules of the CC13xx product family. 6.2 Main CPU The CC1350 SimpleLink Wireless MCU contains an ARM Cortex-M3 (CM3) 32-bit CPU, which runs the application and the higher layers of the protocol stack. The CM3 processor provides a high-performance, low-cost platform that meets the system requirements of minimal memory implementation and low-power consumption, while delivering outstanding computational performance and exceptional system response to interrupts. The CM3 features include the following: • 32-bit ARM Cortex-M3 architecture optimized for small-footprint embedded applications • Outstanding processing performance combined with fast interrupt handling • ARM Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit ARM core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few kilobytes of memory for microcontroller-class applications: – Single-cycle multiply instruction and hardware divide – Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral control – Unaligned data access, enabling data to be efficiently packed into memory • Fast code execution permits slower processor clock or increases sleep mode time • Harvard architecture characterized by separate buses for instruction and data • Efficient processor core, system, and memories • Hardware division and fast digital-signal-processing oriented multiply accumulate • Saturating arithmetic for signal processing • Deterministic, high-performance interrupt handling for time-critical applications • Enhanced system debug with extensive breakpoint and trace capabilities • Serial wire trace reduces the number of pins required for debugging and tracing • Migration from the ARM7™ processor family for better performance and power efficiency • Optimized for single-cycle flash memory use • Ultra-low power consumption with integrated sleep modes • 1.25 DMIPS per MHz Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 37 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 6.3 www.ti.com RF Core The RF core is a highly flexible and capable radio system that interfaces the analog RF and baseband circuits, handles data to and from the system side, and assembles the information bits in a given packet structure. The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading the main CPU and leaving more resources for the user application. The RF core offers a high-level, command-based API to the main CPU. The RF core supports a wide range of modulation formats, frequency bands, and accelerator features, which include the following (not all of the features have been characterized yet, see the CC1350 SimpleLink Wireless MCU Silicon Errata for more information): • Wide range of data rates: – From 625 bps (offering long range and high robustness) to as high as 4 Mbps • Wide range of modulation formats: – Multilevel (G) FSK and MSK – On-Off Keying (OOK) with optimized shaping to minimize adjacent channel leakage – Coding-gain support for long range • Dedicated packet handling accelerators: – Forward error correction – Data whitening – 802.15.4g mode-switch support – Automatic CRC • Automatic listen-before-talk (LBT) and clear channel assist (CCA) • Digital RSSI • Highly configurable channel filtering, supporting channel spacing schemes from 40 kHz to 4 MHz • High degree of flexibility, offering a future-proof solution The RF core interfaces a highly flexible radio, with a high-performance synthesizer that can support a wide range of frequency bands. 38 Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 6.4 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Sensor Controller The Sensor Controller contains circuitry that can be selectively enabled in standby mode. The peripherals in this domain may be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This CPU can read and monitor sensors or perform other tasks autonomously; thereby significantly reducing power consumption and offloading the main CM3 CPU. A PC-based development tool called Sensor Controller Studio is used to write, test, and debug code for the Sensor Controller. The tool produces C driver source code, which the System CPU application uses to control and exchange data with the Sensor Controller. Typical use cases may be (but are not limited to) the following: • Analog sensors using integrated ADC • Digital sensors using GPIOs with bit-banged I2C or SPI • Capacitive sensing • Waveform generation • Pulse counting • Key scan • Quadrature decoder for polling rotational sensors The peripherals in the Sensor Controller include the following: • The low-power clocked comparator can be used to wake the device from any state in which the comparator is active. A configurable internal reference can be used with the comparator. The output of the comparator can also be used to trigger an interrupt or the ADC. • Capacitive sensing functionality is implemented through the use of a constant current source, a timeto-digital converter, and a comparator. The continuous time comparator in this block can also be used as a higher-accuracy alternative to the low-power clocked comparator. The Sensor Controller takes care of baseline tracking, hysteresis, filtering, and other related functions. • The ADC is a 12-bit, 200-ksamples/s ADC with 8 inputs and a built-in voltage reference. The ADC can be triggered by many different sources, including timers, I/O pins, software, the analog comparator, and the RTC. • The analog modules can be connected to up to eight different GPIOs (see Table 6-1). The peripherals in the Sensor Controller can also be controlled from the main application processor. Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 39 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com Table 6-1. GPIOs Connected to the Sensor Controller (1) CC13x0 ANALOG CAPABLE 7 × 7 RGZ DIO NUMBER 5 × 5 RHB DIO NUMBER Y 30 14 Y 29 13 Y 28 12 Y 27 11 9 Y 26 9 8 Y 25 10 7 Y 24 8 6 Y 23 7 5 N 7 4 2 N 6 3 1 N 5 2 0 N 4 1 N 3 0 N 2 N 1 N 0 (1) 6.5 4 × 4 RSM DIO NUMBER Depending on the package size, up to 15 pins can be connected to the Sensor Controller. Up to eight of these pins can be connected to analog modules. Memory The flash memory provides nonvolatile storage for code and data. The flash memory is in-system programmable. The SRAM (static RAM) is split into two 4-KB blocks and two 6-KB blocks and can be used to store data and execute code. Retention of the RAM contents in standby mode can be enabled or disabled individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB cache can be used as general-purpose RAM. The ROM provides preprogrammed, embedded TI-RTOS kernel and Driverlib. The ROM also contains a bootloader that can be used to reprogram the device using SPI or UART. 6.6 Debug The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface. 40 Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 6.7 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Power Management To minimize power consumption, the CC1350 device supports a number of power modes and powermanagement features (see Table 6-2). Table 6-2. Power Modes SOFTWARE-CONFIGURABLE POWER MODES ACTIVE IDLE STANDBY SHUTDOWN RESET PIN HELD CPU Active Off Off Off Off Flash On Available Off Off Off SRAM On On On Off Off Radio Available Available Off Off Off MODE Supply System Current On On Duty Cycled Off Off 1.2 mA + 25.5 µA/MHz 570 µA 0.6 µA 185 nA 0.1 µA – 14 µs 174 µs 1015 µs 1015 µs Full Full Partial No No Wake-up Time to CPU Active (1) Register Retention SRAM Retention Full Full Full No No High-Speed Clock XOSC_HF or RCOSC_HF XOSC_HF or RCOSC_HF Off Off Off Low-Speed Clock XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF Off Off Peripherals Available Available Off Off Off Sensor Controller Available Available Available Off Off Wake-up on RTC Available Available Available Off Off Wake-up on Pin Edge Available Available Available Available Off Wake-up on Reset Pin Available Available Available Available Available Brown Out Detector (BOD) Active Active Duty Cycled Off N/A Power On Reset (POR) Active Active Active Active N/A (1) Not including RTOS overhead In active mode, the application CM3 CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 6-2). In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event returns the processor to active mode. In standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or Sensor Controller event is required to return the device to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode. In shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller), and the I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between reset in this way and reset-by-reset pin or POR by reading the reset status register. The only state retained in this mode is the latched I/O state and the flash memory contents. The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independent of the main CPU. This means that the main CPU does not have to wake up, for example to execute an ADC sample or poll a digital sensor over SPI, thus saving both current and wakeup time that would otherwise be wasted. The Sensor Controller Studio lets the user configure the Sensor Controller and choose which peripherals are controlled and which conditions wake up the main CPU. Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 41 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 6.8 www.ti.com Clock Systems The CC1350 device supports two external and two internal clock sources. A 24-MHz external crystal is required as the frequency reference for the radio. This signal is doubled internally to create a 48-MHz clock. The 32.768-kHz crystal is optional. The low-speed crystal oscillator is designed for use with a 32.768-kHz watch-type crystal. The internal high-speed RC oscillator (48-MHz) can be used as a clock source for the CPU subsystem. The internal low-speed RC oscillator (32-kHz) can be used as a reference if the low-power crystal oscillator is not used. The 32-kHz clock source can be used as external clocking reference through GPIO. 6.9 General Peripherals and Modules The I/O controller controls the digital I/O pins and contains multiplexer circuitry to assign a set of peripherals to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge (configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 4. The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz. The UART implements a universal asynchronous receiver and transmitter function. The UART supports flexible baud-rate generation up to a maximum of 3 Mbps. Timer 0 is a general-purpose timer module (GPTM) that provides two 16-bit timers. The GPTM can be configured to operate as a single 32-bit timer, dual 16-bit timers, or as a PWM module. Timer 1, Timer 2, and Timer 3 are also GPTMs; each timer is functionally equivalent to Timer 0. In addition to these four timers, a separate timer in the RF core handles timing for RF protocols; the RF timer can be synchronized to the RTC. The I2S interface is used to handle digital audio (for more information, see the CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual). The I2C interface is used to communicate with devices compatible with the I2C standard. The I2C interface can handle 100-kHz and 400-kHz operation, and can serve as both I2C master and I2C slave. The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit. The watchdog timer is used to regain control if the system fails due to a software error after an external device fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a predefined time-out value is reached. 42 Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload data-transfer tasks from the CM3 CPU, thus allowing for more efficient use of the processor and the available bus bandwidth. The µDMA controller can perform transfer between memory and peripherals. The µDMA controller has dedicated channels for each supported on-chip module and can be programmed to automatically perform transfers between peripherals and memory when the peripheral is ready to transfer more data. Some features of the µDMA controller follow (this is not an exhaustive list): • Highly flexible and configurable channel operation of up to 32 channels • Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-toperipheral • Data sizes of 8, 16, and 32 bits The AON domain contains circuitry that is always enabled, except when in shutdown mode (where the digital supply is off). This circuitry includes the following: • The RTC can be used to wake the device from any state where it is active. The RTC contains three compare registers and one capture register. With software support, the RTC can be used for clock and calendar operation. The RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be compensated to tick at the correct frequency even when the internal 32-kHz RC oscillator is used instead of a crystal. • The battery monitor and temperature sensor are accessible by software and provide a battery status indication as well as a coarse temperature measure. 6.10 Voltage Supply Domains The CC1350 device can interface to two or three different voltage domains depending on the package type. On-chip level converters ensure correct operation as long as the signal voltage on each input/output pin is set with respect to the corresponding supply pin (VDDS, VDDS2, or VDDS3). Table 6-3 lists the pinto-VDDS mapping. Table 6-3. Pin Function to VDDS Mapping Table Package VQFN 7 × 7 (RGZ) VQFN 5 × 5 (RHB) VQFN 4 × 4 (RSM) VDDS (1) DIO 23–30 Reset_N DIO 7–14 Reset_N DIO 5–9 Reset_N VDDS2 DIO 1–11 DIO 0–6 JTAG_TCKC JTAG_TMSC DIO 0–4 JTAG_TCKC JTAG_TMSC VDDS3 DIO 12–22 JTAG_TCKC JTAG_TMSC NA NA (1) The VDDS_DCDC pin must always be connected to the same voltage as the VDDS pin. 6.11 System Architecture Depending on the product configuration, the CC1350 device can function as a wireless network processor (WNP – a device running the wireless protocol stack, with the application running on a separate host MCU), or as a system-on-chip (SoC) with the application and protocol stack running on the ARM CM3 core inside the device. In the first case, the external host MCU communicates with the device using SPI or UART. In the second case, the application must be written according to the application framework supplied with the wireless protocol stack. Detailed Description Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 43 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com 7 Application, Implementation, and Layout NOTE Information in the following Applications section is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. Few external components are required for the operation of the CC1350 device. Figure 7-1 shows a typical application circuit. The board layout greatly influences the RF performance of the CC1350 device. On the Texas Instruments CC1350_7XD-Dual Band reference design, the optimal differential impedance seen from the RF pins into the balun and filter and antenna is 44 + j15. To VDDR pins Sub-1 GHz Antenna (50 Ohm) Sub-1 GHz Match Optional inductor. Only needed for DCDC operation RF_SW_CTL RF_SW_VDDS CC 1350 DCDC_SW Pin 2 (RF N) VDDS_DCDC Pin 1 (RF P) RF Switch Pin 3/4 (RXTX) input decoupling 24MHz XTAL (Load caps on chip) 2.4 GHz Antenna (50 Ohm) 2.4 GHz Match Copyright © 2016, Texas Instruments Incorporated Figure 7-1 does not show decoupling capacitors for power pins. For a complete reference design, see the product folder on www.ti.com. Figure 7-1. Differential Reference Design 7.1 SimplelinkTM CC1350 LaunchPad™ Bluetooth® and Sub-1 GHz Long Range Wireless Development Kit The CC1350 LaunchPad combines a Bluetooth® Smart® with a Sub-1 GHz radio for the ultimate combination of easy mobile phone integration with long range connectivity including a 32-bit ARM® Cortex®-M3 processor on a single chip. The CC1350 device is a wireless MCU targeting low power, long range wireless applications. The CC1350 device contains a 32-bit ARM® Cortex®-M3 processor that runs at 48 MHz as the main processor and a rich peripheral feature set that includes a unique ultra-low power sensor controller. This sensor controller is ideal for interfacing external sensors and for collecting analog and digital data autonomously while the rest of the system is in sleep mode. 44 Application, Implementation, and Layout Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 8 Device and Documentation Support TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed in the following. 8.1 Device Nomenclature To designate the stages in the product development cycle, TI assigns prefixes to all part numbers and/or date-code. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example, CC1350 is in production; therefore, no prefix/identification is assigned). Device development evolutionary flow: X Experimental device that is not necessarily representative of the final device's electrical specifications and may not use production assembly flow. P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications. null Production version of the silicon die that is fully qualified. Production devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies. Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used. TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, RGZ). For orderable part numbers of CC1350 devices in the RSM (4-mm × 4-mm), RHB (5-mm × 5-mm), or RGZ (7-mm × 7-mm) package types, see the Package Option Addendum of this document, the TI website (www.ti.com), or contact your TI sales representative. CC1350 F128 XXX (R/T) PREFIX X = Experimental device Blank = Qualified device DEVICE SimpleLink™ Ultra-Low-Power Dual-Band Wireless MCU FLASH SIZE 128KB R = Large Reel T = Small Reel PACKAGE RGZ = 48-pin VQFN (Very Thin Quad Flatpack No-Lead) RHB = 32-pin VQFN RSM = 32-pin VQFN Figure 8-1. Device Nomenclature Device and Documentation Support Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 45 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 8.2 www.ti.com Tools and Software Development Kit: Simplelink™ CC1350 LaunchPad™ Bluetooth® and Sub-1 GHz Long Range Wireless Development Kit The CC1350 LaunchPad™ development kit combines a Bluetooth Smart radio with a Sub-1 GHz radio for the ultimate combination of easy mobile phone integration with long-range connectivity including a 32-bit ARM Cortex-M3 processor on a single chip. The CC1350 device is a wireless MCU targeting low power, long-range wireless applications. The CC1350 device contains a 32-bit ARM Cortex-M3 processor that runs at 48 MHz as the main processor and a rich peripheral feature set that includes a unique ultra-low-power sensor controller. This sensor controller is great for interfacing external sensors and for collecting analog and digital data autonomously while the rest of the system is in sleep mode. Software Tools: SmartRF™ Studio 7 SPACER SmartRF Studio is a PC application that helps designers of radio systems to easily evaluate the RF-IC at an early stage in the design process. • Test functions for transmitting and receiving radio packets, continuous wave transmit and receive • Evaluate RF performance on custom boards by wiring it to a supported evaluation board or debugger • Can also be used without any hardware, but then only to generate, edit and export radio configuration settings • Can be used in combination with several development kits for Texas Instruments’ CC1350 RF-ICs Sensor Controller Studio SPACER Sensor Controller Studio provides a development environment for the CC1350 Sensor Controller. The Sensor Controller is a proprietary, power-optimized CPU inside the CC1350 , which can perform simple background tasks autonomously and independent of the System CPU state. • Allows for Sensor Controller task algorithms to be implemented using a C-like programming language • Outputs a Sensor Controller Interface driver, which incorporates the generated Sensor Controller machine code and associated definitions • Allows for rapid development by using the integrated Sensor Controller task testing and debugging functionality. This allows for live visualization of sensor data and algorithm verification. IDEs and Compilers: Code Composer Studio™ SPACER • An integrated development environment with project management tools and editor • Code Composer Studio (CCS) 6.1 and later has built-in support for the CC1350 device family • Best support for XDS debuggers; XDS100v3, XDS110 and XDS200 • High integration with TI-RTOS with support for TI-RTOS Object View IAR Embedded • • • • • Workbench® for ARM SPACER Integrated development environment with project management tools and editor IAR EWARM 7.30.3 and later has built-in support for the CC1350 device family Broad debugger support, supporting XDS100v3, XDS200, IAR I-Jet and Segger J-Link Integrated development environment with project management tools and editor RTOS plugin available for TI-RTOS For a complete listing of development-support tools for the CC1350 platform, visit the Texas Instruments website at www.ti.com. For information on pricing and availability, contact the nearest TI field sales office or authorized distributor. 46 Device and Documentation Support Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 8.3 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Documentation Support To receive notification of documentation updates, navigate to the device product folder on ti.com (CC1350). In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. The current documentation that describes the CC1350, related peripherals, and other technical collateral is listed in the following. Technical Reference Manual CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual SPACER Reference Guide CC26xx/CC13xx Power Management Software Developer's Reference Guide SPACER Application Reports Using GCC/GDB With SimpleLink™ CC26xx/CC13xx CC-Antenna-DK2 and Antenna Measurements Summary 8.4 Texas Instruments Low-Power RF Website TI's Low-Power RF website has all the latest products, application and design notes, FAQ section, news and events updates. Go to www.ti.com/longrange. 8.5 Low-Power RF eNewsletter The Low-Power RF eNewsletter is up-to-date on new products, news releases, developers’ news, and other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles include links to get more online information. Sign up at: www.ti.com/lprfnewsletter 8.6 Additional Information Texas Instruments offers a wide selection of cost-effective, low-power RF solutions for proprietary and standard-based wireless applications for use in industrial and consumer applications. The selection includes RF transceivers, RF transmitters, RF front ends, and Systems-on-Chips as well as various software solutions for the Sub-1 GHz and 2.4-GHz frequency bands. In addition, Texas Instruments provides a large selection of support collateral such as development tools, technical documentation, reference designs, application expertise, customer support, third-party and university programs. Other than providing technical support forums, videos, and blogs, the Low-Power RF E2E Online Community also presents the opportunity to interact with engineers from all over the world. With a broad selection of product solutions, end-application possibilities, and a range of technical support, Texas Instruments offers the broadest low-power RF portfolio. Device and Documentation Support Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 47 CC1350 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 8.7 www.ti.com Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community The TI engineer-ro-engineer (E2E) community was created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices. Low-Power RF Online Community Wireless Connectivity Section of the TI E2E Support Community • Forums, videos, and blogs • RF design help • E2E interaction Join here. Low-Power RF Developer Network Texas Instruments has launched an extensive network of low-power RF development partners to help customers speed up their application development. The network consists of recommended companies, RF consultants, and independent design houses that provide a series of hardware module products and design services, including: • RF circuit, low-power RF, and ZigBee® design services • Low-power RF and ZigBee module solutions and development tools • RF certification services and RF circuit manufacturing For help with modules, engineering services or development tools: Search the Low-Power RF Developer Network to find a suitable partner. www.ti.com/lprfnetwork 8.8 Trademarks SimpleLink, SmartRF, Code Composer Studio, Texas Instruments, LaunchPad, E2E are trademarks of Texas Instruments. ARM7 is a trademark of ARM Limited (or its subsidiaries). ARM, Cortex, Thumb are registered trademarks of ARM Limited (or its subsidiaries). Bluetooth is a registered trademark of Bluetooth SIG, Inc. ULPBench is a trademark of Embedded Microprocessor Benchmark Consortium. CoreMark is a registered trademark of Embedded Microprocessor Benchmark Consortium. IAR Embedded Workbench is a registered trademark of IAR Systems AB. IEEE Std 1241 is a trademark of Institute of Electrical and Electronics Engineers, Incorporated. IEEE is a registered trademark of Institute of Electrical and Electronics Engineers, Incorporated. Wi-SUN is a trademark of Wi-SUN Alliance, Inc. ZigBee is a registered trademark of Zigbee Alliance. All other trademarks are the property of their respective owners. 48 Device and Documentation Support Copyright © 2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1350 CC1350 www.ti.com 8.9 SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 8.10 Export Control Notice Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled product restricted by other applicable national regulations, received from disclosing party under nondisclosure obligations (if any), or any direct product of such technology, to any destination to which such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S. Department of Commerce and other competent Government authorities to the extent required by those laws. 8.11 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 9 Mechanical, Packaging, and Orderable Information 9.1 Packaging Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2016, Texas Instruments Incorporated Mechanical, Packaging, and Orderable Information Submit Documentation Feedback Product Folder Links: CC1350 49 PACKAGE OPTION ADDENDUM www.ti.com 29-Nov-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) CC1350F128RGZR ACTIVE VQFN RGZ 48 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1350 F128 CC1350F128RGZT ACTIVE VQFN RGZ 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1350 F128 CC1350F128RHBR PREVIEW VQFN RHB 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1350 F128 CC1350F128RHBT PREVIEW VQFN RHB 32 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 CC1350 F128 CC1350F128RSMR ACTIVE VQFN RSM 32 3000 Green (RoHS & no Sb/Br) CU NIPDAU | Call TI Level-3-260C-168 HR -40 to 85 CC1350 F128 CC1350F128RSMT ACTIVE VQFN RSM 32 250 Green (RoHS & no Sb/Br) CU NIPDAU | Call TI Level-3-260C-168 HR -40 to 85 CC1350 F128 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Nov-2016 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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