STMicroelectronics LD39050PU33R 500 ma low quiescent current and low noise voltage regulator Datasheet

LD39050
500 mA low quiescent current and low noise voltage regulator
Datasheet - production data
Description
')1 [PP
')1 [PP
Features
• Input voltage from 1.5 to 5.5 V
• Ultra low-dropout voltage (200 mV typ. at 500
mA load)
• Very low quiescent current (20 µA typ. at no
load, 100 µA typ. at 500 mA load, 1 µA max. in
OFF mode)
The LD39050 provides 500 mA maximum current
with an input voltage range from 1.5 V to 5.5 V
and a typical dropout voltage of 200 mV. Stability
is given by ceramic capacitors. The ultra low drop
voltage, low quiescent current and low noise
features make it suitable for low power batterypowered applications. Power supply rejection is
65 dB at low frequencies and starts to roll off at 10
kHz. The enable logic control function puts the
LD39050 in shutdown mode allowing a total
current consumption lower than 1 µA. The device
also includes short-circuit constant current limiting
and thermal protection. Typical applications are
mobile phones, hard disks and battery-powered
systems.
• Very low noise without bypass capacitor
• Output voltage tolerance: ± 2.0% @ 25 °C
• 500 mA guaranteed output current
• Wide range of output voltages available on
request: 0.8 V to 4.5 V with 100 mV step and
adjustable from 0.8 V
• Logic-controlled electronic shutdown
• Compatible with ceramic capacitor COUT = 1 µF
• Internal current and thermal limit
• Package DFN6 (3x3 mm) and DFN6 (2x2 mm)
• Temperature range: from -40 °C to 125 °C
October 2015
This is information on a product in full production.
DocID15470 Rev 3
1/28
www.st.com
Contents
LD39050
Contents
1
Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
6.1
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2
Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3
Power Good function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.1
DFN6 (3x3 mm) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.2
DFN6 (3x3 mm) packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.3
DFN6 (2x2 mm) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28
DocID15470 Rev 3
LD39050
1
Diagrams
Diagrams
Figure 1. Schematic diagram for the LD39050 (adjustable)
IN
PG
Power-good
signal
IN
BandGap
reference
Current
limit
OpAmp
OUT
Thermal
protection
ADJ
EN
Internal
enable
GND
Figure 2. Schematic diagram for the LD39050 (fixed output)
IN
PG
Power-good
signal
IN
BandGap
reference
Current
limit
OpAmp
OUT
Thermal
protection
R1
NC
EN
R2
Internal
enable
GND
DocID15470 Rev 3
3/28
28
Pin configuration
2
LD39050
Pin configuration
Figure 3. DFN6 (3x3 mm) pin connection (top view)
EN
VIN
EN
GND
NC
GND
VOUT
PG
PG
VIN
ADJ
VOUT
LD39050 (adjustable version)
LD39050 (fixed version)
Figure 4. DFN6 (2x2 mm) pin connection (top view)
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DocID15470 Rev 3
LD39050
Pin configuration
Table 1. Pin description
Pin n° for
Pin n° for
DFN6 (3x3 mm)
DFN6 (2x2 mm)
Symbol
Function
LD39050
LD39050
LD39050
LD39050
(adjustable)
(fixed)
(adjustable)
(fixed)
EN
1
1
2
2
Enable pin logic input: low = shutdown,
high = active
GND
2
2
3
3
Common ground
PG
3
3
4
4
Power Good
VOUT
4
4
5
5
Output voltage
ADJ
5
-
6
-
Adjustable pin
VIN
6
6
1
1
Input voltage of the LDO
N.C.
-
5
-
6
Not connected
GND
Exposed pad
Exposed pad
DocID15470 Rev 3
Exposed pad must be connected to GND
5/28
28
Maximum ratings
3
LD39050
Maximum ratings
Table 2. Absolute maximum ratings
Symbol
Value
Unit
-0.3 to 7
V
DC output voltage
-0.3 to VI + 0.3 (7 V max.)
V
EN
Enable pin
-0.3 to VI + 0.3 (7 V max.)
V
PG
Power Good pin
-0.3 to 7
V
ADJ
Adjustable pin
4
V
IOUT
Output current
Internally limited
Power dissipation
Internally limited
VIN
VOUT
PD
Parameter
DC input voltage
TSTG
Storage temperature range
- 65 to 150
°C
TOP
Operating junction temperature range
- 40 to 125
°C
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. All values are referred to GND.
Table 3. Thermal data
Symbol
Parameter
Value
Unit
DFN6 (2x2 mm)
DFN6 (3x3 mm)
RthJA
Thermal resistance junction-ambient
65
55
°C/W
RthJC
Thermal resistance junction-case
6.5
10
°C/W
Table 4. ESD performance
Symbol
ESD
6/28
Parameter
ESD protection voltage
DocID15470 Rev 3
Test conditions
Value
Unit
HBM
2
kV
CDM
500
V
MM
0.3
kV
LD39050
4
Electrical characteristics
Electrical characteristics
TJ = 25 °C, VIN = 1.8 V, CIN = COUT = 1 µF, IOUT = 10 mA, VEN = VIN, unless otherwise
specified.
Table 5. Electrical characteristics for the LD39050 (adjustable)
Symbol
VIN
Parameter
Operating input voltage
VADJ
VADJ accuracy
IADJ
Adjustable pin current
ΔVOUT
Static line regulation
ΔVOUT Transient line
regulation(1)
ΔVOUT Static load regulation
ΔVOUT Transient load regulation(1)
VDROP Dropout voltage(2)
eN
SVR
Test conditions
Output noise voltage
Supply voltage rejection
VOUT = 0.8 V
Min.
Typ.
1.5
5.5
V
784
800
816
IOUT = 10 mA, -40 °C < TJ < 125 °C
776
800
824
mV
1
VOUT +1 V ≤ VIN ≤ 5.5 V,
IOUT = 1 mA
0.01
ΔVIN = 500 mV, IOUT = 10 mA,
tR = 5 µs
10
ΔVIN = 500 mV, IOUT = 10 mA,
tF = 5 µs
10
IOUT = 10 mA to 500 mA
IOUT = 10 mA to 500 mA, tF = 5 µs
40
IO = 500 mA, VOUT fixed to 1.5 V
40 °C < TJ < 125 °C
200
10 Hz to 100 kHz, IOUT = 100 mA,
VOUT = 0.8 V
30
VIN = 1.8 V+/-VRIPPLE
VRIPPLE = 0.25 V,
frequency = 1 kHz
IOUT = 10 mA
65
VIN = 1.8 V+/-VRIPPLE
VRIPPLE = 0.25 V,
frequency =10 kHz
IOUT = 100 mA
62
IOUT = 0 mA
20
%/mA
mVpp
400
mV
µVRMS
dB
50
100
µA
IOUT = 0 to 500 mA,
-40 °C<TJ<125 °C
DocID15470 Rev 3
%/V
0.002
40
VIN input current in OFF mode:
VEN = GND(3)
µA
mVpp
IOUT = 10 mA to 500 mA, tR = 5 µs
IOUT = 0 to 500 mA
Quiescent current
Unit
IOUT = 10 mA, TJ = 25 °C
IOUT = 0 mA, -40 °C < TJ < 125 °C
IQ
Max.
200
0.001
1
7/28
28
Electrical characteristics
LD39050
Table 5. Electrical characteristics for the LD39050 (adjustable) (continued)
Symbol
Parameter
Test conditions
Min.
Rising edge
0.92*
VOUT
Falling edge
0.8*
VOUT
Power Good output threshold
PG
ISC
Power Good output voltage
low
Isink = 6 mA open drain output
Short-circuit current
RL= 0
Enable input logic low
VIN = 1.5 V to 5.5 V,
40 °C < TJ < 125 °C
Enable input logic high
VIN = 1.5 V to 5.5 V,
40 °C < TJ < 125 °C
Enable pin input current
VEN = VIN
VEN
IEN
tON
TSHDN
COUT
Turn-on time
Typ.
Max.
V
0.4
600
800
V
mA
0.4
0.9
V
V
0.1
(4)
Unit
100
30
Thermal shutdown
160
Hysteresis
20
nA
µs
°C
Output capacitor
Capacitance (see typical
performance characteristics for
stability)
1
22
µF
1. All transient values are guaranteed by design, not production tested
2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This
specification does not apply to output voltages below 1.5 V
3. PG pin floating
4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching
95% of its nominal value
8/28
DocID15470 Rev 3
LD39050
Electrical characteristics
TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 10 mA, VEN = VIN, unless
otherwise specified.
Table 6. Electrical characteristics for the LD39050 (fixed output)
Symbol
VIN
VOUT
ΔVOUT
ΔVOUT
Parameter
VOUT accuracy
Static line regulation
Transient line regulation (1)
Static load regulation
ΔVOUT
Transient load regulation (1)
VDROP
SVR
Max.
Unit
1.5
5.5
V
VOUT >1.5 V, IOUT = 10 mA,
TJ = 25 °C
-2.0
2.0
VOUT >1.5 V, IOUT = 10 mA,
-40 °C<TJ<125 °C
-3.0
Operating input voltage
ΔVOUT
eN
Test conditions
Min.
Typ.
%
3.0
VOUT ≤ 1.5 V, IOUT = 10 mA
± 20
VOUT ≤ 1.5 V, IOUT = 10 mA,
-40 °C<TJ<125 °C
± 30
VOUT +1 V ≤ VIN ≤ 5.5 V,
IOUT = 1 mA
0.01
ΔVIN = 500 mV, IOUT = 10 mA,
tR = 5 µs
10
ΔVIN = 500 mV, IOUT = 10 mA,
tF = 5 µs
10
IOUT = 10 mA to 500 mA
0.002
40
IOUT = 10 mA to 500 mA, tF = 5 µs
40
Dropout voltage (2)
IOUT = 500 mA, VOUT > 1.5 V
-40 °C < TJ < 125 °C
200
Output noise voltage
10 Hz to 100 kHz, IO = 100 mA,
30
VIN = VOUT(NOM) + 0.5 V+/-VRIPPLE
VRIPPLE = 0.1 V, freq. = 1 kHz
IOUT = 10 mA
65
62
IOUT = 0 mA
20
DocID15470 Rev 3
mV
µVRMS
50
100
µA
IOUT = 0 to 500 mA
-40 °C < TJ < 125 °C
VIN input current in OFF mode:
VEN = GND(3)
400
dB
VIN = VOUT(NOM)+ 0.5 V+/- VRIPPLE
VRIPPLE = 0.1 V,
frequency =10 kHz
IOUT = 100 mA
IOUT = 0 to 500 mA
Quiescent current
%/mA
mVpp
IOUT = 0 mA, -40 °C < TJ< 125 °C
IQ
%/V
mVpp
IOUT = 10 mA to 500 mA, tR = 5 µs
Supply voltage rejection
VOUT = 1.5 V
mV
200
0.001
1
9/28
28
Electrical characteristics
LD39050
Table 6. Electrical characteristics for the LD39050 (fixed output) (continued)
Symbol
Parameter
Test conditions
Min.
Rising edge
0.92*
VOUT
Falling edge
0.8*
VOUT
Power Good output threshold
PG
ISC
Power Good output voltage
low
Isink = 6 mA open drain output
Short-circuit current
RL = 0
Enable input logic low
VIN = 1.5 V to 5.5 V,
- 40 °C < TJ < 125 °C
Enable input logic high
VIN = 1.5 V to 5.5 V,
-40 °C < TJ < 125 °C
Enable pin input current
VEN = VIN
VEN
IEN
tON
TSHDN
COUT
Turn-on time
Typ.
Max.
V
0.4
600
800
V
mA
0.4
0.9
V
V
0.1
(4)
Unit
100
30
Thermal shutdown
160
Hysteresis
20
nA
µs
°C
Output capacitor
Capacitance (see typical
performance characteristics for
stability)
1
22
µF
1. All transient values are guaranteed by design, not production tested
2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This
specification does not apply to output voltages below 1.5 V
3. PG pin floating
4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching
95% of its nominal value
10/28
DocID15470 Rev 3
LD39050
5
Typical performance characteristics
Typical performance characteristics
Figure 6. VOUT accuracy
2.55
2.54
2.53
0.82
0.81
0.8
0.79
0.78
2.52
2.51
2.5
2.49
2.48
VOUT [V]
VADJ [V]
Figure 5. VADJ accuracy
0.85
0.84
0.83
0.77
0.76
0.75
2.47
2.46
2.45
VIN = 1.8 V IOUT = 10 mA VEN = VIN
-50
-25
0
25
50
75
100
125
VIN = 3.5 V IOUT = 10 mA VEN = VIN
-50
150
-25
0
25
50
350
350
300
300
250
250
Dropout [mV]
Dropout [mV]
100
125
150
Figure 8. Dropout voltage vs. temperature
(VOUT = 2.5 V)
Figure 7. Dropout voltage vs. temperature
(VOUT = 1.5 V)
200
150
100
200
150
100
VEN to VIN, IOUT = 500 mA, VOUT = 2.5 V
VEN to VIN, IOUT = 500 mA, VOUT @ 1.5 V
50
50
CIN = COUT = 1 µF
CIN = COUT = 1 µF
0
-50
-25
0
25
50
75
100
125
0
-50
150
-25
0
25
50
T [°C]
VEN to VIN, CIN = COUT = 1 µF
0
100
200
100
125
150
Figure 10. Short-circuit current vs. dropout
voltage
ISC [A]
0.3
0.275
0.25
0.225
0.2
0.175
0.15
0.125
0.1
0.075
0.05
0.025
0
75
T [°C]
Figure 9. Dropout voltage vs. output current
Dropout [V]
75
T [°C]
T [°C]
300
400
500
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
125 °C
85 °C
55 °C
25 °C
0 °C
-25 °C
-40 °C
VIN from 0 to 5.5 V, VEN = VIN, CIN = 1 µF, COUT = 1 µF
0
600
1
2
3
4
5
6
VDROP [V]
IOUT [mA]
DocID15470 Rev 3
11/28
28
Typical performance characteristics
LD39050
Figure 11. Output voltage vs. input voltage
Figure 12. Quiescent current vs. temperature
(VOUT = 0.8 V)
0.9
0.7
125°C
0.6
85°C
0.5
55°C
0.4
25°C
0.3
0°C
Iq [µA]
VOUT [V]
0.8
100
90
80
70
60
- 25°C
0.2
0.1
- 40°C
VEN = VIN, CIN = COUT = 1 µF; IOUT = 500 mA
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
No load
50
40
30
20
10
0
-50
IOUT = 0.5 A
VIN = 1.8 V, VEN to VIN, CIN = 1 µF COUT = 1 µF, VOUT = 0.8 V
-25
0
25
50
75
100
125
150
T [°C]
5.5
VIN [V]
Figure 13. Quiescent current vs. temperature
(VOUT = 2.5 V)
Figure 14. Quiescent current in OFF mode vs.
temperature
0.6
VIN = 3.5 V, VOUT = 2.5 V, VEN = GND, CIN = COUT = 1 µF
0.5
70
60
50
40
30
20
10
0
-50
0.4
No load
VIN = 3.5 V, VEN to VIN, CIN = COUT = 1 µF, VOUT = 2.5 V
Iq [µA]
Iq [µA]
100
90
80
IOUT = 0.5 A
0.3
0.2
0.1
-25
0
25
50
75
100
125
150
0
T [°C]
-50
-25
0
25
50
75
100
125
150
T [°C]
Figure 15. Load regulation
Figure 16. Line regulation (VOUT = 0.8 V)
0.04
0.03
0.03
0.02
0.02
Line [%/V]
Load [%/mA]
0.04
0.01
0
-0.01
IOUT = 1 mA
IOUT = 100 mA
0.01
0
-0.01
-0.02
-0.02
-0.03
-0.03
-0.04
-50
-0.04
-50
VIN = 1.8 V, IOUT = from 10 mA to 500 mA, VOUT = 0.8 V, VEN = VIN
-25
0
25
50
75
100
125
150
T [°C]
12/28
DocID15470 Rev 3
VIN = from 1.8 V to 5.5 V VEN = VIN VOUT = 0.8 V
-25
0
25
50
T [°C]
75
100
125
150
LD39050
Typical performance characteristics
Figure 17. Line regulation (VOUT = 2.5 V)
Figure 18. Supply voltage rejection vs.
temperature (VOUT = 0.8 V, f = 1 kHz)
0.04
100
90
80
IOUT = 1 mA
0.03
IOUT = 100 mA
0.01
SVR [dB]
Line [%/V]
0.02
0
-0.01
-0.02
-0.03
-0.04
-50
VIN = from 3.5 V to 5.5 V VOUT = 2.5 V VEN = VIN
-25
0
25
50
T [°C]
75
100
125
150
SVR [dB]
SVR [dB]
70
60
50
40
30
VIN from 1.7 V to 1.9 V, VOUT = 0.8 V, VEN to VIN, IOUT = 100 mA, freq. = 10 kHz
CIN = COUT = 1 µF
0
25
50
CIN = COUT = 1 µF
-25
0
25
75
100
125
150
100
90
80
70
60
50
40
30
20
10
0
-50
SVR [dB]
SVR [dB]
CIN = COUT = 1 µF
25
50
125
150
CIN = COUT = 1 µF
-25
0
25
50
75
100
125
150
Figure 22. Supply voltage rejection vs.
frequency (VOUT = 0.8 V)
VIN from 2.9 V to 3.1 V, VOUT = 2.5 V, VEN to VIN, IOUT = 100 mA, freq. = 10 kHz
0
100
T [°C]
Figure 21. Supply voltage rejection vs.
temperature (VOUT = 2.5 V, f = 10 kHz)
-25
75
VIN from 2.9 V to 3.1 V, VOUT = 2.5 V, VEN to VIN, IOUT = 10 mA, freq. = 1 kHz
T [°C]
100
90
80
70
60
50
40
30
20
10
0
-50
50
Figure 20. Supply voltage rejection vs.
temperature (VOUT = 2.5 V, f = 1 kHz)
100
90
80
-25
VIN from 1.7 V to 1.9 V, VOUT = 0.8 V, VEN to VIN, IOUT = 10 mA, freq. = 1 kHz
T [°C]
Figure 19. Supply voltage rejection vs.
temperature (VOUT = 0.8 V, f = 10 kHz)
20
10
0
-50
70
60
50
40
30
20
10
0
-50
75
100
125
150
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10 mA
IOUT = 100 mA
VIN from 1.7 V to 1.9 V, VEN to VIN, VOUT = 0.8 V, CIN = COUT = 1 µF
0
T [°C]
DocID15470 Rev 3
10
20
30
40
50
60
Freq [kHz]
70
80
90
100
13/28
28
Typical performance characteristics
LD39050
Figure 24. Noise output voltage vs. frequency
AP - IOUT = 100mA
5.0
100
90
80
70
60
50
40
IOUT = 100 mA
30
20
10
0
10
20
30
40
50 60
Freq [kHz]
70
80
90
AP - IOUT = 1m
AP - IOUT = 0A
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.E+01
VIN from 2.9 V to 3.1 V, VEN to VIN, VOUT = 2.5 V, CIN = COUT = 1 µF
0
AP - IOUT = 10mA
4.5
4.0
IOUT = 10 mA
eN [uV/SQRT(Hz)]
SVR [dB]
Figure 23. Supply voltage rejection vs.
frequency (VOUT = 2.5 V)
100
1.E+02
1.E+03
f [Hz]
1.E+04
1.E+05
VIN = 1.8 V, VOUT = 0.8 V, VEN = 1 V, CIN = COUT = 1 µF,
TA = 25 °C
Figure 25. Enable voltage vs. temperature
(VIN = 3.5 V)
1
1
High
0.9
0.8
Low
0.7
0.6
0.5
0.4
0.3
0.2
High
0.9
0.8
VEN [V]
VEN [V]
Figure 26. Enable voltage vs. temperature
(VIN = 5.5 V)
Low
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.1
0
VIN = 3.5 V IOUT = 10 mA, VOUT = 2.5 V, CIN = COUT = 1 µF
-50
-25
0
25
50
75
100
125
150
VIN = 5.5 V IOUT = 10 mA VOUT = 2.5 V, CIN = COUT = 1 µF
-50
T [°C]
0
25
50
75
100
125
T [°C]
Figure 27. Load transient (VOUT = 0.8 V)
Figure 28. Load transient (VOUT = 2.5 V)
VOUT
VOUT
IOUT
IOUT
VEN = VIN=1.8 V, IOUT = from10 mA to 0.5 A, CIN = COUT = 1
µF, V OUT = 0.8 V
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-25
VEN = VIN = 3.5V, IOUT from 10 mA to 0.5 A, VOUT = 2.5 V,
CIN = COUT = 1 µF
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LD39050
Typical performance characteristics
Figure 29. Load transient (VOUT=2.5 V, IOUT from
0.1 A to 0.5 A)
Figure 30. Line transient
VOUT
VOUT
VIN
IOUT
VEN = VIN = 3.5 V, IOUT from 100 mA to 0.5 A, VOUT = 2.5 V,
CIN = COUT = 1 µF
VEN = VIN from 4.3 V to 4.8 V, IOUT = 10 mA, COUT = 1 µF,
CIN = NO
Figure 31. Start-up transient
Figure 32. Enable transient
VOUT
VIN
VOUT
VEN
VEN = VIN = from 0 V to 5.5 V, IOUT=10 mA, CIN = COUT = 1
µF, V OUT = 2.5 V
VEN from 0 V to 2 V, VIN = 3.5 V, VOUT = 2.5 V, IOUT = 10 mA,
CIN = COUT = 1µF
Figure 33. ESR required for stability with
ceramic capacitors (VOUT = 0.8 V)
Figure 34. ESR required for stability with
ceramic capacitors (VOUT = 2.5 V)
1.5
1.5
UNSTABLE ZONE
ESR @ 100 kHz [Ω]
ESR @ 100 kHz [Ω]
1.25
1
0.75
STABLE ZONE
0.5
1.25
UNSTABLE ZONE
1
0.75
0.5
STABLE ZONE
0.25
0.25
0
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
1
2
VIN = VEN = from 1.8 V to 5.5 V, IOUT = from 1 mA to 500
mA, VOUT = 0.8 V, CIN = 1 µF
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22
COUT [µF] (nominal value)
COUT [µF] (nominal value)
VIN = VEN = from 3.5 V to 5.5 V, IOUT = from 1 mA to 500
mA, VOUT = 2.5 V, CIN = 1 µF
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Application information
6
LD39050
Application information
The LD39050 is an ultra low-dropout linear regulator. It provides up to 500 mA with a
200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in
fixed and adjustable output versions.
The regulator is equipped with internal protection circuitry, such as short-circuit current
limiting and thermal protection.
The regulator is designed to be stable with ceramic capacitors on the input and the output.
The recommended values of the input and output ceramic capacitors are from 1 µF to 22 µF
with 1 µF typical. The input capacitor must be connected within 0.5 inches of the VIN
terminal. The output capacitor must also be connected within 0.5 inches of output pin. There
is no upper limit to the value of the input capacitor.
Figure 35 and Figure 36 illustrate the typical application schematics:
Figure 35. Application schematic for fixed version
9,1
,1
9,1
,1
3*
3*
/'
/'
&,1
,1
(1
(1
928
287
2))21
2)
—)
*1'
*1
16/28
DocID15470 Rev 3
1&
1&
928
287
&28
287
—)
LD39050
Application information
Figure 36. Application schematic for adjustable version
9
9,1
,,,1
&,1
,1
9,1
,1
(1
(1
3*
3*
/'
928
287
2))21
2)
21
—)
*1'
*1
$' $'
928
287
5
&28
287
—)
5
Regarding to the adjustable version, the output voltage can be adjusted from 0.8 V up to the
input voltage minus the voltage drop across the PMOS (dropout voltage), by connecting a
resistor divider between the ADJ pin and the output, thus allowing the remote voltage
sensing.
The resistor divider should be selected using the following equation:
VOUT = VADJ (1 + R1 / R2) with VADJ = 0.8 V (typ.)
Resistors should be used with values in the range from 10 kΩ to 50 kΩ. Lower values can
also be suitable, but they increase current consumption.
6.1
Power dissipation
An internal thermal feedback loop disables the output voltage if the die temperature reaches
approximately 160 °C. This feature protects the device from excessive temperature and
allows the user to push the limits of the power handling capability of a given board without
damaging the device.
A good PC board layout should be used to maximize the power dissipation. The thermal
path for the heat generated by the device goes from the die to the copper lead frame
through the package leads and exposed pad to the PC board copper. The PC board copper
acts as a heat sink. The footprint copper pads should be as wider as possible to spread and
dissipate the heat to the surrounding ambient. Feed-through vias to inner or backside
copper layers improve the overall thermal performance of the device.
The power dissipation of the device depends on the input voltage, output voltage and output
current, and is given by:
PD = (VIN -VOUT) IOUT
The junction temperature of the device is:
TJ_MAX = TA + RthJA x PD
where:
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Application information
LD39050
TJ_MAX is the maximum junction of the die,125 °C;
TA is the ambient temperature;
RthJA is the thermal resistance junction-to-ambient.
6.2
Enable function
The LD39050 features an enable function. When the EN voltage is higher than 2 V the
device is ON, and if it is lower than 0.8 V the device is OFF. In shutdown mode, consumption
is lower than 1 µA.
The EN pin does not have an internal pull-up, therefore it cannot be left floating if it is not
used.
6.3
Power Good function
Most applications require a flag showing that the output voltage is in the correct range.
The Power Good threshold depends on the adjustable voltage. When the adjustable voltage
is higher than 0.92*VADJ, the Power Good (PG) pin goes to high impedance. If it is below
0.80*VADJ the PG pin goes to low impedance. If the device is working well, the PG pin is at
high impedance. If the output voltage is fixed using an external or internal resistor divider,
the Power Good threshold is 0.92*VOUT.
The use of the Power Good function requires an external pull-up resistor, which must be
connected between the PG pin and VIN or VOUT. The typical current capability of the PG pin
is up to 6 mA. The use of a pull-up resistor for PG in the range from 100 kΩ to 1 MΩ is
recommended. If the Power Good function is not used, the PG pin must remain floating.
When EN pin is in low state the power good is asserted to the high state.
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LD39050
7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
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Package information
7.1
LD39050
DFN6 (3x3 mm) package information
Figure 37. DFN6 (3x3 mm) package outline
B&
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LD39050
Package information
Table 7. DFN6 (3x3 mm) mechanical data
mm
Dim.
Min.
A
0.80
A1
0
Typ.
1
0.02
A3
0.05
0.20
b
0.23
D
2.90
D2
2.23
E
2.90
E2
1.50
0.45
3
3.10
2.50
3
3.10
1.75
e
L
Max.
0.95
0.30
0.40
0.50
Figure 38. DFN6 (3x3 mm) recommended footprint
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Package information
7.2
LD39050
DFN6 (3x3 mm) packing information
Figure 39. DFN6 (3x3 mm) tape outline
B1
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LD39050
Package information
Figure 40. DFN6 (3x3 mm) reel outline
B1
Table 8. DFN6 (3x3 mm) tape and reel mechanical data
mm
Dim.
Min.
Typ.
Max.
A0
3.20
3.30
3.40
B0
3.20
3.30
3.40
K0
1
1.10
1.20
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Package information
7.3
LD39050
DFN6 (2x2 mm) package information
Figure 41. DFN6 (2x2 mm) package outline
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Package information
Table 9. DFN6 (2x2 mm) mechanical data
mm
Dim.
Min.
Typ.
Max.
A
0.51
0.55
0.60
A1
0
0.02
0.05
b
0.18
0.25
0.30
D
D2
2.00
1.30
1.45
E
E2
2.00
0.85
1.00
e
L
1.55
1.10
0.50
0.15
0.25
0.35
Figure 42. DFN6 (2x2 mm) recommended footprint
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Ordering information
8
LD39050
Ordering information
Table 10. Order code
Order code
Package
Packing
LD39050PUR
LD39050PU25R
Adjustable from 0.8 V
DFN6 (3x3 mm)
LD39050PU33R
LD39050PVR
3.3 V
1.0 V
DFN6 (2x2 mm)
Adjustable from 0.8 V
1. Available on request.
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2.5 V
Tape and reel
LD39050PV10R
(1)
Output voltages
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9
Revision history
Revision history
Table 11. Document revision history
Date
Revision
11-Mar-2009
1
Initial release.
2
The part number LD39050xx changed to LD39050.
Updated the title in cover page, Table 10: Order code, Section 1: Diagrams,
Section 2: Pin configuration, Section 4: Electrical characteristics, Section 5:
Typical performance characteristics, Section 6: Application information and
Section 7: Package information.
Deleted order code table.
Added Section 9: Revision history.
Minor text changes.
3
Added DFN6 (2x2 mm) package.
Removed device summary table.
Updated features and description in cover page.
Updated Section 2: Pin configuration, Table 3: Thermal data and Table 4: ESD
performance.
Added Section 8: Ordering information.
Minor text changes.
28-Feb-2014
26-Oct-2015
Changes
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LD39050
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