OPA2677 OPA 2677 OPA2 677 www.ti.com SBOS126I – APRIL 2000 – REVISED JULY 2008 Dual, Wideband, High Output Current Operational Amplifier FEATURES APPLICATIONS ● ● ● ● ● ● ● ● ● ● ● ● ● ● WIDEBAND +12V OPERATION: 200MHz (G = +4) UNITY-GAIN STABLE: 220MHz (G = +1) HIGH OUTPUT CURRENT: 500mA OUTPUT VOLTAGE SWING: ±5V HIGH SLEW RATE: 1800V/µs LOW SUPPLY CURRENT: 18mA FLEXIBLE SUPPLY RANGE: +5 to +12V Single Supply ±2.5 to ±6V Dual Supplies DESCRIPTION The OPA2677 provides the high output current and low distortion required in emerging xDSL and Power Line Modem driver applications. Operating on a single +12V supply, the OPA2677 consumes a low 9mA/ch quiescent current to deliver a very high 500mA output current. This output current supports even the most demanding ADSL CPE requirements with > 380mA minimum output current (+25°C minimum value) with low harmonic distortion. Differential driver applications will deliver < –85dBc distortion at the peak upstream power levels of full rate ADSL. The high 200MHz bandwidth will also support the most demanding VDSL line driver requirements. xDSL LINE DRIVER CABLE MODEM DRIVER MATCHED I/Q CHANNEL AMPLIFIER BROADBAND VIDEO LINE DRIVER ARB LINE DRIVER POWER LINE MODEM HIGH CAP LOAD DRIVER Specified on ±6V supplies (to support +12V operation), the OPA2677 will also support a single +5V or dual ±5V supply. Video applications will benefit from its very high output current to drive up to 10 parallel video loads (15Ω) with < 0.1%/0.1° dG/dP nonlinearity. The OPA2677 is available in either an SO-8 or QFN-16 and an HSOP-8 PowerPAD package. OPA2677 RELATED PRODUCTS SINGLES DUALS TRIPLES NOTES OPA691 OPA2691 OPA3691 Single +12V Capable — THS6042 — ±15V Capable — OPA2674 — Single +12V Capable with current limit +12V 20Ω 1/2 OPA2677 324Ω AFE Output +6.0V 2kΩ 17.4Ω 1:1.7 1µF 2VPP 17.7VPP 2kΩ 20Ω 15VPP Twisted Pair 100Ω 82.5Ω 324Ω 17.4Ω 1/2 OPA2677 Single-Supply ADSL CPE Driver Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2000-2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Power Supply ............................................................................... ±6.5VDC Internal Power Dissipation .......................... See Thermal Characteristics Differential Input Voltage .................................................................. ±1.2V Input Common-Mode Voltage Range ................................................. ±VS Storage Temperature Range: U, DDA, RGV ................. –65°C to +125°C Lead Temperature (soldering, 10s) .............................................. +300°C Junction Temperature (TJ ) ........................................................... +150°C ESD Rating: Human Body Model (HBM)(2) ....................................................... 2000V Charge Device Model (CDM) ....................................................... 1000V Machine Model (MM) ..................................................................... 100V NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) Pins 2 and 6 on SO-8 and HSOP-8 packages, and pins 2 and 11 on QFN-16 package > 500V HBM. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PACKAGE-LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY OPA2677 " SO-8 " D " –40°C to +85°C " OPA2677U " OPA2677U OPA2677U/2K5 Rails, 100 Tape and Reel, 2500 OPA2677 " HSOP-8 " DDA " –40°C to +85°C " OP2677 " OPA2677IDDA OPA2677IDDAR Rails, 75 Tape and Reel, 2500 OPA2677 QFN-16 RGV –40°C to +85°C OPA2677 OPA2677IRGVT OPA2677IRGVR Tape and Reel, 250 Tape and Reel, 2500 PRODUCT NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. PIN CONFIGURATIONS Top View NC +VS Out B OPA2677U, DDA Out A OPA2677RGV 16 15 14 13 +VS NC 1 12 NC –In A 2 7 Out B –In A 2 11 –In B +In A 3 6 –In B +In A 3 10 +In B –VS 4 5 +In B NC 4 9 NC 5 NC SO-8, HSOP-8 6 7 8 NC 8 –VS 1 NC Out A QFN-16 NOTE: Exposed thermal pad on HSOP-8 and QFN-16 must be tied to –VS. 2 OPA2677 www.ti.com SBOS126I ELECTRICAL CHARACTERISTICS: VS = ±6V Boldface limits are tested at +25°C. At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 1 for AC performance only. OPA2677U, DDA, RGV MIN/MAX OVER TEMPERATURE TYP PARAMETER AC PERFORMANCE (see Figure 1) Small-Signal Bandwidth (VO = 0.5VPP) Peaking at a Gain of +1 Bandwidth for 0.1dB Gain Flatness Large-Signal Bandwidth Slew Rate Rise-and-Fall Time Harmonic Distortion 2nd-Harmonic 3rd-Harmonic Input Voltage Noise Noninverting Input Current Noise Inverting Input Current Noise NTSC Differential Gain NTSC Differential Phase Channel-to-Channel Crosstalk DC PERFORMANCE(4) Open-Loop Transimpedance Gain Input Offset Voltage Average Offset Voltage Drift Noninverting Input Bias Current Average Noninverting Input Bias Current Drift Inverting Input Bias Current Average Inverting Input Bias Current Drift INPUT(4) Common-Mode Input Range (CMIR)(5) Common-Mode Rejection Ratio (CMRR) Noninverting Input Impedance Minimum Inverting Input Resistance Maximum Inverting Input Resistance OUTPUT(4) Voltage Output Swing Current Output Peak Current Output, Sourcing(6) Peak Current Output, Sinking(6) Closed-Loop Output Impedance POWER SUPPLY Specified Operating Voltage Maximum Operating Voltage Minimum Operating Voltage Maximum Quiescent Current Minimum Quiescent Current Power-Supply Rejection Ratio (PSRR) THERMAL CHARACTERISTICS Specification: U, DDA, RGV Thermal Resistance, θJA U SO-8 DDA HSOP-8 RGV QFN-16 CONDITIONS +25°C G = +1, RF = 511Ω G = +2, RF = 475Ω G = +4, RF = 402Ω G = +8, RF = 250Ω G = +1, RF = 511Ω G = +4, VO = 0.5VPP G = +4, VO = 5VPP G = +4, 5V Step G = +4, VO = 2V Step G = +4, f = 5MHz, VO = 2VPP RL = 100Ω RL ≥ 500Ω RL = 100Ω RL ≥ 500Ω f > 1MHz f > 1MHz f > 1MHz NTSC, G = +2, RL = 150Ω NTSC, G = +2, RL = 37.5Ω NTSC, G = +2, RL = 150Ω NTSC, G = +2, RL= 37.5Ω f = 5MHz, Input Referred 220 200 200 250 0 80 200 2000 1.75 VO = 0V, RL = 100Ω VCM = 0V VCM = 0V VCM = 0V VCM = 0V VCM = 0V VCM = 0V 135 ±1.0 ±4 ±10 ±5 ±10 ±10 –72 –82 –81 –93 2 16 24 0.03 0.05 0.01 0.04 –92 +25°C(1) 0°C to 70°C(2) –40°C to +85°C(2) 170 170 225 168 168 205 165 165 200 36 32 30 1500 1450 1400 –70 –80 –80 –91 2.6 20 29 –69 –79 –79 –90 2.9 21 30 80 ±4.5 ±10 ±30 ±50 ±35 ±100 min min min min typ min typ min typ B B B B C B C B C –68 –78 –78 –89 3.1 22 31 dBc dBc dBc dBc nV/√Hz pA/√Hz pA/√Hz % % degrees degrees dB max max max max max max max typ typ typ typ typ B B B B B B B C C C C C 76 ±5 ±10 ±32 ±50 ±40 ±100 75 ±5.3 ±12 ±35 ±75 ±45 ±150 kΩ mV µV/°C µA nA/°C µA nA°/C min max max max max max max A A B A B A B ±4.0 50 ±3.9 49 V dB kΩ || pF Ω Ω min min typ min max A A C B B V V V mA A A Ω min min typ min typ typ typ A A C A C C C V V V mA mA dB typ max typ max min min C A C A A A typ typ typ C C C ±4.1 Open-Loop Open-Loop No Load RL = 100Ω RL = 25Ω VO = 0 VO = 0 VO = 0 G = +4, f ≤ 100kHz ±5.1 ±5.0 ±4.8 ±500 1.2 –1.6 0.003 ±4.9 ±4.8 ±4.8 ±4.7 ±4.7 ±4.5 ±380 ±350 ±320 ±6.3 ±6.3 ±6.3 18.6 17.4 51 18.8 16.5 49 19.5 16.0 48 ±6 VS = ±6V, Both Channels VS = ±6V, Both Channels f = 100kHz, Input Referred ±2 18 18 56 51 MIN/ TEST MAX LEVEL(3) MHz MHz MHz MHz dB MHz MHz V/µs ns ±4.5 55 250 || 2 22 22 VCM = 0V, Input Referred UNITS 12 35 –40 to +85 °C 125 55 50(7) °C/W °C/W °C/W Junction-to-Ambient Exposed Slug Soldered to Board Exposed Slug Soldered to Board NOTES: (1) Junction temperature = ambient for +25°C specifications. (2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over temperature specifications. (3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (4) Current is considered positive out of node. VCM is the input common-mode voltage. (5) Tested < 3dB below minimum CMRR specifications at ±CMIR limits. (6) Peak output duration should not exceed junction temperature +150°C for extended periods. (7) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (θJA). OPA2677 SBOS126I www.ti.com 3 ELECTRICAL SPECIFICATIONS: VS = +5V Boldface limits are tested at +25°C. At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω, unless otherwise noted. See Figure 3 for AC performance only. OPA2677U, DDA, RGV MIN/MAX OVER TEMPERATURE TYP PARAMETER AC PERFORMANCE (see Figure 3) Small-Signal Bandwidth (VO = 0.5VPP) Peaking at a Gain of +1 Bandwidth for 0.1dB Gain Flatness Large-Signal Bandwidth Slew Rate Rise-and-Fall Time Harmonic Distortion 2nd-Harmonic 3rd-Harmonic Input Voltage Noise Noninverting Input Current Noise Inverting Input Current Noise Channel-to-Channel Crosstalk DC PERFORMANCE Open-Loop Transimpedance Gain Input Offset Voltage Average Offset Voltage Drift Noninverting Input Bias Current Average Noninverting Input Bias Current Drift Inverting Input Bias Current Average Inverting Input Bias Current Drift INPUT Most Positive Input Voltage Most Negative Input Voltage Common-Mode Rejection Ratio (CMRR) Noninverting Input Impedance Minimum Inverting Input Resistance Maximum Inverting Input Resistance OUTPUT Most Positive Output Voltage Least Positive Output Voltage Current Output Closed-Loop Output Impedance POWER SUPPLY Specified Operating Voltage Maximum Operating Voltage Minimum Operating Voltage Maximum Quiescent Current Minimum Quiescent Current Power-Supply Rejection Ratio (PSRR) THERMAL CHARACTERISTICS Specification: U, DDA, RGV Thermal Resistance, θJA U SO-8 DDA HSOP-8 RGV QFN-16 +25°C CONDITIONS G = +1, RF = 536Ω G = +2, RF = 511Ω G = +4, RF = 453Ω G = +8, RF = 332Ω G = +1, RF = 511Ω G = +4, VO = 0.5VPP G = +4, VO = 2VPP G = +4, 2V Step G = +4, VO = 2V Step G = +4, f = 5MHz, VO = 2VPP RL = 100Ω RL ≥ 500Ω RL = 100Ω RL ≥ 500Ω f > 1MHz f > 1MHz f > 1MHz f = 5MHz, Input Referred 160 150 150 160 0 70 100 1100 2 VO = 0V, RL = 100Ω VCM = 0V VCM = 0V VCM = 0V VCM = 0V VCM = 0V VCM = 0V 110 ±0.8 ±4 ±10 ±5 ±10 ±10 VCM = 2.5V, Input Referred +25°C(1) 0°C to 70°C(2) –40°C to +85°C(2) 120 130 130 118 128 128 115 125 125 23 20 19 830 827 825 –65 –68 –70 –71 2.6 20 29 –64 –67 –69 –70 2.9 21 30 72 UNITS MIN/ TEST MAX LEVEL(3) MHz MHz MHz MHz dB MHz MHz V/µs ns min min min min typ min typ min typ B B B B C B C B C –63 –66 –68 –69 3.1 22 31 dBc dBc dBc dBc nV/√Hz pA/√Hz pA/√Hz dB max max max max max max max typ B B B B B B B C ±100 70 ±4.0 ±10 ±32 ±50 ±40 ±100 68 ±4.3 ±12 ±35 ±75 ±45 ±150 kΩ mV µV/°C µA nA/°C µA nA°/C min max max max max max max A A B A B A B 3.3 1.7 49 3.2 1.8 48 3.1 1.9 47 Open-Loop Open-Loop 3.7 1.3 52 250 || 2 25 25 V V dB kΩ || pF kΩ kΩ min min min typ min max A A A C B B No Load RL = 100Ω No Load RL = 100Ω VO = 0 G = +4, f ≤ 100kHz 4.1 3.5 0.8 1.0 ±300 0.02 3.9 3.8 1.0 1.1 ±200 3.8 3.7 1.1 1.2 ±180 3.6 3.5 1.3 1.5 ±100 V V V V mA Ω min min min min min typ A A A A A C 12.6 12.6 12.6 14.8 12.0 15.2 11.7 15.6 11.4 V V V mA mA dB typ max typ max min typ C A C A A C typ typ typ C C C –67 –71 –72 –74 2 16 24 –92 ±3.5 ±10 ±30 ±50 ±30 15 40 +5 VS = ±5V, Both Channels VS = ±5V, Both Channels f = 100kHz, Input Referred +4 13.6 13.6 52 –40 to +85 °C 125 55 50(4) °C/W °C/W °C/W Junction-to-Ambient Exposed Slug Soldered to Board Exposed Slug Soldered to Board NOTES: (1) Junction temperature = ambient for +25°C specifications. (2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +9°C at high temperature limit for over temperature specifications. (3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (4) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (θJA). 4 OPA2677 www.ti.com SBOS126I TYPICAL CHARACTERISTICS: VS = ±6V At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. INVERTING SMALL-SIGNAL FREQUENCY RESPONSE NONINVERTING SMALL-SIGNAL FREQUENCY RESPONSE 6 VO = 0.5VPP G = +8 RF = 250Ω 0 G = +1 RF = 511Ω –3 G = +2 RF = 475Ω –6 –9 –12 G = +4 RF = 402Ω –15 See Figure 1 100 18 200 300 G = –8, RF = 280Ω –9 G = –4, RF = 383Ω –12 400 0 500 100 200 300 400 Frequency (MHz) Frequency (MHz) NONINVERTING LARGE-SIGNAL FREQUENCY RESPONSE INVERTING LARGE-SIGNAL FREQUENCY RESPONSE 12 18 9 0 VO = 10VPP –3 –6 6 3 0 –3 VO = 10VPP –6 VO = 8VPP –9 VO = 5VPP 9 3 VO ≤ 1VPP –9 –12 See Figure 1 500 VO = 8VPP 12 VO ≤ 1VPP 6 G = –4 RF = 383Ω 15 Gain (dB) Gain (dB) –6 See Figure 2 VO = 2VPP –12 G = –2, RF = 422Ω –3 –18 G = +4, See Figure 1 15 G = –1, RF = 475Ω 0 –15 –18 0 VO = 0.5VPP 3 See Figure 2 –15 –15 0 100 200 300 400 0 500 100 200 300 Frequency (MHz) NONINVERTING PULSE RESPONSE INVERTING PULSE RESPONSE G = +4 Large Signal 200mVPP Small Signal Right Scale 500 G = –4 Left Scale Output Voltage (1V/div) 4VPP Output Voltage (100mV/div) Output Voltage (1V/div) Left Scale 4VPP Large Signal 200mVPP Small Signal Right Scale See Figure 2 See Figure 1 Time (5ns/div) Time (5ns/div) OPA2677 SBOS126I 400 Frequency (MHz) Output Voltage (100mV/div) Normalized Gain (dB) 3 Normalized Gain (dB) 6 www.ti.com 5 TYPICAL CHARACTERISTICS: VS = ±6V (Cont.) At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs FREQUENCY –60 –60 VO = 2VPP RL = 100Ω –70 –75 –80 –85 3rd-Harmonic –90 –95 F = 5MHz RL = 100Ω –65 2nd-Harmonic Harmonic Distortion (dBc) Harmonic Distortion (dBc) –65 2nd-Harmonic –70 –75 –80 –85 3rd-Harmonic –90 –95 Single Channel—see Figure 1 Single Channel—see Figure 1 –100 –100 0.1 1 10 0.1 20 1 HARMONIC DISTORTION vs NONINVERTING GAIN Harmonic Distortion (dBc) –65 –70 HARMONIC DISTORTION vs INVERTING GAIN –60 VO = 2VPP f = 5MHz RL = 100Ω VO = 2VPP f = 5MHz RL = 100Ω –65 2nd-Harmonic Harmonic Distortion (dBc) –60 –75 –80 –85 3rd-Harmonic –90 –95 –70 –80 –85 3rd-Harmonic –90 –95 Single Channel—see Figure 2 –100 –100 1 10 1 10 Gain Magnitude (V/V) Gain Magnitude |(V/V)| HARMONIC DISTORTION vs LOAD RESISTANCE 2-TONE, 3rd-ORDER INTERMODULATION SPURIOUS –60 2nd-Harmonic –60 VO = 2VPP f = 5MHz 20MHz See Figure 1 3rd-Order Spurious Level (dBc) –65 Harmonic Distortion (dBc) 2nd-Harmonic –75 Single Channel—see Figure 1 –70 –75 –80 –85 3rd-Harmonic –90 –95 –65 –70 –75 10MHz –80 –85 –90 1MHz 5MHz –95 Single Channel—see Figure 1 Single Channel—see Figure 1 –100 –100 10 100 1000 Load Resistance (Ω) 6 10 Output Voltage (VPP) Frequency (MHz) –10 –5 0 5 10 Single-Tone Load Power (dBm) OPA2677 www.ti.com SBOS126I TYPICAL CHARACTERISTICS: VS = ±6V (Cont.) At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. MAXIMUM OUTPUT SWING vs LOAD RESISTANCE OUTPUT VOLTAGE AND CURRENT LIMITATIONS 6 5 4 3 VO (V) Output Voltage (V) 6 5 4 3 2 1 0 –1 –2 –3 –4 –5 –6 RL = 100Ω 2 1 RL = 50Ω RL = 10Ω 0 –1 –2 RL = 25Ω 1W Internal Power Single Ch –3 –4 –5 –6 –600 See Figure 1 10 100 1000 1W Internal Power Single Ch –400 –200 0 Load Resistance (Ω) 200 400 600 IO (mA) CHANNEL-TO-CHANNEL CROSSTALK INPUT VOLTAGE AND CURRENT NOISE DENSITY –60 100 24pA/√Hz Inverting Current Noise Noninverting Current Noise 10 Crosstalk, Input Referred (dB) Voltage Noise nV/√Hz Current Noise pA/√Hz Input Referred 16pA/√Hz Voltage Noise –65 2nV/√Hz –70 –75 –80 –85 –90 –95 –100 1 100 1k 10k 100k 1M 1M 10M 10M RECOMMENDED RS vs CAPACITIVE LOAD FREQUENCY RESPONSE vs CAPACITIVE LOAD 90 2 CL = 10pF Normalized Gain to Capacitive Load (dB) 80 70 60 RS (Ω) 100M Frequency (Hz) Frequency (Hz) 50 40 30 20 10 0 0 CL = 100pF –2 –4 1/2 OPA2677 –6 CL = 22pF RS CL = 47pF CL 1kΩ 402Ω –8 133Ω 1kΩ is optional. –10 1 10 100 1000 Capacitive Load (pF) 10M 100M 1G Frequency (Hz) OPA2677 SBOS126I 1M www.ti.com 7 TYPICAL CHARACTERISTICS: VS = ±6V (Cont.) At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. Transimpedance Gain (20dBΩ/div) Power-Supply Rejection Ratio (dB) Common-Mode Rejection Ratio (dB) CMRR 60 50 40 –PSRR 30 +PSRR 20 10 120 0 100 –45 80 –90 60 –135 40 –180 20 –225 0 0 10k 1k 100k 1M 10M –270 10k 100M 100k 1M CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY 1G COMPOSITE VIDEO dG/dφ 100 0.14 G = +2 RF = 475Ω VS = ±5V 0.12 10 dφ, Positive Video dφ, Negative Video 0.10 dG/dφ (%/°) 1 0.1 0.08 0.06 0.04 dG, Positive Video 0.01 0.02 dG, Negative Video 0.001 0 10k 100k 1M 10M 100M 1G 1 2 3 Frequency (Hz) NONINVERTING OVERDRIVE RECOVERY Output Voltage (2V/div) 6 4 2 Input 3 2 Output 1 0 0 –2 –1 –4 –6 –8 –2 G = +4 RL = 100Ω See Figure 1 6 8 6 Output Voltage (2V/div) Input 5 7 8 9 10 INVERTING OVERDRIVE RECOVERY 4 Input Voltage (1V/div) 8 4 Number of 150Ω Loads –3 –4 4 3 4 2 2 1 0 0 –2 –1 –4 –2 –6 –3 Output Time (20ns/div) G = –4 RL = 100Ω See Figure 2 –8 –4 Time (20ns/div) OPA2677 www.ti.com SBOS126I Input Voltage (1V/div) Output Impedance Magnitude (Ω) 100M Frequency (Hz) Frequency (Hz) 8 10M Transimpedance Phase (45°/div) OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE CMRR AND PSRR vs FREQUENCY 70 TYPICAL CHARACTERISTICS: VS = ±6V (Cont.) At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. SUPPLY AND OUTPUT CURRENT vs TEMPERATURE 600 8 550 Noninverting Bias Current 6 2 Input Offset Voltage –2 Inverting Bias Current –4 40 450 Sinking Output Current 400 30 350 Supply Current 300 20 250 –6 200 –8 150 –10 –55 Sourcing Output Current 500 4 0 50 10 100 –35 –15 5 25 45 65 85 105 125 0 –55 –35 –15 Ambient Temperature (°C) 5 25 45 65 85 105 125 Temperature (°C) CMIR AND OUTPUT VOLTAGE vs SUPPLY VOLTAGE 6 No Load Voltage Range (±V) 5 ± Output Voltage 4 3 –V Input Voltage 2 +V Input Voltage 1 0 2 3 4 5 6 Supply Voltage (±V) OPA2677 SBOS126I www.ti.com 9 Output Current (mA) 10 Output Current (mA) Input Offset Voltage (mV) Input Bias Current (µA) TYPICAL DC ERROR DRIFT vs TEMPERATURE TYPICAL CHARACTERISTICS: VS = ±6V (Cont.) At TA = +25°C, Differential Gain = +9, RF = 300Ω, and RL = 70Ω, unless otherwise noted. See Figure 5 for AC performance only. DIFFERENTIAL SMALL-SIGNAL FREQUENCY RESPONSE DIFFERENTIAL LARGE-SIGNAL FREQUENCY RESPONSE 3 20 GD = +2, RF = 442Ω 19 0 –3 GD = +9, RF = 300Ω 0.2VPP RL = 70Ω GD = +9 18 GD = +5, RF = 383Ω Gain (dB) Normalized Gain (dBc) RL = 70Ω VO = 200mVPP 1VPP 2VPP 17 5VPP 16 –6 15 See Figure 5 See Figure 5 –9 14 5 10 100 500 4 10 100 Frequency (MHz) HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs LOAD RESISTANCE –60 f = 5MHz GD = +9 VO = 2VPP –70 2nd-Harmonic –75 –80 –85 3rd-Harmonic –90 RL = 70Ω VO = 2VPP –70 2nd-Harmonic –75 –80 –85 –90 –95 See Figure 5 See Figure 5 –95 3rd-Harmonic –100 10 100 0.1 1k 100 HARMONIC DISTORTION vs OUTPUT VOLTAGE MULTITONE POWER RATIO (VS = ±6V, 13dBm Output Power) 10 See Figure 5 0 –10 –70 Power (dB) –68 10 Frequency (MHz) f = 5MHz G = +9 RL = 70Ω –66 1 Load Resistance (Ω) –64 Harmonic Distortion (dB) GD = +9 –65 Harmonic Distortion (dB) Harmonic Distortion (dB) –65 2nd-Harmonic –72 –74 –20 –30 –40 –50 –76 –60 3rd-Harmonic –78 –70 See Figure 5 –80 –80 0.1 1 10 100 0 Output Voltage (Vp-p) 10 400 Frequency (MHz) 20 40 60 80 100 120 140 160 Frequency (kHz) OPA2677 www.ti.com SBOS126I TYPICAL CHARACTERISTICS: VS = +5V At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted. INVERTING SMALL-SIGNAL FREQUENCY RESPONSE NONINVERTING SMALL-SIGNAL FREQUENCY RESPONSE 6 6 3 G = +1 RF = 536Ω 0 Normalized Gain (dB) Normalized Gain (dB) 3 –3 G = +2 RF = 511Ω –6 –9 G = +4 RF = 453Ω –12 –15 G = +8 RF = 332Ω G = –8 RF = 332Ω 0 –3 –6 G = –1 RF = 536Ω –9 G = –4 RF = 453Ω –12 G = –2 RF = 511Ω –15 See Figure 3 See Figure 4 –18 –18 0 50 100 150 200 0 250 50 100 1.6 250 VO = 2VPP VO = 500mVPP Output Voltage (400mV/div) 300 200 100 0 –100 –200 1.2 0.8 0.4 0 –0.4 –0.8 –1.2 –300 See Figure 3 See Figure 3 –1.6 –400 Time (5ns/div) Time (5ns/div) RECOMMENDED RS vs CAPACITIVE LOAD FREQUENCY RESPONSE vs CAPACITIVE LOAD 50 2 Normalized Gain to Capacitive Load (dB) 45 40 35 RS (Ω) 200 LARGE-SIGNAL PULSE RESPONSE SMALL-SIGNAL PULSE RESPONSE 400 Output Voltage (100mV/div) 150 Frequency (MHz) Frequency (MHz) 30 25 20 15 10 5 CL = 10pF 0 CL = 100pF –2 CL = 22pF +5V 804Ω –4 0.1µF VI 804Ω RS 1/2 OPA2677 –6 CL VO 1kΩ CL = 47pF 453Ω –8 150Ω 1kΩ Load Optional. 0.1µF 0 –10 1 10 100 1000 Capacitive Load (pF) 10M 100M 1G Frequency (Hz) OPA2677 SBOS126I 1M www.ti.com 11 TYPICAL CHARACTERISTICS: VS = +5V (Cont.) At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs FREQUENCY –50 –50 VO = 2VPP RL = 100Ω to VS/2 f = 5MHz RL = 100Ω to VS/2 –55 Harmonic Distortion (dBc) Harmonic Distortion (dBc) –55 –60 –65 2nd-Harmonic –70 –75 3rd-Harmonic –80 –60 –65 –70 Single Channel —see Figure 3 –75 2nd-Harmonic –80 –85 –85 3rd-Harmonic Single Channel—see Figure 3 –90 –90 0.1 1 10 0.1 20 1 HARMONIC DISTORTION vs NONINVERTING GAIN –50 –60 VO = 2VPP f = 5MHz RL = 100Ω to VS/2 –55 Harmonic Distortion (dBc) Harmonic Distortion (dBc) HARMONIC DISTORTION vs INVERTING GAIN –50 VO = 2VPP f = 5MHz RL = 100Ω to VS/2 –55 –65 2nd-Harmonic –70 3rd-Harmonic –75 –80 –85 –60 2nd-Harmonic –65 –70 3rd-Harmonic –75 –80 –85 Single Channel—see Figure 3 Single Channel—see Figure 4 –90 –90 1 –1 10 –10 Gain Magnitude (V/V) Gain (V/V) HARMONIC DISTORTION vs LOAD RESISTANCE 2-TONE, 3rd-ORDER SPURIOUS LEVEL –50 –50 VO = 2VPP f = 5MHz Single Channel—see Figure 3 3rd-Order Spurious Level (dBc) Harmonic Distortion (dBc) –55 2nd-Harmonic –60 –65 –70 3rd-Harmonic –75 –80 –85 –55 –60 20MHz –65 –70 –75 10MHz –80 5MHz –85 Single Channel—see Figure 3 –90 1MHz –90 10 100 1000 Load Resistance (Ω) 12 2 Output Voltage (VPP) Frequency (MHz) –10 –5 0 5 10 Single-Tone Load Power (dBm) OPA2677 www.ti.com SBOS126I TYPICAL CHARACTERISTICS: VS = +5V (Cont.) At TA = +25°C, Differential Gain = +9, RF = 316Ω, and RL = 70Ω, unless otherwise noted. DIFFERENTIAL PERFORMANCE TEST CIRCUIT DIFFERENTIAL SMALL-SIGNAL FREQUENCY RESPONSE 3 Normalized Gain (dB) 1/2 OPA2677 RF 300Ω VI RL RG VO RF 300Ω CG GD = +2 RF = 511Ω 0 GD = +5 RF = 422Ω RL = 70Ω –3 GD = +9 RF = 316Ω –6 –9 1/2 OPA2677 –12 2 • RF GD = 1 + RG = 10 VO DIFFERENTIAL LARGE-SIGNAL FREQUENCY RESPONSE –65 GD = +9 f = 5MHz VO = 2VPP Gain (dB) RL = 70Ω GD = +9 Harmonic Distortion (dBc) 0.2VPP 18 1VPP 2VPP 17 5VPP 16 15 14 –70 3rd-Harmonic –75 –80 2nd-Harmonic –85 –90 –95 10 100 10 100 Frequency (MHz) 1k Load Resistance (Ω) HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT VOLTAGE –60 –65 GD = +9 RL = 70Ω VO = 2VPP –65 Harmonic Distortion (dB) Harmonic Distortion (dBc) 200 HARMONIC DISTORTION vs LOAD RESISTANCE 20 19 100 Frequency (MHz) VI 2nd-Harmonic –70 –75 –80 f = 5MHz G = +9 RL = 70Ω –70 3rd-Harmonic 2nd-Harmonic –75 –80 3rd-Harmonic –85 –85 0.1 1 10 100 0.1 Frequency (MHz) OPA2677 SBOS126I 1 10 Differential Output Voltage (VPP) www.ti.com 13 APPLICATION INFORMATION WIDEBAND CURRENT-FEEDBACK OPERATION The OPA2677 gives the exceptional AC performance of a wideband current-feedback op amp with a highly linear, highpower output stage. Requiring only 9mA/ch quiescent current, the OPA2677 swings to within 1V of either supply rail and delivers in excess of 380mA at room temperature. This low-output headroom requirement, along with supply voltage independent biasing, gives remarkable single (+5V) supply operation. The OPA2677 delivers greater than 150MHz bandwidth driving a 2VPP output into 100Ω on a single +5V supply. Previous boosted output stage amplifiers typically suffer from very poor crossover distortion as the output current goes through zero. The OPA2677 achieves a comparable power gain with much better linearity. The primary advantage of a current-feedback op amp over a voltage-feedback op amp is that AC performance (bandwidth and distortion) is relatively independent of signal gain. Figure 1 shows the DC-coupled, gain of +4, dual power-supply circuit configuration used as the basis of the ±6V Electrical and Typical Characteristics. For test purposes, the input impedance is set to 50Ω with a resistor to ground and the output impedance is set to 50Ω with a series output resistor. Voltage swings reported in the electrical characteristics are taken directly at the input and output pins, whereas load powers (dBm) are defined at a matched 50Ω load. For the circuit of Figure 1, the total effective load is 100Ω || 535Ω = 84Ω. 0.1µF +6V +VS 6.8µF + 50Ω Source VI 50Ω VO 1/2 OPA2677 50Ω 50Ω Load RF 402Ω RG 133Ω + 6.8µF 0.1µF –VS –6V FIGURE 1. DC-Coupled, G = +4, Bipolar Supply, Specification and Test Circuit. 14 Figure 2 shows the DC-coupled, bipolar supply circuit configuration used as the basis for the Inverting Gain ±6V Typical Characteristics. Key design considerations of the inverting configuration are developed in the Inverting Amplifier Operation section. +5V Power-supply decoupling not shown. 1/2 OPA2677 50Ω Source RF 402Ω –5V VO 50Ω 50Ω Load RF 402Ω VI RM 100Ω FIGURE 2. DC-Coupled, G = –4, Bipolar Supply, Specification and Test Circuit. Figure 3 shows the AC-coupled, gain of +4, single-supply circuit configuration used as the basis of the +5V Electrical and Typical Characteristics. Though not a rail-to-rail design, the OPA2677 requires minimal input and output voltage headroom compared to other very wideband current-feedback op amps. It will deliver a 3VPP output swing on a single +5V supply with greater than 100MHz bandwidth. The key requirement of broadband single-supply operation is to maintain input and output signal swings within the usable voltage ranges at both the input and the output. The circuit of Figure 3 establishes an input midpoint bias using a simple resistive divider from the +5V supply (two 806Ω resistors). The input signal is then AC-coupled into this midpoint voltage bias. The input voltage can swing to within 1.3V of either supply pin, giving a 2.4VPP input signal range centered between the supply pins. The input impedance matching resistor (57.6Ω) used for testing is adjusted to give a 50Ω input match when the parallel combination of the biasing divider network is included. The gain resistor (RG) is AC-coupled, giving the circuit a DC gain of +1—which puts the input DC bias voltage (2.5V) on the output as well. The feedback resistor value is adjusted from the bipolar supply condition to re-optimize for a flat frequency response in +5V, gain of +4, operation. Again, on a single +5V supply, the output voltage can swing to within 1V of either supply pin while delivering more than 200mA output current. A demanding 100Ω load to a midpoint bias is used in this characterization circuit. The new output stage used in the OPA2677 can deliver large bipolar output currents into this midpoint load with minimal crossover distortion, as shown by the +5V supply, harmonic distortion plots. OPA2677 www.ti.com SBOS126I where the input is brought into the OPA2677. Each has its advantages and disadvantages. Figure 5 shows a basic starting point for noninverting differential I/O applications. +5V +VS 0.1µF + 6.8µF 806Ω +6 0.1µF VI 57.6Ω 1/2 OPA2677 806Ω VO 1/2 OPA2677 100Ω VS/2 RF 300Ω RF 453Ω VI RG 150Ω RG 75Ω CG RL VO RF 300Ω 0.1µF 1/2 OPA2677 FIGURE 3. AC-Coupled, G = +4, Single-Supply, Specification and Test Circuit. The last configuration used as the basis of the +5V Electrical and Typical Characteristics is shown in Figure 4. Design considerations for this inverting, bipolar supply configuration are covered either in single-supply configuration (as shown in Figure 3) or in the Inverting Amplifier Operation section. +5V 0.1µF 806Ω 1/2 806Ω OPA2677 RG 0.1µF 113Ω VO + GD = 1 + –6 RG = VO VI FIGURE 5. Noninverting Differential I/O Amplifier. This approach provides for a source termination impedance that is independent of the signal gain. For instance, simple differential filters may be included in the signal path right up to the noninverting inputs without interacting with the gain setting. The differential signal gain for the circuit of Figure 5 is: AD = 1 + 2 • RF/RG 6.8µF 100Ω VS/2 RF 453Ω VI RM 88.7Ω FIGURE 4. AC-Coupled, G = –4, Single-Supply, Specification and Test Circuit. DIFFERENTIAL INTERFACE APPLICATIONS Dual op amps are particularly suitable to differential input to differential output applications. Typically, these fall into either Analog-to-Digital Converter (ADC) input interface or line driver applications. Two basic approaches to differential I/O are noninverting or inverting configurations. Since the output is differential, the signal polarity is somewhat meaningless— the noninverting and inverting terminology applies here to Since the OPA2677 is a current feedback (CFB) amplifier, its bandwidth is principally controlled with the feedback resistor value; Figure 5 shows a value of 300Ω for the AD = +9 design. The differential gain, however, may be adjusted with considerable freedom using just the RG resistor. In fact, RG may be a reactive network providing a very isolated shaping to the differential frequency response. Various combinations of single-supply or AC-coupled gain can also be delivered using the basic circuit of Figure 5. Common-mode bias voltages on the two noninverting inputs pass on to the output with a gain of 1 since an equal DC voltage at each inverting node creates no current through RG. This circuit does show a common-mode gain of 1 from input to output. The source connection should either remove this common-mode signal if undesired (using an input transformer can provide this function), or the common-mode voltage at the inputs can be used to set the output commonmode bias. If the low common-mode rejection of this circuit is a problem, the output interface may also be used to reject that common-mode. For instance, most modern differential input ADCs reject common-mode signals very well, while a line driver application through a transformer will also attenuate the common-mode signal through to the line. OPA2677 SBOS126I 2 • RF www.ti.com 15 SINGLE-SUPPLY ADSL UPSTREAM DRIVER OPA2677 HDSL2 UPSTREAM DRIVER Figure 6 shows an example of a single-supply ADSL upstream driver. The dual OPA2677 is configured as a differential gain stage to provide signal drive to the primary winding of the transformer (here, a step-up transformer with a turns ratio of 1:1.7). The main advantage of this configuration is the cancellation of all even harmonic distortion products. Another important advantage for ADSL is that each amplifier needs only to swing half of the total output required driving the load. Figure 7 shows an HDSL2 implementation of a single-supply upstream driver. The two designs differ by the values of their matching impedance, the load impedance, and the ratio turns of the transformers. All these differences are reflected in the higher peak current and thus, the higher maximum power dissipation in the output of the driver. +12V +12V 20Ω 20Ω 1/2 OPA2677 1/2 OPA2677 RF 324Ω 0.1µF AFE 2VPP Max Assumed +6V 0.1µF IP = 128mA RM 17.4Ω 1:1.7 RG 82.5Ω 2kΩ 1µF 2kΩ 0.1µF AFE 2VPP Max Assumed ZLINE 17.7VPP RF RM 17.4Ω 100Ω +6V 0.1µF IP = 185mA RM 11.5Ω 1:2.4 324Ω 2kΩ 2kΩ 82.5Ω ZLINE 17.3VPP 135Ω RM 11.5Ω 1µF 324Ω 324Ω IP = 185mA IP = 128mA 20Ω 20Ω 1/2 OPA2677 1/2 OPA2677 FIGURE 6. Single-Supply ADSL Upstream Driver. FIGURE 7. HDSL2 Upstream Driver. The analog front end (AFE) signal is AC-coupled to the driver, and the noninverting input of each amplifier is biased to the mid-supply voltage (+6V in this case). In addition to providing the proper biasing to the amplifier, this approach also provides a high-pass filtering with a corner frequency, set here at 5kHz. As the upstream signal bandwidth starts at 26kHz, this high-pass filter does not generate any problem and has the advantage of filtering out unwanted lower frequencies. LINE DRIVER HEADROOM MODEL The input signal is amplified with a gain set by the following equation: 2 • RF GD = 1 + RG Refer to the Setting Resistor Values to Optimize Bandwidth section for a discussion on which feedback resistor value to choose. The two back-termination resistors (17.4Ω each) added at each terminal of the transformer make the impedance of the modem match the impedance of the phone line, and also provide a means of detecting the received signal for the receiver. The value of these resistors (RM) is a function of the line impedance and the transformer turns ratio (n), given by the following equation: 16 ZLINE 2n 2 PL = 10 • log (2) VRMS 2 (1mW) • RL (3) with PL power at the load, VRMS voltage at the load, and RL load impedance; this gives the following: VRMS = (1) With RF = 324Ω and RG = 82.5Ω, the gain for this differential amplifier is 8.85. This gain boosts the AFE signal, assumed to be a maximum of 2VPP, to a maximum of 17.3VPP. RM = The first step in a transformer-coupled, twisted-pair driver design is to compute the peak-to-peak output voltage from the target specifications. This is done using the following equations: (1mW) • RL PL • 10 10 VP = Crest Factor • VRMS = CF • (4) VRMS (5) with VP peak voltage at the load and CF Crest Factor. VLPP = 2 • CF • VRMS (6) with VLPP: peak-to-peak voltage at the load. Consolidating Equations 3 through 6 allows expressing the required peak-to-peak voltage at the load as a function of the crest factor, the load impedance, and the power at the load. Thus, PL VLPP = 2 • CF • (1mW) • RL • 10 10 (7) This VLPP is usually computed for a nominal line impedance and may be taken as a fixed design target. The next step in the design is to compute the individual amplifier output voltage and currents as a function of VPP on OPA2677 www.ti.com SBOS126I the line and transformer turns ratio. As this turns ratio changes, the minimum allowed supply voltage changes along with it. The peak current in the amplifier output is given by: ±IP = 1 2 • VLPP 1 • • n 2 4RM (8) with VPP as defined in Equation 7, and RM as defined in Equation 2 and shown in Figure 8. TOTAL DRIVER POWER FOR xDSL APPLICATIONS The total internal power dissipation for the OPA2677 in an xDSL line driver application will be the sum of the quiescent power and the output stage power. The OPA2677 holds a relatively constant quiescent current versus supply voltage— giving a power contribution that is simply the quiescent current times the supply voltage used (the supply voltage will be greater than the solution given in Equation 10). The total output stage power may be computed with reference to Figure 10. RM Vpp = 2VLpp n VLpp n RL VLpp +VCC IAVG = RM FIGURE 8. Driver Peak Output Voltage. IP CF RT With the previous information available, it is now possible to select a supply voltage and the turns ratio desired for the transformer as well as calculate the headroom for the OPA2677. The model, shown in Figure 9, can be described with the following set of equations: 1) As available output swing: FIGURE 10. Output Stage Power Model. VPP = VCC – (V1 + V2) – IP • (R1 + R2) (9) 2) Or as required supply voltage: VCC = VPP + (V1 + V2) + IP • (R1 + R2) (10) The minimum supply voltage for a power and load requirement is given by Equation 10. +VCC R1 V1 The two output stages used to drive the load of Figure 8 can be seen as an H-Bridge in Figure 10. The average current drawn from the supply into this H-Bridge and load will be the peak current in the load given by Equation 8 divided by the crest factor (CF) for the xDSL modulation. This total power from the supply is then reduced by the power in RT to leave the power dissipated internal to the drivers in the four output stage transistors. That power is simply the target line power used in Equation 3 plus the power lost in the matching elements (RM). In the examples here, a perfect match is targeted giving the same power in the matching elements as in the load. The output stage power is then set by Equation 11. IP × VCC – 2PL CF The total amplifier power is then: POUT = VO IP V2 PTOT = Iq × VCC + R2 FIGURE 9. Line Driver Headroom Model. V1, V2, R1, and R2 are given in Table I for both +12V and +5V operation. +5V +12V V1 R1 V2 R2 0.9V 0.9V 5Ω 2Ω 0.8V 0.9V 5Ω 2Ω IP × VCC – 2PL CF (11) (12) For the ADSL CPE upstream driver design of Figure 6, the peak current is 128mA for a signal that requires a crest factor of 5.33 with a target line power of 13dBm into 100Ω (20mW). With a typical quiescent current of 18mA and a nominal supply voltage of +12V, the total internal power dissipation for the solution of Figure 6 will be: (13) PTOT = 18mA(12V) + 128mA (12V) – 2(20mW) = 464mW 5.33 TABLE I. Line Driver Headroom Model Values. OPA2677 SBOS126I www.ti.com 17 DESIGN-IN TOOLS DEMONSTRATION FIXTURES VI α A printed circuit board (PCB) is available to assist in the initial evaluation of circuit performance using the OPA2677. The fixture is offered free of charge as unpopulated PCB, delivered with a user’s guide. The summary information for this fixture is shown in Table II. PRODUCT PACKAGE ORDERING NUMBER LITERATURE NUMBER OPA2677U OPA2677IDDA OPA2677T OPA2677IRGV SO-8 HSOP-8 SO-16 QFN-16 DEM-OPA-SO-2A Not Available Not Available Not Available SBOU003 Not Available Not Available Not Available VO RI Z(S) IERR IERR RF RG FIGURE 11. Current Feedback Transfer Function Analysis Circuit. TABLE II. Demonstration Fixtures by Package. This demonstration fixture can be requested at the Texas Instruments web site (www.ti.com) through the OPA2677 product folder. The buffer gain is typically very close to 1.00 and is normally neglected from signal gain considerations. It sets the CMRR, however, for a single op amp differential amplifier configuration. For a buffer gain α < 1.0, the CMRR = –20 • log (1 – α)dB. MACROMODELS AND APPLICATIONS SUPPORT RI, the buffer output impedance, is a critical portion of the bandwidth control equation. The OPA2677 inverting input resistor is typically 22Ω. Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This is particularly true for video and RF amplifier circuits where parasitic capacitance and inductance can have a major effect on circuit performance. A SPICE model for the OPA2677 is available through the TI web site (www.ti.com). This model does a good job of predicting small-signal AC and transient performance under a wide variety of operating conditions, but does not do as well in predicting the harmonic distortion or dG/dP characteristics. This model does not attempt to distinguish between the package types in small-signal AC performance, nor does it attempt to simulate channel-to-channel coupling. A current-feedback op amp senses an error current in the inverting node (as opposed to a differential input error voltage for a voltage-feedback op amp) and passes this on to the output through an internal frequency dependent transimpedance gain. The Typical Characteristics show this open-loop transimpedance response, which is analogous to the openloop voltage gain curve for a voltage-feedback op amp. Developing the transfer function for the circuit of Figure 11 gives Equation 14: R α1 + F RG VO α • NG = = R VI F + RI NG R RF + RI 1 + F 1 + Z(s) RG 1+ Z(s) OPERATING SUGGESTIONS SETTING RESISTOR VALUES TO OPTIMIZE BANDWIDTH A current-feedback op amp like the OPA2677 can hold an almost constant bandwidth over signal gain settings with the proper adjustment of the external resistor values, which is shown in the Typical Characteristics; the small-signal bandwidth decreases only slightly with increasing gain. These curves also show that the feedback resistor is changed for each gain setting. The resistor values on the inverting side of the circuit for a current-feedback op amp can be treated as frequency response compensation elements, whereas their ratios set the signal gain. Figure 11 shows the small-signal frequency response analysis circuit for the OPA2677. RF NG = 1 + R G This is written in a loop-gain analysis format where the errors arising from a non-infinite open-loop gain are shown in the denominator. If Z(s) is infinite over all frequencies, the denominator of Equation 14 reduces to 1 and the ideal desired signal gain shown in the numerator is achieved. The fraction in the denominator of Equation 14 determines the frequency response. Equation 15 shows this as the loop-gain equation: Z(s) = Loop Gain RF + RI NG The key elements of this current-feedback op amp model are: α → Buffer gain from the noninverting input to the inverting input RI → Buffer output impedance iERR → Feedback error current signal Z(S) → Frequency dependent open-loop transimpedance gain from iERR to VO 18 (14) (15) If 20log(RF + NG • RI) is drawn on top of the open-loop transimpedance plot, the difference between the two would be the loop gain at a given frequency. Eventually, Z(s) rolls off to equal the denominator of Equation 15, at which point the loop gain has reduced to 1 (and the curves have intersected). This point of equality is where the amplifier closed-loop OPA2677 www.ti.com SBOS126I frequency response given by Equation 14 starts to roll off, and is exactly analogous to the frequency at which the noise gain equals the open-loop voltage gain for a voltage-feedback op amp. The difference here is that the total impedance in the denominator of Equation 15 may be controlled somewhat separately from the desired signal gain (or NG). The OPA2677 is internally compensated to give a maximally flat frequency response for RF = 402Ω at NG = 4 on ±6V supplies. Evaluating the denominator of Equation 15 (which is the feedback transimpedance) gives an optimal target of 490Ω. As the signal gain changes, the contribution of the NG • RI term in the feedback transimpedance changes, but the total can be held constant by adjusting RF. Equation 16 gives an approximate equation for optimum RF over signal gain: RF = 490 – NG • RI (16) As the desired signal gain increases, this equation eventually predicts a negative RF. A somewhat subjective limit to this adjustment can also be set by holding RG to a minimum value of 20Ω. Lower values load both the buffer stage at the input and the output stage if RF gets too low—actually decreasing the bandwidth. Figure 12 shows the recommended RF versus NG for both ±6V and a single +5V operation. The values for RF versus gain shown here are approximately equal to the values used to generate the Typical Characteristics. They differ in that the optimized values used in the Typical Characteristics are also correcting for board parasitic not considered in the simplified analysis leading to Equation 16. The values shown in Figure 12 give a good starting point for designs where bandwidth optimization is desired. is essential for power-supply ripple rejection, noninverting input noise current shunting, and to minimize the highfrequency value for RI in Figure 11. INVERTING AMPLIFIER OPERATION The OPA2677 is a general-purpose, wideband current-feedback op amp; most of the familiar op amp application circuits should be available to the designer. Those dual op amp applications that require considerable flexibility in the feedback element (for example, integrators, transimpedance, and some filters) should consider a unity-gain stable, voltagefeedback amplifier such as the OPA2822, because the feedback resistor is the compensation element for a currentfeedback op amp. Wideband inverting operation (and especially summing) is particularly suited to the OPA2677. Figure 13 shows a typical inverting configuration where the I/O impedances and signal gain from Figure 1 are retained in an inverting circuit configuration. In the inverting configuration, two key design considerations +6V Power-supply decoupling not shown. 50Ω Load 1/2 OPA2677 50Ω Source VO 50Ω RF 392Ω RG 97.6Ω VI VO RM 102Ω The total impedance going into the inverting input may be VI =– RF RG = –4 –6V Feedback Resistor (Ω) 600 FIGURE 13. Inverting Gain of –4 with Impedance Matching. must be noted. The first is that the gain resistor (RG) becomes part of the signal source input impedance. If input impedance matching is desired (which is beneficial whenever the signal is coupled through a cable, twisted pair, long PC board trace or other transmission line conductor), it is normally necessary to add an additional matching resistor to ground. RG, by itself, is not normally set to the required input impedance since its value, along with the desired gain, will determine an RF, which may be non-optimal from a frequency response standpoint. The total input impedance for the source becomes the parallel combination of RG and RM. 500 +5V 400 300 ±5V 200 0 5 10 15 20 25 Noise Gain FIGURE 12. Feedback Resistor vs. Noise Gain. used to adjust the closed-loop signal bandwidth. Inserting a series resistor between the inverting input and the summing junction increases the feedback impedance (denominator of Equation 15), decreasing the bandwidth. The internal buffer output impedance for the OPA2677 is slightly influenced by the source impedance looking out of the noninverting input terminal. High-source resistors have the effect of increasing RI, decreasing the bandwidth. For those single-supply applications which develop a midpoint bias at the noninverting input through high-valued resistors, the decoupling capacitor The second major consideration, touched on in the previous paragraph, is that the signal source impedance becomes part of the noise gain equation and has a slight effect on the bandwidth through Equation 15. The values shown in Figure 12 have accounted for this by slightly decreasing RF (from the optimum values) to re-optimize the bandwidth for the noise gain of Figure 12 (NG = 3.98). In the example of Figure 13, the RM value combines in parallel with the external 50Ω source impedance, yielding an effective driving impedance of 50Ω || 102Ω = 33.5Ω. This impedance is added in series with RG for calculating the noise gain—which gives NG = 3.98. This value, along with the inverting input impedance of 22Ω, are inserted into Equation 16 to get a feedback OPA2677 SBOS126I www.ti.com 19 transimpedance nearly equal to the 402Ω optimum value. Note that the noninverting input in this bipolar supply inverting application is connected directly to ground. It is often suggested that an additional resistor be connected to ground on the noninverting input to achieve bias current error cancellation at the output. The input bias currents for a currentfeedback op amp are not generally matched in either magnitude or polarity. Connecting a resistor to ground on the noninverting input of the OPA2677 in the circuit of Figure 13 actually provides additional gain for that input bias and noise currents, but does not decrease the output DC error since the input bias currents are not matched. OUTPUT CURRENT AND VOLTAGE The OPA2677 provides output voltage and current capabilities that are unsurpassed in a low-cost dual monolithic op amp. Under no-load conditions at 25°C, the output voltage typically swings closer than 1V to either supply rail; tested at +25°C swing limit is within 1.1V of either rail. Into a 6Ω load (the minimum tested load), it delivers more than ±380mA continuous and > ±1.2A peak output current. The specifications described above, though familiar in the industry, consider voltage and current limits separately. In many applications, it is the voltage times current (or V-I product) that is more relevant to circuit operation. Refer to the Output Voltage and Current Limitations plot in the Typical Characteristics. The X and Y axes of this graph show the zero-voltage output current limit and the zero-current output voltage limit, respectively. The four quadrants give a more detailed view of the OPA2677 output drive capabilities, noting that the graph is bounded by a safe operating area of 1W maximum internal power dissipation (in this case for 1 channel only). Superimposing resistor load lines onto the plot shows that the OPA2677 can drive ±4V into 10Ω or ±4.5V into 25Ω without exceeding the output capabilities or the 1W dissipation limit. A 100Ω load line (the standard test circuit load) shows the full ±5.0V output swing capability, as shown in the Electrical Characteristics tables. The minimum specified output voltage and current over temperature are set by worst-case simulations at the cold temperature extreme. Only at cold startup will the output current and voltage decrease to the numbers shown in the Electrical Characteristics tables. As the output transistors deliver power, the junction temperatures increases, decreasing the VBEs (increasing the available output voltage swing), and increasing the current gains (increasing the available output current). In steady-state operation, the available output voltage and current will always be greater than that shown in the over-temperature specifications, since the output stage junction temperatures will be higher than the minimum specified operating ambient. To maintain maximum output stage linearity, no output short-circuit protection is provided. This is normally not a problem because most applications include a series-matching resistor at the output that limits the internal power dissipation if the output side of this resistor is shorted to ground. However, shorting the output pin directly to the adjacent positive power-supply pin (8-pin package), will in most cases, destroy the amplifier. If additional short-circuit protection is required, consider using the equivalent OPA2674 that includes output current limiting. Alternatively, a small series 20 resistor may be included in the supply lines. Under heavy output loads this will reduce the available output voltage swing. A 5Ω series resistor in each power-supply lead will limit the internal power dissipation to less than 1W for an output short circuit while decreasing the available output voltage swing only 0.5V for up to 100mA desired load currents. Always place the 0.1µF power-supply decoupling capacitors after these supply current limiting resistors directly on the supply pins. DRIVING CAPACITIVE LOADS One of the most demanding and yet very common load conditions for an op amp is capacitive loading. Often, the capacitive load is the input of an analog-to-digital (A/D) converter—including additional external capacitance that may be recommended to improve the A/D converter linearity. A high-speed, high open-loop gain amplifier such as the OPA2677 can be very susceptible to decreased stability and closed-loop response peaking when a capacitive load is placed directly on the output pin. When the amplifier openloop output resistance is considered, this capacitive load introduces an additional pole in the signal path that can decrease the phase margin. Several external solutions to this problem have been suggested. When the primary considerations are frequency response flatness, pulse response fidelity, and/or distortion, the simplest and most effective solution is to isolate the capacitive load from the feedback loop by inserting a series isolation resistor between the amplifier output and the capacitive load. This does not eliminate the pole from the loop response, but rather shifts it and adds a zero at a higher frequency. The additional zero acts to cancel the phase lag from the capacitive load pole, thus increasing the phase margin and improving stability. The Typical Characteristics show the recommended RS vs Capacitive Load and the resulting frequency response at the load. Parasitic capacitive loads greater than 2pF can begin to degrade the performance of the OPA2677. Long PC board traces, unmatched cables, and connections to multiple devices can easily cause this value to be exceeded. Always consider this effect carefully, and add the recommended series resistor as close as possible to the OPA2677 output pin (see the Board Layout Guidelines section). DISTORTION PERFORMANCE The OPA2677 provides good distortion performance into a 100Ω load on ±6V supplies. Relative to alternative solutions, it provides exceptional performance into lighter loads and/or operation on a single +5V supply. Generally, until the fundamental signal reaches very high frequency or power levels, the 2nd-harmonic dominates the distortion with a negligible 3rd-harmonic component. Focusing then on the 2nd-harmonic, increasing the load impedance improves distortion directly. Remember that the total load includes the feedback network—in the noninverting configuration (see Figure 1), this is the sum of RF + RG, whereas in the inverting configuration it is just RF. Also, providing an additional supply decoupling capacitor (0.01µF) between the supply pins (for bipolar operation) improves the 2nd-order distortion slightly (3dB to 6dB). OPA2677 www.ti.com SBOS126I In most op amps, increasing the output voltage swing increases harmonic distortion directly. The Typical Characteristics show the 2nd-harmonic increasing at a little less than the expected 2x rate whereas the 3rd-harmonic increases at a little less than the expected 3x rate. Where the test power doubles, the difference between it and the 2nd-harmonic decreases less than the expected 6dB, whereas the difference between it and the 3rd-harmonic decreases by less than the expected 12dB. This also shows up in the 2-tone, 3rd-order intermodulation spurious (IM3) response curves. The 3rd-order spurious levels are extremely low at low-output power levels. The output stage continues to hold them low even as the fundamental power reaches very high levels. As the Typical Characteristics show, the spurious intermodulation powers do not increase as predicted by a traditional intercept model. As the fundamental power level increases, the dynamic range does not decrease significantly. For 2-tone centered at 20MHz, with 10dBm/tone into a matched 50Ω load (that is, 2VPP for each tone at the load, which requires 8VPP for the overall 2-tone envelope at the output pin), the Typical Characteristics show 63dBc difference between the test-tone power and the 3rd-order intermodulation spurious levels. This exceptional performance improves further when operating at lower frequencies. NOISE PERFORMANCE Wideband current-feedback op amps generally have a higher output noise than comparable voltage-feedback op amps. The OPA2677 offers an excellent balance between voltage and current noise terms to achieve low output noise. The inverting current noise (24pA/√Hz) is significantly lower than earlier solutions whereas the input voltage noise (2.0nV/ √Hz) is lower than most unity-gain stable, wideband voltagefeedback op amps. This low input voltage noise is achieved at the price of higher noninverting input current noise (16pA/ √Hz). As long as the AC source impedance looking out of the noninverting node is less than 100Ω, this current noise does not contribute significantly to the total output noise. The op amp input voltage noise and the two input current noise terms combine to give low output noise under a wide variety of operating conditions. Figure 14 shows the op amp noise analysis model with all the noise terms included. In this model, all noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz. The total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. Equation 17 shows the general form for the output noise voltage using the terms shown in Figure 13. (17) 2 2 EO = ENI2 + (IBN • R S ) + 4kTRS + (IBI • RF ) + 4kTRFNG Dividing this expression by the noise gain (NG = (1 + RF/RG)) gives the equivalent input referred spot noise voltage at the noninverting input, as shown in Equation 18. (18) 2 4kTRF 2 I • RF EN = ENI2 + (IBN • R S ) + 4kTRS + BI + NG NG Evaluating these two equations for the OPA2677 circuit and component values (see Figure 1) gives a total output spot noise voltage of 13.5nV/√Hz and a total equivalent input spot noise voltage of 3.3nV/√Hz. This total input referred spot noise voltage is higher than the 2.0nV/√Hz specification for the op amp voltage noise alone. This reflects the noise added to the output by the inverting current noise times the feedback resistor. If the feedback resistor is reduced in high-gain configurations (as suggested previously), the total input referred voltage noise given by Equation 18 approaches just the 2.0nV/ √Hz of the op amp. For example, going to a gain of +10 using RF = 298Ω gives a total input referred noise of 2.3nV/√Hz. DIFFERENTIAL NOISE PERFORMANCE As the OPA2677 is used as a differential driver in xDSL applications, it is important to analyze the noise in such a configuration. Figure 15 shows the op amp noise model for the differential configuration. IN Driver EN RS IN ERS RF √4kTRF √4kTRS RG EO 2 ENI √4kTRG RF 1/2 OPA2677 RS √4kTRF EO IN IBN ERS RF √4kTRS 4kT RG RG IBI IN ERS 4kT = 1.6E –20J at 290°K FIGURE 14. Op Amp Noise Analysis Model. √4kTRS FIGURE 15. Differential Op Amp Noise Analysis Model. OPA2677 SBOS126I EN RS √4kTRF www.ti.com 21 As a reminder, the differential gain is expressed as: GD = 1 + 2 • RF RG (19) The output noise can be expressed as shown below: (20) 2 2 EO = 2 • GD 2 • eN2 + (iN • R S ) + 4kTRS + 2(iIRF ) + 2(4kTRF GD ) Dividing this expression by the differential noise gain (GD = (1 + 2RF/RG)) gives the equivalent input referred spot noise voltage at the noninverting input, as shown in Equation 21. (21) 2 power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipation in the output stage (PDL) to deliver load power. Quiescent power is the specified no-load supply current times the total supply voltage across the part. PDL depends on the required output signal and load, but for a grounded resistive load, PDL is at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for equal bipolar supplies). Under this condition, PDL = VS2 /(4 • RL) where RL includes feedback network loading. Note that it is the power in the output stage and not into the load that determines internal power dissipation. As a worst-case example, compute the maximum TJ using an OPA2677 SO-8 in the circuit of Figure 1 operating at the maximum specified ambient temperature of +85°C with both outputs driving a grounded 20Ω load to +2.5V. iR 4kTRF 2 EO = 2 • eN2 + (iN • R S ) + 4kTRS + 2 I F + 2 GD GD Maximum TJ = +85°C + (0.83 • 125°C/W) = 170°C Evaluating these equations for the OPA2677 ADSL circuit and component values of Figure 6 gives a total output spot noise voltage of 31.8nV/√Hz and a total equivalent input spot noise voltage of 3.6nV/√Hz. This absolute worst-case condition exceeds specified maximum junction temperature. This extreme case is not normally encountered. Where high internal power dissipation is anticipated, consider the thermal slug package version. In order to minimize the output noise due to the noninverting input bias current noise, it is recommended to keep the noninverting source impedance as low as possible. BOARD LAYOUT GUIDELINES DC ACCURACY AND OFFSET CONTROL A current-feedback op amp such as the OPA2677 provides exceptional bandwidth in high gains, giving fast pulse settling but only moderate DC accuracy. The Electrical Characteristics show an input offset voltage comparable to high-speed, voltage-feedback amplifiers; however, the two input bias currents are somewhat higher and are unmatched. While bias current cancellation techniques are very effective with most voltage-feedback op amps, they do not generally reduce the output DC offset for wideband current-feedback op amps. Because the two input bias currents are unrelated in both magnitude and polarity, matching the input source impedance to reduce error contribution to the output is ineffective. Evaluating the configuration of Figure 1, using worst-case +25°C input offset voltage and the two input bias currents, gives a worst-case output offset range equal to: VOFF = ± (NG • VOS(MAX)) + (IBN • RS/2 • NG) ± (IBI • RF) where NG = noninverting signal gain = ± (4 • 4.5mV) + (30µA • 25Ω • 4) ± (402Ω • 30µA) = ±18mV + 3mV ± 12.06mV VOFF = –29.06mV to +35.06mV THERMAL ANALYSIS Due to the high output power capability of the OPA2677, heatsinking or forced airflow may be required under extreme operating conditions. Maximum desired junction temperature sets the maximum allowed internal power dissipation as described below. In no case should the maximum junction temperature be allowed to exceed 175°C. Operating junction temperature (TJ) is given by TA + PD • θJA. The total internal 22 PD = 12V • 18mA + 2 • [62 / (4 • (20Ω || 534Ω))] = 882mW Achieving optimum performance with a high-frequency amplifier like the OPA2677 requires careful attention to board layout parasitic and external component types. Recommendations that optimize performance include: a) Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability; on the noninverting input, it can react with the source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. b) Minimize the distance (< 0.25") from the power-supply pins to high-frequency 0.1µF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections (on pins 4 and 7) should always be decoupled with these capacitors. An optional supply decoupling capacitor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Larger (2.2µF to 6.8µF) decoupling capacitors, effective at lower frequency, should also be used on the main supply pins. These can be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB. c) Careful selection and placement of external components preserve the high-frequency performance of the OPA2677. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film and carbon composition axially leaded resistors can also provide good high-frequency performance. OPA2677 www.ti.com SBOS126I Again, keep leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Although the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, should also be placed close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. The frequency response is primarily determined by the feedback resistor value as described previously. Increasing the value reduces the bandwidth, whereas decreasing it gives a more peaked frequency response. The 402Ω feedback resistor used in the Typical Characteristics at a gain of +4 on ±6V supplies is a good starting point for design. Note that a 511Ω feedback resistor, rather than a direct short, is recommended for the unity-gain follower application. A current-feedback op amp requires a feedback resistor even in the unity-gain follower configuration to control stability. d) Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50mils to 100mils) should be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set RS from the plot of Recommended RS vs Capacitive Load. Low parasitic capacitive loads (< 5pF) may not need an RS because the OPA2677 is nominally compensated to operate with a 2pF parasitic load. If a long trace is required, and the 6dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50Ω environment is normally not necessary on board; in fact, a higher impedance environment improves distortion (see the distortion versus load plots). With a characteristic board trace impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the output of the OPA2677 is used, as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device. This total effective impedance should be set to match the trace impedance. The high output voltage and current capability of the OPA2677 allows multiple destination devices to be handled as separate transmission lines, each with their own series and shunt terminations. If the 6dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case and set the series resistor value as shown in the plot of RS vs Capacitive Load. However, this does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there is some signal attenuation due to the voltage divider formed by the series output into the terminating impedance. e) Socketing a high-speed part like the OPA2677 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the OPA2677 directly onto the board. f) Use the –VS plane to conduct heat out of the HSOP-8 PowerPAD package (OPA2677IDDA) or the QFN-16 (OPA2677IRGV). These packages attach the die directly to an exposed thermal pad on the bottom, which should be soldered to the board. This pad must be connected electrically to the same voltage plane as the most negative supply applied to the OPA2677 (in Figure 6, this would be ground), which must have a minimum area of 3.5" x 3.5" (88.9mm x 88.9mm) to produce the θJA values in the Electrical Characteristics tables. INPUT AND ESD PROTECTION The OPA2677 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices and are reflected in the absolute maximum ratings table. All device pins have limited ESD protection using internal diodes to the power supplies, as shown in Figure 16. These diodes provide moderate protection to input overdrive voltages above the supplies as well. The protection diodes can typically support 30mA continuous current. Where higher currents are possible (for example, in systems with ±15V supply parts driving into the OPA2677), current-limiting series resistors should be added into the two inputs. Keep these resistor values as low as possible, since high values degrade both noise performance and frequency response. +VS External Pin –VS FIGURE 16. Internal ESD Protection. OPA2677 SBOS126I Internal Circuitry www.ti.com 23 Revision History DATE REVISION PAGE SECTION DESCRIPTION 7/08 I 2 Abs Max Ratings Changed Storage Temperature Range from −40°C to +125°C to −65°C to +125°C. 3/08 H 3 Electrical Characteristics Added Both Channels; Power Supply section under Conditions. 4 Electrical Characteristics Added +5V and Both Channels; Power Supply section under Conditions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 24 OPA2677 www.ti.com SBOS126I PACKAGE OPTION ADDENDUM www.ti.com 9-May-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) OPA2677H OBSOLETE HSOP DTJ 8 TBD Call TI Call TI OPA2677H/2K5 OBSOLETE HSOP DTJ 8 TBD Call TI Call TI -40 to 85 OPA2677H/2K5G3 OBSOLETE HSOP DTJ 8 TBD Call TI Call TI OPA2677HG3 OBSOLETE HSOP DTJ 8 TBD Call TI Call TI -40 to 85 OPA2677IDDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS & no Sb/Br) CU NIPDAU | Call TI Level-3-260C-168 HR -40 to 85 OP2677 OPA2677IDDAG4 ACTIVE SO PowerPAD DDA 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677 OPA2677IDDAR ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | Call TI Level-3-260C-168 HR -40 to 85 OP2677 OPA2677IDDARG4 ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677 OPA2677IRGVR ACTIVE VQFN RGV 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 2677 OPA2677IRGVRG4 ACTIVE VQFN RGV 16 TBD Call TI Call TI -40 to 85 OPA 2677 OPA2677IRGVT ACTIVE VQFN RGV 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 2677 OPA2677IRGVTG4 ACTIVE VQFN RGV 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 2677 OPA2677U ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA2677U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 2677U OPA2677U/2K5G4 ACTIVE SOIC D 8 TBD Call TI Call TI -40 to 85 OPA 2677U OPA2677UG4 ACTIVE SOIC D 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 2677U 75 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 OPA 2677U Samples PACKAGE OPTION ADDENDUM www.ti.com 9-May-2014 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant OPA2677IDDAR SO Power PAD DDA 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA2677IRGVR VQFN RGV 16 2500 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 OPA2677IRGVT VQFN RGV 16 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 OPA2677U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2677IDDAR SO PowerPAD DDA 8 2500 367.0 367.0 35.0 OPA2677IRGVR VQFN RGV 16 2500 367.0 367.0 35.0 OPA2677IRGVT VQFN RGV 16 250 210.0 185.0 35.0 OPA2677U/2K5 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MPDS100 – AUGUST 2001 DTJ (R-PDSO-G8) PLASTIC SMALL–OUTLINE 0.1968 (4,98) C –A– 0.189 (4,80) 8 5 –B– 0.1574 (4,00) D 0.1497 (3,80) 0.244 (6,20) 0.2284 (5,80) 0.010 (0,25) M B M Index Area 1 4 0.050 (1,27) Base Plane 0.018 (0,46) 0.0196 (0,50) 0.016 (0,41) 0.0099 (0,25) × 45° 0.0688 (1,75) –C– Seating Plane 0.0532 (1,35) 0.020 (0,51) 0.004 (0,10) 0.001 (0,03) G 0.013 (0,33) 0.010 (0,25) M C A M B S 0.0098 (0,25) 0.0075 (0,20) 0.004 (0,10) ø0.015 (0,38) M Z X S 0.110 (2,79) 0.090 (2,29) 0°–8° F 0.150 (3,81) 0.130 (3,30) 0.050 (1,27) 0.016 (0,41) Bottom View Heat Sink 4202635/A 08/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body length dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and gate burrs shall not exceed 0.006 (0,15) per side. D. Body width dimension does not include inter–lead flash or protrusions. Inter–lead flash and protrusions shall not exceed 0.010 (0,25) per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. F. Lead dimension is the length of terminal for soldering to a substrate. POST OFFICE BOX 655303 G. The lead width, as measured 0.014 (0,36) or greater above the seating plane, shall not exceed a maximum value of 0.024 (0,61). H. Lead-to-lead coplanarity shall be less than 0.004 (0,10) from Seating Plane. I. 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