TI DRV5053-Q1 Drv5053-q1 automotive analog-bipolar hall effect sensor Datasheet

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DRV5053-Q1
SLIS154 – DECEMBER 2014
DRV5053-Q1 Automotive Analog-Bipolar Hall Effect Sensor
1 Features
2 Applications
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Linear Output Hall Sensor
AEC-Q100 Qualified for Automotive Applications
– Grade 1: TA = –40 to 125°C (Q, See
Figure 17)
– Grade 0: TA = –40 to 150°C (E, See Figure 17)
Superior Temperature Stability
– Sensitivity ±10% Over Temperature
High Sensitivity Options:
– –11 mV/mT (OA, See Figure 17)
– –23 mV/mT (PA)
– –45 mV/mT (RA)
– –90 mV/mT (VA)
– +23 mV/mT (CA)
– +45 mV/mT (EA)
Supports a Wide Voltage Range
– 2.7 to 38 V
– No External Regulator Required
Amplified Output Stage
– 2.3-mA Sink, 300 µA Source
Output Voltage: 0.2 ~ 1.8 V
– B = 0 mT, OUT = 1 V
Fast Power-On: 35 µs
Small Package and Footprint
– Surface Mount 3-Pin SOT-23 (DBZ)
– 2.92 mm × 2.37 mm
– Through-Hole 3-Pin SIP (LPG)
– 4.00 mm × 3.15 mm
Protection Features
– Reverse Supply Protection (up to –22 V)
– Supports up to 40-V Load Dump
– Output Short-Circuit Protection
– Output Current Limitation
– OUT Short to Battery Protection
Flow Meters
Docking Adjustment
Vibration Correction
Damper Controls
3 Description
The DRV5053-Q1 device is a chopper-stabilized Hall
IC that offers a magnetic sensing solution with
superior sensitivity stability over temperature and
integrated protection features.
The 0- to 2-V analog output responds linearly to the
applied magnetic flux density, and distinguishes the
polarity of magnetic field direction. A wide operating
voltage range from 2.7 to 38 V with reverse polarity
protection up to –22 V makes the device suitable for
a wide range of automotive and consumer
applications.
Internal protection functions are provided for reverse
supply conditions, load dump, and output short circuit
or overcurrent.
Device Information(1)
PART NUMBER
DRV5053-Q1
PACKAGE
BODY SIZE (NOM)
SOT-23 (3)
2.92 mm × 2.37 mm
SIP (3)
4.00 mm × 3.15 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Output State
SOT-23
SIP
VOUT (V)
VMAX
VQ
VMIN
BMIN (N)
B (mT)
BMAX (S)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV5053-Q1
SLIS154 – DECEMBER 2014
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Output State ...........................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
4
4
4
4
5
5
5
7
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Magnetic Characteristics...........................................
Typical Characteristics ..............................................
8
Detailed Description .............................................. 8
8.1
8.2
8.3
8.4
9
Overview ................................................................... 8
Functional Block Diagram ......................................... 8
Feature Description................................................... 9
Device Functional Modes........................................ 11
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Applications ................................................ 12
10 Power Supply Recommendations ..................... 14
11 Device and Documentation Support ................. 15
11.1
11.2
11.3
11.4
Device Support......................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
15
16
16
16
12 Mechanical, Packaging, and Orderable
Information ........................................................... 16
5 Revision History
2
DATE
REVISION
NOTES
December 2014
*
Initial release.
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6 Pin Configuration and Functions
For additional configuration information, see Device Markings and Mechanical, Packaging, and Orderable
Information.
3-Pin SOT-23
DBZ Package
(Top View)
3-Pin SIP
LPG Package
(Top View)
OUT
2
3
GND
1
1
2
3
VCC
VCC
OUT
GND
Pin Functions
PIN
NAME
TYPE
DESCRIPTION
DBZ
LPG
GND
3
2
GND
VCC
1
1
Power
2.7 to 38 V power supply. Bypass this pin to the GND pin with a 0.01-μF (minimum)
ceramic capacitor rated for VCC.
OUT
2
3
Output
Hall sensor analog output. 1 V output corresponds to B = 0 mT
Ground pin
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
Power supply voltage
MIN
MAX
UNIT
–22 (2)
40
V
Voltage ramp rate (VCC), VCC < 5 V
Unlimited
Voltage ramp rate (VCC), VCC > 5 V
0
2
V/µs
Output pin voltage
OUT
–0.5
2.5
V
Output pin reverse current during
reverse supply condition
OUT
0
–20
mA
Operating junction temperature, TJ
Tstg
(1)
(2)
(3)
(4)
(3)
Q, see Figure 17
–40
150
E, see Figure 17
–40
175 (4)
Storage temperature range
–65
150
°C
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Ensured by design. Only tested to –20 V.
Tested in production to TA = 125°C.
Tested in production to TA = 150°C.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
±2500
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
2.7
38
UNIT
VCC
Power supply voltage
VOUT
Output pin voltage (OUT)
0
2
V
ISOURCE
Output pin current source (OUT)
0
300
µA
ISINK
Output pin current sink (OUT)
mA
Operating ambient
temperature
TA
0
2.3
Q, see Figure 17
–40
125
E, see Figure 17
–40
150
V
°C
7.4 Thermal Information
DRV5053-Q1
THERMAL METRIC (1)
DBZ
LPG
3 PINS
3 PINS
RθJA
Junction-to-ambient thermal resistance
333.2
180
RθJC(top)
Junction-to-case (top) thermal resistance
99.9
98.6
RθJB
Junction-to-board thermal resistance
66.9
154.9
ψJT
Junction-to-top characterization parameter
4.9
40
ψJB
Junction-to-board characterization parameter
65.2
154.9
(1)
4
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES (VCC)
VCC
VCC operating voltage
ICC
Operating supply current
ton
Power-on time
2.7
VCC = 2.7 to 38 V, TA = 25°C
38
2.7
VCC = 2.7 to 38 V, TA = TA, MAX (1)
3
3.6
35
50
V
mA
µs
PROTECTION CIRCUITS
VCCR
Reverse supply voltage
IOCP,SOURCE
Overcurrent protection level
Sourcing current
300
µA
IOCP,SINK
Overcurrent protection level
Sinking current
2.3
mA
(1)
TA,
MAX
–22
V
is 125°C for Q Grade 1 devices and 150°C for E Grade 0 devices (see Figure 17)
7.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
13
25
UNIT
ANALOG OUTPUT (OUT)
td
Output delay time
TA = 25°C
µs
7.7 Magnetic Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VQ
Quiescent output
ƒBW
Bandwidth (2)
B = 0 mT
BN
Input-referred noise (3)
MIN
TYP
MAX
0.9
1.02
1.15
UNIT (1)
V
20
(4)
COUT = 50 pF
Le
Linearity
VOUT MIN
Output saturation voltage (min)
B < –BSAT
VOUT MAX
Output saturation voltage (max)
B > BSAT
0.40
–BSAT < B < BSAT
kHz
0.58
0.79
mTpp
0.2
V
1%
1.8
V
DRV5053OA: –11 mV/mT
S
Sensitivity
VN
Output-referred noise
BSAT
Input saturation field
VCC = 3.3 V
(3)
–17.5
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VCC = 3.3 V
–11
–5
mV/mT
6
mVpp
73
mT
DRV5053PA: –23 mV/mT
S
Sensitivity
VCC = 3.3 V
VN
Output-referred noise (3)
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
13
mVpp
BSAT
Input saturation field
VCC = 3.3 V
35
mT
(1)
(2)
(3)
(4)
–35
–23
–10
mV/mT
1 mT = 10 Gauss
Bandwidth describes the fastest changing magnetic field that can be detected and translated to the output.
Not tested in production; limits are based on characterization data.
Linearity describes the change in sensitivity across the B-range. The sensitivity near BSAT is typically within 1% of the sensitivity near
B = 0.
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Magnetic Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT (1)
–70
–45
–20
mV/mT
DRV5053RA: –45 mV/mT
S
Sensitivity
VCC = 3.3 V
VN
Output-referred noise (3)
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
26
mVpp
BSAT
Input saturation field
VCC = 3.3 V
18
mT
DRV5053VA: –90 mV/mT
S
Sensitivity
VCC = 3.3 V
VN
Output-referred noise (3)
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
BSAT
Input saturation field
VCC = 3.3 V
–140
–90
–45
mV/mT
52
mVpp
9
mT
DRV5053CA: 23 mV/mT
S
Sensitivity
VN
Output-referred noise
BSAT
Input saturation field
VCC = 3.3 V
(3)
10
23
35
mV/mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
13
mVpp
VCC = 3.3 V
35
mT
DRV5053EA: 45 mV/mT
S
Sensitivity
VCC = 3.3 V
VN
Output-referred noise (3)
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
26
mVpp
BSAT
Input saturation field
VCC = 3.3 V
18
mT
6
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20
45
70
mV/mT
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7.8 Typical Characteristics
TA > 125°C data is valid for Grade 0 devices only (E, see Figure 17)
3.5
3.5
TA = 125°C
TA = 150°C
VCC = 3.3 V
VCC = 13.2 V
VCC = 38 V
Supply Current (mA)
Supply Current (mA)
TA ±ƒ&
TA = 25°C
TA = 75°C
3
2.5
2
0
10
20
Supply Voltage (V)
30
3
2.5
2
-50
40
-25
Figure 1. ICC vs VCC
DRV5053EA
125
150
D010
DRV5053EA
40
Magnetic Sensitivity (mV/mT)
40
Magnetic Sensitivity (mV/mT)
25
50
75
100
Ambient Temperature (°C)
Figure 2. ICC vs Temperature
60
60
DRV5053CA
20
0
DRV5053OA
-20 DRV5053PA
DRV5053RA
-40
-60
-80
0
DRV5053CA
20
0 DRV5053OA
-20 DRV5053PA
-40
DRV5053RA
-60
-80
DRV5053VA
-100
DRV5053VA
-120
-50
-100
10
20
Supply Voltage (V)
30
40
-25
0
D001
TA = 25°C
25
50
75
100
Ambient Temperature (°C)
125
150
D002
VCC = 3.3 V
Figure 3. Sensitivity vs VCC
Figure 4. Sensitivity vs Temperature
1.04
1.05
TA = 150°C
1.045
1.035
TA = 125°C
1.03
1.025
Quiescent Voltage VQ (V)
Quiescent Voltage VQ (V)
0
D009
TA = 85°C
1.02
1.015
TA = 25°C
1.01
1.005
TA ±ƒ&
1
1.04
1.035
1.03
1.025
1.02
1.015
1.01
1.005
1
0.995
0
10
20
Supply Voltage (V)
30
40
0.995
-50
-25
D003
TA = 25°C
0
25
50
75
100
Ambient Temperature (°C)
125
150
D004
VCC = 3.3 V
Figure 5. DRV5053-Q1AD, VQ vs VCC
Figure 6. DRV5053-Q1AD, BN vs Temperature
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8 Detailed Description
8.1 Overview
The DRV5053-Q1 device is a chopper-stabilized hall sensor with an analog output for magnetic sensing
applications. The DRV5053-Q1 device can be powered with a supply voltage between 2.7 and 38 V, and will
survive –22 V reverse battery conditions continuously. Note that the DRV5053-Q1 device will not be operating
when approximately –22 to 2.4 V is applied to VCC (with respect to GND). In addition, the device can withstand
supply voltages up to 40 V for transient durations.
The output voltage is dependent on the magnetic field perpendicular to the package. The absence of a magnetic
field will result in OUT = 1 V. A magnetic field will cause the output voltage to change linearly with the magnetic
field.
The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic
field. A north pole near the marked side of the package is a negative magnetic field.
For devices with a negative sensitivity (that is, DRV5053-Q1RA: –40 mV/mT), a south pole will cause the output
voltage to drop below 1 V, and a north pole will cause the output to rise above 1 V.
For devices with a positive sensitivity (that is, DRV5053-Q1EA: +40 mV/mT), a south pole will cause the output
voltage to rise above 1 V, and a north pole will cause the output to drop below 1 V.
8.2 Functional Block Diagram
2.7 to 38 V
CVCC
VCC
Regulated Supply
Bias
Offset Cancel
Hall Element
Temperature
Compensation
+
OUT
Output
Driver
-
COUT
ROUT
(Optional)
(Equivalent)
Optional RC Filtering
GND
8
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8.3 Feature Description
8.3.1 Field Direction Definition
A positive magnetic field is defined as a south pole near the marked side of the package as shown in Figure 7.
SOT-23 (DBZ)
SIP (LPG)
B > 0 mT
B < 0 mT
B > 0 mT
B < 0 mT
N
S
N
S
S
N
S
N
1
2
3
1
2
3
(Bottom view)
N = North pole, S = South pole
Figure 7. Field Direction Definition
8.3.2 Device Output
The DRV5053-Q1 device output is defined below for negative sensitivity (that is, –45 mV/mT, RA) and positive
sensitivity (that is, +45 mV/mT, EA):
VOUT (V)
VMAX
VQ
VMIN
–BSAT (N)
B (mT)
BSAT (S)
Figure 8. DRV5053-Q1 – Negative Sensitivity
VOUT (V)
VMAX
VQ
VMIN
–BSAT (N)
B (mT)
BSAT (S)
Figure 9. DRV5053-Q1 – Positive Sensitivity
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Feature Description (continued)
8.3.3 Power-On Time
After applying VCC to the DRV5053-Q1 device, ton must elapse before OUT is valid. Figure 10 shows Case 1 and
Figure 11 shows case 2; the output is defined assuming a negative sensitivity device and a constant magnetic
field –BSAT < B < BSAT.
Case #1
VCC
t (s)
B (mT)
BSAT
t (s)
-BSAT
OUT
90%
Invalid Output
Valid Output
t (s)
tON
Figure 10. Case 1: Power On When B < 0, North
Case #2
VCC
t (s)
B (mT)
BSAT
t (s)
-BSAT
OUT
Invalid Output
Valid Output
10%
t (s)
tON
Figure 11. Case 2: Power On When B > 0, South
10
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Feature Description (continued)
8.3.4 Output Stage
The DRV5053-Q1 output stage is capable of up to 300 µA of current source or 2.3 mA sink.
For proper operation, ensure that equivalent output load ROUT > 10 kΩ. In addition, ensure that the load
capacitance COUT < 10 nF.
8.3.5 Protection Circuits
An analog current limit circuit limits the current through the output driver. The driver current will be clamped to
IOCP
8.3.5.1 Overcurrent Protection (OCP)
An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During
this clamping, the rDS(on) of the output FET is increased from the nominal value.
8.3.5.2 Load Dump Protection
The DRV5053-Q1 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand
VCC = 40 V. No current-limiting series resistor is required for this protection.
8.3.5.3 Reverse Supply Protection
The DRV5053-Q1 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).
NOTE
In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings
specified in the Absolute Maximum Ratings.
Table 1.
FAULT
CONDITION
DEVICE
DESCRIPTION
FET overload (OCP)
ISINK ≥ IOCP
Operating
Output current is clamped to IOCP
RECOVERY
IO < IOCP
Load Dump
38 V < VCC < 40 V
Operating
Device will operate for a transient duration
VCC ≤ 38 V
Reverse Supply
–22 V < VCC < 0 V
Disabled
Device will survive this condition
VCC ≥ 2.7 V
8.4 Device Functional Modes
The DRV5053-Q1 device is active only when VCC is between 2.7 and 38 V.
When a reverse supply condition exists, the device is inactive.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The DRV5053-Q1 device is used in magnetic-field sensing applications.
9.2 Typical Applications
9.2.1 Typical Application With No Filter
OUT
2
3
VCC
VCC
1
C1
0.01 µF
(minimum)
Figure 12. Typical Application Schematic – No Filter
9.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
System bandwidth
ƒBW
15 kHz
9.2.1.2 Detailed Design Procedure
The DRV5053-Q1 has internal filtering that limits the bandwidth to at least 20 kHz. For this application no
external components are required other than the C1 bypass capacitor, which is 0.01 µF minimum. If the analog
output OUT is tied to a microcontroller ADC input, the equivalent load must be R > 10 kΩ and C < 10 nF.
Table 3. External Components
COMPONENT
PIN 1
PIN 2
RECOMMENDED
C1
VCC
GND
A 0.01-µF (minimum) ceramic capacitor rated for VCC
12
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9.2.1.3 Application Curve
Figure 13. 10-kHz Switching Magnetic Field
9.2.2 Filtered Typical Application
For lower noise on the analog output OUT, additional RC filtering can be added to further reduce the bandwidth.
C2
1500 pF
OUT
2
R1
10 kΩ
3
VCC
VCC
1
C1
0.01 µF
(minimum)
Figure 14. Filtered Typical Application Schematic
9.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 4 as the input parameters.
Table 4. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
System bandwidth
ƒBW
5 kHz
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9.2.2.2 Detailed Design Procedure
In this example we will add an external RC filter in order to reduce the output bandwidth.
In order to preserve the signal at the frequencies of interest, we will conservatively select a low-pass filter
bandwidth (–3-dB point) at twice the system bandwidth (10 kHz).
1
10 kHz
2p ´ R1 ´ C2
(1)
If we guess R1 = 10 kΩ, then C2 < 1590 pF. So we select C2 = 1500 pF.
9.2.2.3 Application Curves
0
-2
Magnitude (dB)
-4
-6
-8
-10
-12
-14
100
200
500 1000 2000
5000 10000
Frequency (Hz)
R1 = 10-kΩ pullup
Figure 15. 5-kHz Switching Magnetic Field
100000
D011
C2 = 680 pF
Figure 16. Low-Pass Filtering
10 Power Supply Recommendations
The DRV5053-Q1 device is designed to operate from an input voltage supply (VM) range between 2.7 and 38 V.
A 0.01-µF (minimum) ceramic capacitor rated for VCC must be placed as close to the DRV5053-Q1 device as
possible.
14
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Device Nomenclature
Figure 17 shows a legend for reading the complete device name for and DRV5053-Q1 device.
DRV5053
(RA)
(Q)
(DBZ)
(R)
(Q1)
Prefix
DRV5053: Analog linear hall sensor
AEC-Q100
Q1: Automotive qualification
Blank: Non-auto
Sensitivity
OA: ±11 mV/mT
PA: ±23 mV/mT
RA: ±45 mV/mT
VA: ±90 mV/mT
CA: +23 mV/mT
EA: +45 mV/mT
Tape and Reel
R: 3000 pcs/reel
T: 250 pcs/reel
M: 1000 pcs/bag (bulk)
Blank: 3000 pcs/box (ammo)
Package
DBZ: 3-pin SOT (SMT)
LPG: 3-pin SIP (through-hole)
Temperature Range
Q: ±40 to 125°C
E: ±40 to 150°C
Figure 17. Device Nomenclature
11.1.2 Device Markings
Marked Side
3
Marked Side Front
1
1
2
3
2
Marked Side
1
2
3
(Bottom view)
Figure 18. SOT-23 (DBZ) Package
Figure 19. SIP (LPG) Package
indicates the Hall effect sensor (not to scale). The Hall element is located in the center of the package with a
tolerance of ±100 µm. The height of the Hall element from the bottom of the package is 0.7 mm ±50 µm in the DBZ
package and 0.987 mm ±50 µm in the LPG package.
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: DRV5053-Q1
15
DRV5053-Q1
SLIS154 – DECEMBER 2014
www.ti.com
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: DRV5053-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DRV5053CAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJCA
DRV5053CAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJCA
DRV5053CAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJCA
DRV5053CAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJCA
DRV5053CAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKCA
DRV5053CAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKCA
DRV5053CAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKCA
DRV5053CAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKCA
DRV5053EAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJEA
DRV5053EAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJEA
DRV5053EAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJEA
DRV5053EAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJEA
DRV5053EAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AKEA
DRV5053EAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AKEA
DRV5053EAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AKEA
DRV5053EAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKEA
DRV5053OAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJOA
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
1-Apr-2015
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DRV5053OAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJOA
DRV5053OAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJOA
DRV5053OAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJOA
DRV5053OAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKOA
DRV5053OAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKOA
DRV5053OAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKOA
DRV5053OAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKOA
DRV5053PAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJPA
DRV5053PAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJPA
DRV5053PAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJPA
DRV5053PAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJPA
DRV5053PAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKPA
DRV5053PAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKPA
DRV5053PAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKPA
DRV5053PAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKPA
DRV5053RAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJRA
DRV5053RAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJRA
DRV5053RAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJRA
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
1-Apr-2015
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DRV5053RAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJRA
DRV5053RAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKRA
DRV5053RAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKRA
DRV5053RAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKRA
DRV5053RAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
DRV5053VAEDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJVA
DRV5053VAEDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 150
+AJVA
DRV5053VAELPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJVA
DRV5053VAELPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 150
+AJVA
DRV5053VAQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKVA
DRV5053VAQDBZTQ1
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
+AKVA
DRV5053VAQLPGMQ1
ACTIVE
TO-92
LPG
3
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKVA
DRV5053VAQLPGQ1
ACTIVE
TO-92
LPG
3
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
+AKVA
+AKRA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Apr-2015
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF DRV5053-Q1 :
• Catalog: DRV5053
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Jul-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
DRV5053CAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053CAEDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053CAQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053CAQDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053EAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053EAEDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053EAQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053EAQDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053OAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053OAEDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053OAQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053OAQDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053PAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053PAEDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053PAQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053PAQDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053RAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
DRV5053RAEDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Jul-2015
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
DRV5053RAQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
DRV5053RAQDBZTQ1
SOT-23
DBZ
3
250
180.0
8.4
DRV5053VAEDBZRQ1
SOT-23
DBZ
3
3000
180.0
DRV5053VAEDBZTQ1
SOT-23
DBZ
3
250
180.0
DRV5053VAQDBZRQ1
SOT-23
DBZ
3
3000
DRV5053VAQDBZTQ1
SOT-23
DBZ
3
250
W
Pin1
(mm) Quadrant
3.15
2.77
1.22
4.0
8.0
Q3
3.15
2.77
1.22
4.0
8.0
Q3
8.4
3.15
2.77
1.22
4.0
8.0
Q3
8.4
3.15
2.77
1.22
4.0
8.0
Q3
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
180.0
8.4
3.15
2.77
1.22
4.0
8.0
Q3
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DRV5053CAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053CAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053CAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053CAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053EAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053EAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053EAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053EAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053OAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053OAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053OAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Jul-2015
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DRV5053OAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053PAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053PAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053PAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053PAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053RAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053RAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053RAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053RAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053VAEDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053VAEDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
DRV5053VAQDBZRQ1
SOT-23
DBZ
3
3000
202.0
201.0
28.0
DRV5053VAQDBZTQ1
SOT-23
DBZ
3
250
202.0
201.0
28.0
Pack Materials-Page 3
PACKAGE OUTLINE
LPG0003A
TO-92 - 5.05 mm max height
SCALE 1.300
TO-92
4.1
3.9
3.25
3.05
3X
0.55
0.40
5.05
MAX
3X (0.8)
3X
15.5
15.1
3X
0.48
0.35
3X
2X 1.27 0.05
0.51
0.36
2.64
2.44
2.68
2.28
1.62
1.42
2X (45° )
0.86
0.66
4221343/A 02/2014
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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