Linear LT1965EDD 1.1a, low noise, low dropout linear regulator Datasheet

LT1965 Series
1.1A, Low Noise,
Low Dropout Linear Regulator
Features
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Description
Output Current: 1.1A
Dropout Voltage: 310mV
Low Noise: 40µVRMS (10Hz to 100kHz)
500µA Quiescent Current (Adjustable Version)
Wide Input Voltage Range: 1.8V to 20V
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Adjustable Output from 1.20V to 19.5V
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
< 1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor
Stable with Ceramic or Tantalum Capacitors
Reverse-Battery Protection
No Reverse Current
Current Limit with Foldback Protection
Thermal Limiting
5-Lead TO-220, DD-Pak, Thermally Enhanced 8-Lead
MSOP and 8-Lead 3mm × 3mm DFN Packages
Applications
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The LT®1965 series are low noise, low dropout linear regulators. The devices supply 1.1A of output current with a
310mV typical dropout voltage. Operating quiescent current
is 500µA for the adjustable version, reducing to <1µA in
shutdown. Quiescent current is well controlled; it does not
rise in dropout as with many other regulators. The LT1965
regulators have very low output noise which makes them
ideal for sensitive RF and DSP supply applications.
Output voltage ranges from 1.20V to 19.5V. The LT1965
regulators are stable with output capacitors as low as
10µF. Internal protection circuitry includes reverse-battery
protection, current limiting with foldback, thermal limiting and reverse-current protection. The LT1965 series
are available in fixed output voltages of 1.5V, 1.8V, 2.5V,
3.3V, and as an adjustable device with a 1.20V reference
voltage. The package offerings include the 5-lead TO-220,
5-lead DD-Pak as well as the thermally enhanced 8-lead
MSOP and low profile (0.75mm) 8-lead 3mm × 3mm DFN.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
Logic Power Supplies
Post Regulator for Switching Supplies
Low Noise Instrumentation
Typical Application
Dropout Voltage
400
3.3V to 2.5V Regulator
TJ = 25°C
VIN > 3V
TO 20V
+
IN
10µF*
OUT
LT1965-2.5
SHDN
+
2.5V
1.1A
10µF*
SENSE
GND
*CERAMIC OR TANTALUM
1965 TA01
DROPOUT VOLTAGE (mV)
350
300
250
200
150
100
50
0
0
0.2
0.6
0.8
0.4
OUTPUT CURRENT (A)
1
1.2
1965 TA01b
1965fb
For more information www.linear.com/LT1965
1
LT1965 Series
Absolute Maximum Ratings
(Note 1)
IN Pin Voltage..........................................................±22V
OUT Pin Voltage.......................................................±22V
Input to Output Differential Voltage (Note 2) ......... ±22V
SENSE Pin Voltage...................................................±22V
ADJ Pin Voltage.........................................................±9V
SHDN Pin Voltage....................................................±22V
Output Short-Circuit Duration........................... Indefinite
Operating Junction Temperature Range (Notes 3, 5, 13)
E-, I-Grades........................................ –40°C to 125°C
H-Grade.............................................. –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
(Only for MSOP, TO-220, DD-Pak Packages)..... 300°C
Pin Configuration
TOP VIEW
OUT 1
OUT 2
SENSE/ADJ* 3
9
GND 4
8
IN
7
IN
6
SHDN
5
GND
TOP VIEW
OUT
OUT
SENSE/ADJ*
GND
1
2
3
4
IN
IN
SHDN
GND
MS8E PACKAGE
8-LEAD PLASTIC MSOP
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 65°C/W, θJC = 3°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
*PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 3 = ADJ FOR LT1965
TJMAX = 125°C, θJA = 60°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
*PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 3 = ADJ FOR LT1965
FRONT VIEW
TAB IS
GND
8
7
6
5
9
FRONT VIEW
5
SENSE/ADJ*
4
OUT
3
GND
2
IN
1
SHDN
TAB IS
GND
Q PACKAGE
5-LEAD PLASTIC DD-PAK
5
SENSE/ADJ*
4
OUT
3
GND
2
IN
1
SHDN
T PACKAGE
5-LEAD PLASTIC TO-220
TJMAX = 150°C, θJA = 30°C/W, θJC = 3°C/W
*PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 5 = ADJ FOR LT1965
TJMAX = 150°C, θJA = 50°C/W, θJC = 3°C/W
*PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3
*PIN 5 = ADJ FOR LT1965
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1965EDD#PBF
LT1965EDD#TRPBF
LCXW
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965IDD#PBF
LT1965IDD#TRPBF
LCXW
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965EDD-1.5#PBF
LT1965EDD-1.5#TRPBF
LDKW
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965IDD-1.5#PBF
LT1965IDD-1.5#TRPBF
LDKW
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965EDD-1.8#PBF
LT1965EDD-1.8#TRPBF
LDKY
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965IDD-1.8#PBF
LT1965IDD-1.8#TRPBF
LDKY
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965EDD-2.5#PBF
LT1965EDD-2.5#TRPBF
LDMB
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965IDD-2.5#PBF
LT1965IDD-2.5#TRPBF
LDMB
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965EDD-3.3#PBF
LT1965EDD-3.3#TRPBF
LDMD
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
2
1965fb
For more information www.linear.com/LT1965
LT1965 Series
order information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT1965IDD-3.3#PBF
LT1965IDD-3.3#TRPBF
LDMD
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT1965EMS8E#PBF
LT1965EMS8E#TRPBF
LTCXX
8-Lead Plastic MSOP
–40°C to 125°C
LT1965IMS8E#PBF
LT1965IMS8E#TRPBF
LTCXX
8-Lead Plastic MSOP
–40°C to 125°C
LT1965EMS8E-1.5#PBF
LT1965EMS8E-1.5#TRPBF
LTDKX
8-Lead Plastic MSOP
–40°C to 125°C
LT1965IMS8E-1.5#PBF
LT1965IMS8E-1.5#TRPBF
LTDKX
8-Lead Plastic MSOP
–40°C to 125°C
LT1965EMS8E-1.8#PBF
LT1965EMS8E-1.8#TRPBF
LTDKZ
8-Lead Plastic MSOP
–40°C to 125°C
LT1965IMS8E-1.8#PBF
LT1965IMS8E-1.8#TRPBF
LTDKZ
8-Lead Plastic MSOP
–40°C to 125°C
LT1965EMS8E-2.5#PBF
LT1965EMS8E-2.5#TRPBF
LTDMC
8-Lead Plastic MSOP
–40°C to 125°C
LT1965IMS8E-2.5#PBF
LT1965IMS8E-2.5#TRPBF
LTDMC
8-Lead Plastic MSOP
–40°C to 125°C
LT1965EMS8E-3.3#PBF
LT1965EMS8E-3.3#TRPBF
LTDMF
8-Lead Plastic MSOP
–40°C to 125°C
LT1965IMS8E-3.3#PBF
LT1965IMS8E-3.3#TRPBF
LTDMF
8-Lead Plastic MSOP
–40°C to 125°C
LT1965EQ#PBF
LT1965EQ#TRPBF
LT1965Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965IQ#PBF
LT1965IQ#TRPBF
LT1965Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965HQ#PBF
LT1965HQ#TRPBF
LT1965Q
5-Lead Plastic DD-Pak
–40°C to 150°C
LT1965EQ-1.5#PBF
LT1965EQ-1.5#TRPBF
LT1965Q-1.5
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965IQ-1.5#PBF
LT1965IQ-1.5#TRPBF
LT1965Q-1.5
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965EQ-1.8#PBF
LT1965EQ-1.8#TRPBF
LT1965Q-1.8
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965IQ-1.8#PBF
LT1965IQ-1.8#TRPBF
LT1965Q-1.8
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965EQ-2.5#PBF
LT1965EQ-2.5#TRPBF
LT1965Q-2.5
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965IQ-2.5#PBF
LT1965IQ-2.5#TRPBF
LT1965Q-2.5
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965EQ-3.3#PBF
LT1965EQ-3.3#TRPBF
LT1965Q-3.3
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965IQ-3.3#PBF
LT1965IQ-3.3#TRPBF
LT1965Q-3.3
5-Lead Plastic DD-Pak
–40°C to 125°C
LT1965ET#PBF
N/A
LT1965T
5-Lead Plastic TO-220
–40°C to 125°C
LT1965IT#PBF
N/A
LT1965T
5-Lead Plastic TO-220
–40°C to 125°C
LT1965HT#PBF
N/A
LT1965T
5-Lead Plastic TO-220
–40°C to 150°C
LT1965ET-1.5#PBF
N/A
LT1965T-1.5
5-Lead Plastic TO-220
–40°C to 125°C
LT1965IT-1.5#PBF
N/A
LT1965T-1.5
5-Lead Plastic TO-220
–40°C to 125°C
LT1965ET-1.8#PBF
N/A
LT1965T-1.8
5-Lead Plastic TO-220
–40°C to 125°C
LT1965IT-1.8#PBF
N/A
LT1965T-1.8
5-Lead Plastic TO-220
–40°C to 125°C
LT1965ET-2.5#PBF
N/A
LT1965T-2.5
5-Lead Plastic TO-220
–40°C to 125°C
LT1965IT-2.5#PBF
N/A
LT1965T-2.5
5-Lead Plastic TO-220
–40°C to 125°C
LT1965ET-3.3#PBF
N/A
LT1965T-3.3
5-Lead Plastic TO-220
–40°C to 125°C
LT1965IT-3.3#PBF
N/A
LT1965T-3.3
5-Lead Plastic TO-220
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1965fb
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3
LT1965 Series
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage
(Notes 4, 12)
ILOAD = 0.5A
ILOAD = 1.1A (TJ < 125°C)
ILOAD = 1A (H-Grade, TJ > 125°C)
Regulated Output Voltage
(Note 5)
LT1965-1.5, VIN = 2.1V, ILOAD = 1mA
LT1965-1.5, 2.5 < VIN < 20V, 1mA < ILOAD < 1.1A
l
1.477
1.455
LT1965-1.8, VIN = 2.3V, ILOAD = 1mA
LT1965-1.8, 2.8 < VIN < 20V, 1mA < ILOAD < 1.1A
l
LT1965-2.5, VIN = 3V, ILOAD = 1mA
LT1965-2.5, 3.5 < VIN < 20V, 1mA < ILOAD < 1.1A
LT1965-3.3, VIN = 3.8V, ILOAD = 1mA
LT1965-3.3, 4.3 < VIN < 20V, 1mA < ILOAD < 1.1A
1.5
1.5
1.523
1.545
V
V
1.773
1.746
1.8
1.8
1.827
1.854
V
V
l
2.462
2.425
2.5
2.5
2.538
2.575
V
V
l
3.25
3.201
3.3
3.3
3.35
3.399
V
V
1.182
1.164
1.158
1.2
1.2
1.218
1.236
1.236
V
V
V
3.5
4
4.5
5.5
3
3
9
10
11.5
16
8
12
mV
mV
mV
mV
mV
mV
5.25
10
20
mV
mV
6.25
12
24
mV
mV
8.75
16.5
33
mV
mV
11.5
22
44
mV
mV
4.25
8
16
22
mV
mV
mV
0.055
0.08
0.14
V
V
0.12
0.175
0.28
V
V
0.21
0.25
0.36
V
V
0.31
0.36
0.49
0.49
V
V
V
0.5
0.6
2.2
8.2
21
1.1
1.5
5.5
20
40
40
mA
mA
mA
mA
mA
mA
LT1965-1.5, ∆VIN = 2.1V to 20V, ILOAD = 1mA
LT1965-1.8, ∆VIN = 2.3V to 20V, ILOAD = 1mA
LT1965-2.5, ∆VIN = 3V to 20V, ILOAD = 1mA
LT1965-3.3, ∆VIN = 3.8V to 20V, ILOAD = 1mA
LT1965, ∆VIN = 2.1V to 20V, ILOAD = 1mA (E-, I-Grades) (Note 4)
LT1965, ∆VIN = 2.1V to 20V, ILOAD = 1mA (H-Grade) (Note 4)
l
l
l
l
l
l
Load Regulation
LT1965-1.5, VIN = 2.5V, ∆ILOAD = 1mA to 1.1A
LT1965-1.5, VIN = 2.5V, ∆ILOAD = 1mA to 1.1A
l
LT1965-1.8, VIN = 2.8V, ∆ILOAD = 1mA to 1.1A
LT1965-1.8, VIN = 2.8V, ∆ILOAD = 1mA to 1.1A
l
LT1965-2.5, VIN = 3.5V, ∆ILOAD = 1mA to 1.1A
LT1965-2.5, VIN = 3.5V, ∆ILOAD = 1mA to 1.1A
l
LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A
LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A
l
l
ILOAD = 1mA
ILOAD = 1mA
l
ILOAD = 100mA
ILOAD = 100mA
l
ILOAD = 500mA
ILOAD = 500mA
l
ILOAD = 1.1A
ILOAD = 1.1A (TJ < 125°C)
ILOAD = 1A (H-Grade, TJ > 125°C)
GND Pin Current
VIN = VOUT(NOMINAL) + 1V
(Notes 6, 8)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 100mA
ILOAD = 500mA
ILOAD = 1.1A (TJ < 125°C)
ILOAD = 1A (H-Grade, TJ > 125°C)
Output Voltage Noise
COUT = 10µF, ILOAD = 1.1A, BW = 10Hz to 100kHz
l
l
l
l
l
l
40
ADJ Pin Bias Current
(Notes 4, 9)
Shutdown Threshold
4
VOUT = Off to On
VOUT = On to Off
UNITS
V
V
V
Line Regulation
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 6, 7, 12)
MAX
2.3
2.3
l
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1.1A (Note 4)
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1.1A (TJ < 125°C)
LT1965, VIN = 2.3V, ∆ILOAD = 1mA to 1A (H-Grade, TJ > 125°C)
1.65
1.8
l
VIN = 2.1V, ILOAD = 1mA
2.3V < VIN < 20V, 1mA < ILOAD < 1.1A (TJ < 125°C)
2.3V < VIN < 20V, 1mA < ILOAD < 1A (H-Grade, TJ > 125°C)
ADJ Pin Voltage (Notes 4, 5)
TYP
l
l
0.2
µVRMS
1.3
4.5
µA
0.85
0.45
2
V
V
1965fb
For more information www.linear.com/LT1965
LT1965 Series
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3)
PARAMETER
CONDITIONS
SHDN Pin Current (Note 10)
VSHDN = 0V
VSHDN = 20V
Quiescent Current in Shutdown
VIN = 6V, VSHDN = 0V
Ripple Rejection
VIN – VOUT = 1.5V (AVG), VRIPPLE = 0.5VP-P,
fRIPPLE = 120Hz, ILOAD = 0.75A
Current Limit
VIN = 7V, VOUT = 0
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V (TJ < 125°C) (Note 6)
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V, (H-Grade, TJ > 125°C) (Note 6)
Input Reverse-Leakage Current
MIN
57
l
1.2
1.1
TYP
MAX
0.01
5.5
1
10
0.01
1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Absolute maximum input to output differential voltage is not
achievable with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 22V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT must not exceed ±22V.
Note 3: The LT1965 regulators are tested and specified under pulse
load conditions such that TJ @ TA. The LT1965E regulators are 100%
tested at TA = 25°C and performance is guaranteed from 0°C to 125°C.
Performance of the LT1965E over the full –40°C to 125°C operating
junction temperature range is assured by design, characterization and
correlation with statistical process controls. The LT1965I regulators are
guaranteed over the full –40°C to 125°C operating junction temperature
range. The LT1965H is tested at 150°C operating junction temperature.
High junction temperatures degrade operating lifetimes. Operating lifetime
is derated at junction temperatures greater than 125°C.
Note 4: The LT1965 adjustable version is tested and specified for these
conditions with the ADJ connected to the OUT pin.
Note 5: Maximum junction temperature limits operating conditions. The
regulated output voltage specification does not apply for all possible
combinations of input voltage and output current. Limit the output current
range if operating at the maximum input voltage. Limit the input-to-output
voltage differential if operating at the maximum output current.
µA
µA
µA
75
dB
2.4
A
A
A
VIN = –20V, VOUT = 0
Reverse-Output Current (Note 11) LT1965-1.5, VOUT = 1.5V, VIN = 0
LT1965-1.8, VOUT = 1.8V, VIN = 0
LT1965-2.5, VOUT = 2.5V, VIN = 0
LT1965-3.3, VOUT = 3.3V, VIN = 0
LT1965 (Note 4), VOUT = 1.2V, VIN = 0
UNITS
275
275
275
275
175
1
mA
525
525
525
525
400
µA
µA
µA
µA
µA
Note 6: To satisfy minimum input voltage requirements, the LT1965
adjustable version is tested and specified for these conditions with an
external resistor divider (bottom 4.02k, top 4.32k) for an output voltage of
2.5V. The external resistor divider adds 300µA of output DC load current.
This external current is not factored into GND pin current.
Note 7: Dropout voltage is the minimum input-to-output voltage
differential needed to maintain regulation at a specified output current. In
dropout, the output voltage equals: (VIN – VDROPOUT)
Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V and a
current source load. GND pin current increases slightly in dropout. For
the fixed output versions, an internal resistor divider will typically add
100µA to the GND pin current. See GND pin current curves in the Typical
Performance Characteristics section.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse-output current is tested with the IN pin grounded and
the OUT pin forced to the rated output voltage. This current flows into the
OUT pin and out of the GND pin.
Note 12: For the LT1965, LT1965-1.5 and LT1965-1.8, the minimum input
voltage specification limits the dropout voltage under some output voltage/
load conditions.
Note 13: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C (LT1965E, LT1965I) or 150°C (LT1965H)
when overtemperature is active. Continuous operation above the specified
maximum operating junction temperature may impair device reliability.
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5
LT1965 Series
Typical Performance Characteristics
Guaranteed Dropout Voltage
500
450
450
400
TJ = 125°C
300
250
200
TJ = 25°C
150
100
50
0
0.2
0.6
0.8
0.4
OUTPUT CURRENT (A)
1
300
250
150
100
50
0.8
0.7
1.522
1.517
LT1965
0.4
0.3
0.1
0
–50 –25
VSHDN = 0
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G04
100
1.827
IL = 1mA
1.821
1.492
OUTPUT VOLTAGE (V)
2.484
1.803
1.797
1.791
1.482
1.779
1.477
–50 –25
1.773
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
IL = 1mA
1.214
IL = 1mA
1.210
3.320
3.310
3.300
3.290
3.280
1.206
1.202
1.198
1.194
2.468
3.260
1.186
3.250
–50 –25
6
25 50 75 100 125 150
TEMPERATURE (°C)
LT1965 ADJ Pin Voltage
1.218
2.460
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G07
0
1965 G06
1.190
0
IL = 1mA
1.809
3.270
2.476
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G03
1.785
3.330
2.492
0
1.815
1.497
3.340
2.500
IL = 1mA
LT1965-1.8 Output Voltage
LT1965-3.3 Output Voltage
IL = 1mA
2.508
IL = 100mA
150
1965 G02
1.502
3.350
2.516
IL = 500mA
250
200
1965 G05
2.524
OUTPUT VOLTAGE (V)
300
0
–50 –25
1.2
1
1.507
LT1965-2.5 Output Voltage
2.532
0.6
0.8
0.4
OUTPUT CURRENT (A)
1.487
0.2
2.540
0.2
1.512
LT1965-1.5/-1.8/-2.5/-3.3
0.5
0
IL = 1A
IL = 1.1A
350
LT1965-1.5 Output Voltage
VIN = 6V
RL = ∞, IL = 0
VSHDN = VIN
0.6
400
50
1965 G01
OUTPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
0.9
TJ = 25°C
200
Quiescent Current
1.0
TJ = 125°C
350
0
1.2
450
400
ADJ PIN VOLTAGE (V)
0
= TEST POINTS
OUTPUT VOLTAGE (V)
350
Dropout Voltage
500
DROPOUT VOLTAGE (mV)
GUARANTEED DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
Typical Dropout Voltage
500
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G08
1.182
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G09
1965fb
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LT1965 Series
Typical Performance Characteristics
LT1965-1.5 Quiescent Current
LT1965-1.8 Quiescent Current
5
4
3
2
VSHDN = 0V
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
4
3
2
1
0
10
6
4
0
1.0
0
1
2
8
0.6
9
0
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
0
2
4
9
10
1965 G16
0
1
2
5
5
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
0
RL = 180Ω, IL = 10mA*
RL = 1.8k, IL = 1mA*
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
9
10
1965 G12
3
2
RL = 30Ω, IL = 50mA*
RL = 150Ω, IL = 10mA*
1
0
1
2
8
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1965 G15
LT1965-1.8 GND Pin Current
(Heavy Load)
RL = 36Ω, IL = 50mA*
1
8
RL = 1.5k, IL = 1mA*
3
2
3 4 5 6 7
INPUT VOLTAGE (V)
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.5V
4
0
25
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.8V
4
VSHDN = VIN
LT1965-1.5 GND Pin Current
(Light Load)
VSHDN = 0V
0
VSHDN = 0V
1965 G14
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
2
LT1965-1.8 GND Pin Current
(Light Load)
RL = 15Ω, IL = 100mA*
1
4
1965 G11
0.2
10
RL = 3Ω, IL = 500mA*
0
6
0
10
0.3
1965 G13
10
5
9
0.4
0.1
RL = 1.363Ω, IL = 1.1A*
15
8
VSHDN = VIN
0.5
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.5V
20
3 4 5 6 7
INPUT VOLTAGE (V)
0.7
LT1965-1.5 GND Pin Current
(Heavy Load)
25
2
0.8
VSHDN = VIN
3 4 5 6 7
INPUT VOLTAGE (V)
1
TJ = 25°C
RL = 4.02k
0.9
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
8
VSHDN = 0V
0
TJ = 25°C
RL = ∞
8
LT1965 Quiescent Current
TJ = 25°C
RL = ∞
2
VSHDN = 0V
1965 G10
LT1965-3.3 Quiescent Current
10
VSHDN = VIN
GND PIN CURRENT (mA)
0
VSHDN = VIN
TJ = 25°C
RL = ∞
GND PIN CURRENT (mA)
1
LT1965-2.5 Quiescent Current
10
QUIESCENT CURRENT (mA)
TJ = 25°C
RL = ∞
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
5
9
10
1965 G17
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.8V
20
RL = 1.636Ω, IL = 1.1A*
15
10
RL = 3.6Ω, IL = 500mA*
5
0
RL = 18Ω, IL = 100mA*
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1965 G18
1965fb
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7
LT1965 Series
Typical Performance Characteristics
LT1965-2.5 GND Pin Current
(Light Load)
8
6
4
RL = 250Ω, IL = 10mA*
RL = 2.5k, IL = 1mA*
RL = 50Ω, IL = 50mA*
2
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
20
10
RL = 5Ω, IL = 500mA*
5
15
RL = 6.6Ω, IL = 500mA*
5
0
2.0
1.6
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
8
1.4
9
RL = 24Ω, IL = 50mA*
RL = 120Ω, IL = 10mA*
0.6
RL = 1.2k, IL = 1mA*
0.4
0
1
2
0
10
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1965 G21
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.2V
20
RL = 1.091Ω, IL = 1.1A*
15
10
RL = 2.4Ω, IL = 500mA*
5
RL = 12Ω, IL = 100mA*
0.2
0
1
2
1965 G22
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
0
10
0
1
1965 G23
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1965 G24
SHDN Pin Threshold
1.0
0.9
SHDN PIN THRESHOLD (V)
GND PIN CURRENT (mA)
RL = 66Ω, IL = 50mA*
LT1965 GND Pin Current
(Heavy Load)
1.0
17.5
15.0
12.5
10.0
7.50
5.00
2.50
8
0
10
0.8
20.0
0
RL = 3.3k, IL = 1mA*
25
VIN = VOUT(NOMINAL) + 1V
22.5
RL = 330Ω, IL = 10mA*
4
1965 G20
GND Pin Current vs ILOAD
25.0
9
1.2
RL = 33Ω, IL = 100mA*
0
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.2V
1.8
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
RL = 3Ω, IL = 1.1A*
10
3 4 5 6 7
INPUT VOLTAGE (V)
6
LT1965 GND Pin Current
(Light Load)
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
20
2
1965 G19
LT1965-3.3 GND Pin Current
(Heavy Load)
25
1
8
2
RL = 25Ω, IL = 100mA*
0
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
10
RL = 2.272Ω, IL = 1.1A*
15
0
10
12
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
10
0
25
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
LT1965-3.3 GND Pin Current
(Light Load)
GND PIN CURRENT (mA)
12
LT1965-2.5 GND Pin Current
(Heavy Load)
OFF TO ON
0.8
0.7
0.6
ON TO OFF
0.5
0.4
0.3
0.2
0.1
0
0.2
0.6
0.8
0.4
LOAD CURRENT (A)
1.0
1.2
0
–50 –25
1965 G25
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G26
1965fb
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LT1965 Series
Typical Performance Characteristics
SHDN Pin Input Current
SHDN Pin Input Current
6.0
5.9
4
3
2
1
ADJ Pin Bias Current
4.5
VSHDN = 20V
4.0
5.8
ADJ PIN BIAS CURRENT (µA)
5
SHDN PIN INPUT CURRENT (µA)
SHDN PIN INPUT CURRENT (µA)
6
5.7
5.6
5.5
5.4
5.3
5.2
2
4
5.0
–50 –25
6 8 10 12 14 16 18 20
SHDN PIN VOLTAGE (V)
0
1965 G27
Current Limit vs VIN – VOUT
2.5
TJ = –50°C
CURRENT LIMIT (A)
TJ = 25°C
1.0
TJ = 150°C
2.0
1.5
1.0
0.5
0.5
0
2
0
–50 –25
4 6 8 10 12 14 16 18 20
INPUT/OUTPUT DIFFERENTIAL (V) 1965 G30
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G31
Reverse-Output Current
0.6
0.5
0.4
0.3
6
TJ = 25°C
VIN = 0V
VOUT = VADJ (LT1965)
VOUT = VSENSE
(LT1965-1.5/-1.8/-2.5/-3.3)
CURRENT FLOWS INTO
OUTPUT PIN
5
4
3
LT1965-1.5
2
LT1965-1.8
1
0
LT1965
LT1965-2.5
LT1965-3.3
0
1
2
3
4
5
6
7
OUTPUT VOLTAGE (V)
8
9
1965 G32
80
LT1965-1.5/-1.8/-2.5/-3.3
LT1965
0.2
0.1
0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G29
Ripple Rejection vs Frequency
VIN = 0V
VOUT = 1.2V (LT1965)
VOUT = 1.5V (LT1965-1.5)
VOUT = 1.8V (LT1965-1.8)
VOUT = 2.5V (LT1965-2.5)
VOUT = 3.3V (LT1965-3.3)
0
–50 –25
0
90
RIPPLE REJECTION (dB)
0
1.0
Reverse-Output Current
VIN = 7V
VOUT = 0V
2.5
1.5
REVERSE OUTPUT CURRENT (mA)
CURRENT LIMIT (A)
TJ = 125°C
1.5
Current Limit vs Temperature
3.0
∆VOUT = 100mV
2.0
2.0
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G28
REVERSE OUTPUT CURRENT (mA)
0
2.5
0.5
5.1
0
3.5
3.0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G33
70
60
50
40
30
20 IL = 0.75A
COUT = 10µF CERAMIC
10 VIN = VOUT(NOMINAL)
+ 1V + 50mVRMS RIPPLE
0
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1965 G34
1965fb
For more information www.linear.com/LT1965
9
LT1965 Series
Typical Performance Characteristics
Ripple Rejection vs Temperature
LT1965 Minimum Input Voltage
100
Load Regulation
0
2.5
70
60
50
40
30
10
IL = 0.75A
VIN = VOUT(NOMINAL) + 1V + 0.5P-P
RIPPLE AT f = 120Hz
0
–50 –25
0
2.0
IL = 500mA
0.5
0
–50 –25
OUTPUT NOISE VOLTAGE (µVRMS)
OUTPUT NOISE SPECTRAL DENSITY (µV Hz)
LT1965-3.3
0.10
10
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G36
LT1965
LT1965-1.5
100
1k
10k
FREQUENCY (Hz)
LT1965-2.5
LT1965-3.3
–25
–30
–35
VIN = VOUT(NOMINAL) + 1V
–40 (LT1965-1.5/-1.8/-2.5/-3.3)
–45 VIN = 2.3V (LT1965)
∆IL = 1mA TO 1.1A
–50
–50 –25 0
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G37
LT1965-1.8 10Hz to 100kHz
Output Noise
100k
COUT = 10µF
70 IL = 1.1A
60
LT1965-3.3
50
LT1965-2.5
LT1965-1.8
30
20
LT1965
LT1965-1.5
10
0
0.0001
0.001
0.01
0.1
LOAD CURRENT (A)
10
LT1965-2.5 SHDN Transient
Response
4.0
0
–50
LOAD CURRENT (A)
–100
1.5
VIN = 4.3V
CIN = 10µF CERAMIC
COUT = 10µF CERAMIC
1.0
0.5
0
0
10
20
1965 G40
1965 G39
VOUT = 3.3V
50
400µs/DIV
1
1965 G38
SHDN AND OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE
DEVIATION (mV)
100
VOUT
100µV/DIV
40
LT1965-3.3 Transient Response
10
LT1965-1.8
–20
80
LT1965-2.5
0.01
0
–15
RMS Output Noise vs Load
Current (10Hz to 100kHz)
COUT = 10µF
IL = 1.1A
LT1965-1.8
IL = 100mA
1.0
Output Noise Spectral Density
1.00
IL = 1.1A
1.5
25 50 75 100 125 150
TEMPERATURE (°C)
1965 G35
LT1965-1.5
–10
IL = 1A
LOAD REGULATION (mV)
MINIMUM INPUT VOLTAGE (V)
RIPPLE REJECTION (dB)
80
20
LT1965
–5
90
30 40 50
TIME (µs)
60
70
80
1965 G41
3.5
SHDN
3.0
2.5
2.0
1.5
OUTPUT
1.0
0.5
0
10 20 30 40 50 60 70 80 90 100
TIME (µs)
1965 G42
VIN = 3.3V
COUT = 10µF CERAMIC
RL = 2.5k, IL = 1mA FOR VOUT = 2.5V
0
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1965fb
LT1965 Series
Pin Functions
(DFN/MSOP/DD-Pak/TO-220)
OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies
power to the load. Use a minimum output capacitor of
10µF to prevent oscillations. Large load transient applications require larger output capacitors to limit peak voltage
transients. See the Applications Information section for
more information on output capacitance and reverse-output
characteristics.
SHDN (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the SHDN pin
low puts the LT1965 into a low power state and turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain logic,
normally several microamperes and the SHDN pin current,
typically less than 5.5µA. If unused, connect the SHDN pin
to VIN. The SHDN pin cannot be driven below GND unless
it is tied to the IN pin. If the SHDN pin is driven below
GND while IN is powered, the output will turn on. SHDN
pin logic cannot be referenced to a negative supply rail.
SENSE (Pin 3 / 3 / 5 / 5): Sense. For fixed voltage versions
of the LT1965 (LT1965-1.5/LT1965-1.8/ LT1965-2.5/
LT1965-3.3), the SENSE pin is the input to the error amplifier. Optimum regulation is obtained when the SENSE
pin is connected to the OUT pin of the regulator. In critical applications, small voltage drops are caused by the
resistance (RP) of PCB traces between the regulator and
the load. These drops may be eliminated by connecting
the SENSE pin to the output at the load as shown in Figure
1 (Kelvin Sense Connection). Note that the voltage drop
across the external PCB traces will add to the dropout
voltage of the regulator. The SENSE pin bias current is
100µA at the nominal rated output voltage.
IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power
to the device. The LT1965 requires a bypass capacitor at
IN if located more than six inches from the main input filter
capacitor. Include a bypass capacitor in battery-powered
circuits as a battery’s output impedance generally rises
with frequency. A bypass capacitor in the range of 1µF to
10µF suffices. The LT1965’s design withstands reverse
voltages on the IN pin with respect to ground and the
OUT pin. In the case of a reversed input, which occurs if
a battery is plugged in backwards, the LT1965 behaves
as if a diode is in series with its input. No reverse current
flows into the LT1965 and no reverse voltage appears at
the load. The device protects itself and the load.
ADJ (Pin 3 / 3 / 5 / 5): Adjust. This pin is the input to the
error amplifier. It has a typical bias current of 1.3µA that
flows into the pin. The ADJ pin voltage is 1.20V referenced
to ground.
Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only):
Ground. Tie this pin directly to Pins 4 and 5 and the PCB
ground. This pin provides enhanced thermal performance
with its connection to the PCB ground. See the Applications Information section for thermal considerations and
calculating junction temperature.
GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable
LT1965, connect the bottom of the resistor divider, setting
output voltage, directly to GND for optimum regulation.
IN
OUT
LT1965
VIN
+
RP
LOAD
+
SHDN SENSE
GND
RP
1965 F01
Figure 1. Kelvin Sense Connection
1965fb
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11
LT1965 Series
Applications Information
The LT1965 series are 1.1A low dropout regulators with
shutdown. The devices are capable of supplying 1.1A at
a typical dropout voltage of 310mV. The low operating
quiescent current (500µA for the adjustable version, 600µA
for the fixed voltage versions) drops to less than 1µA in
shutdown. In addition to the low quiescent current, the
LT1965 regulators incorporate several protection features
that makes them ideal for use in battery-powered systems.
The devices protect themselves against both reverse-input
and reverse-output voltages. In battery backup applications, if a backup battery holds up the output when the input
is pulled to ground, the LT1965 performs like it has a diode
in series with its output, preventing reverse-current flow.
Adjustable Operation
The LT1965 adjustable version has an output voltage range
of 1.20V to 19.5V. Figure 2 illustrates that the ratio of
two external resistors sets the output voltage. The device
servos the output to maintain the ADJ pin voltage at 1.20V
referenced to ground. R1’s current equals 1.20V/R1. R2’s
current equals R1’s current plus the ADJ pin bias current.
The ADJ pin bias current, 1.3µA at 25°C, flows through
R2 into the ADJ pin. Use the formula in Figure 2 to calculate output voltage. Linear Technology recommends that
R1’s value be less than 12.1k to minimize output voltage
errors due to the ADJ pin bias current. In shutdown, the
output turns off and the divider current is zero. For curves
depicting ADJ Pin Voltage vs Temperature and ADJ Pin
Bias Current vs Temperature, see the Typical Performance
Characteristics section.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.20V.
Specifications for output voltages greater than 1.20V are
proportional to the ratio of the desired output voltage to
IN
VIN
OUT
R2
LT1965
ADJ
R1
GND
1965 F02
+
VOUT
 R2
VOUT = 1.20V 1+  + IADJ • R2
 R1
VADJ = 1.20V
IADJ = 1.3µA AT 25ºC
OUTPUT RANGE = 1.20V TO 19.5V
Figure 2. Adjustable Operation
12
1.20V: VOUT/1.20V. For example, load regulation for an
output current change of 1mA to 1.1A is typically –4.25mV
at VOUT = 1.20V. At VOUT = 5V, load regulation is:
5V
• – 4.25mV = – 17.71mV
1.20V
Output Capacitance
The LT1965’s design is stable with a wide range of output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 10µF with an ESR of 0.3W or less is
recommended to prevent oscillations. The LT1965 is a low
quiescent current device and output load transient response
is a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger current changes.
Ceramic capacitors require extra consideration. Manufacturers make ceramic capacitors with a variety of dielectrics,
each with different behavior across temperature and applied
voltage. The most common dielectrics used are specified
with EIA temperature characteristic codes of Z5U, Y5V,
X5R and X7R. The Z5U and Y5V dielectrics provide high
C-V products in a small package at low cost, but exhibit
strong voltage and temperature coefficients as shown in
Figures 3 and 4. When used with a 5V regulator, a 16V
10µF Y5V capacitor can exhibit an effective value as low
as 1µF to 2µF for the DC bias applied and over the operating temperature range. The X5R and X7R dielectrics yield
much more stable characteristics and are more suitable
for use as the output capacitor. The X7R type works over
a wider temperature range and has better temperature
stability whereas X5R is less expensive and is available in
higher values. Care still must be exercised when using X5R
and X7R capacitors; the X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltages should be verified.
1965fb
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LT1965 Series
Applications Information
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable
amounts of noise. A ceramic capacitor produced the trace
in Figure 5 in response to light tapping from a pencil.
Similar vibration induced behavior can masquerade as
increased output voltage noise.
20
Like many IC power regulators, the LT1965 has safe operating area protection. The safe area protection decreases
current limit as input-to-output voltage increases and keeps
the power transistor inside a safe operating region for all
values of input-to-output voltage. The protective design
provides some output current at all values of input-tooutput voltage up to the device breakdown.
When power is first applied, as input voltage rises, the
output follows the input, allowing the regulator to start up
into very heavy loads. During start-up, as the input voltage
40
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
20
X5R
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
Overload Recovery
–20
–40
–60
Y5V
–80
–100
–20
–40
2
4
8
6
10 12
DC BIAS VOLTAGE (V)
14
Y5V
–60
–80
0
X5R
0
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
16
1965 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
50
25
75
0
TEMPERATURE (°C)
100
125
1965 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
1mV/DIV
VOUT = 1.3V
COUT = 10µF
ILOAD = 0
1ms/DIV
1965 F05
Figure 5. Noise Resulting from Tapping on a Ceramic Capacitor
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13
LT1965 Series
Applications Information
is rising, the input-to-output voltage differential is small,
allowing the regulator to supply large output currents.
With a high input voltage, a problem can occur wherein
removal of an output short will not allow the output to
recover. Other regulators, such as the LT1083/LT1084/
LT1085 family, also exhibit this phenomenon, so it is not
unique to the LT1965.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common situations occur immediately after the removal of a
short-circuit or if the shutdown pin is pulled high after the
input voltage has already been turned on. The load line for
such a load may intersect the output current curve at two
points. If this happens, there are two stable output operating points for the regulator. With this double intersection,
the input power supply may need to be cycled down to
zero and brought up again to make the output recover.
Output Voltage Noise
The LT1965 regulators are designed to provide low output
voltage noise over the 10Hz to 100kHz bandwidth while
operating at full load. Output voltage noise is approximately
80nV/√Hz over this frequency bandwidth for the LT1965
adjustable version. For higher output voltages (generated
by using a resistor divider), the output voltage noise gains
up accordingly.
Higher values of output voltage noise may be measured
if care is not exercised with regard to circuit layout and
testing. Crosstalk from nearby traces can induce unwanted
noise onto the LT1965’s output. Power supply ripple rejection must also be considered; the LT1965 regulators do
not have unlimited power supply rejection and will pass
a small portion of the input noise through to the output.
14
Thermal Considerations
The LT1965’s maximum rated junction temperature of
125°C (LT1965E, LT1965I) or 150°C (LT1965H) limits
its power handling capability. Two components comprise
the power dissipated by the device:
1. Output current multiplied by the input/output voltage
differential: IOUT • (VIN – VOUT), and
2. GND pin current multiplied by the input voltage:
IGND • VIN
GND pin current is determined using the GND Pin Current
curves in the Typical Performance Characteristics section.
Power dissipation equals the sum of the two components
listed.
The LT1965 regulators have internal thermal limiting that
protect the device during overload conditions. For continuous normal conditions, do not exceed the maximum
junction temperature rating of 125°C (E-grade, I-grade) or
150°C (H-grade). Carefully consider all sources of thermal
resistance from junction to ambient including other heat
sources mounted in proximity to the LT1965.
The underside of the LT1965 DFN package has exposed
metal (4mm2) from the lead frame to the die attachment.
The underside of the LT1965 MSOP package also has
exposed metal (3.7mm2). Both packages allow heat to
directly transfer from the die junction to the printed circuit
board metal to control maximum operating junction temperature. The dual-in-line pin arrangement allows metal
to extend beyond the ends of the package on the topside
(component side) of a PCB. Connect this metal to GND
on the PCB. The multiple IN and OUT pins of the LT1965
also assist in spreading heat to the PCB.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
1965fb
For more information www.linear.com/LT1965
LT1965 Series
Applications Information
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on a 2-layer 1/16" FR-4 board with
one ounce copper.
Table 1. Measured Thermal Resistance for DFN Package
Copper Area
Topside*
Backside
2500mm2
2500mm2
2
1000mm
2500mm2
2
225mm
2500mm2
100mm2
2500mm2
2
50mm
2500mm2
*Device is mounted on topside
Board Area
Thermal Resistance
(Junction-to-Ambient)
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
60°C/W
62°C/W
65°C/W
68°C/W
70°C/W
Table 2. Measured Thermal Resistance for MSOP Package
Copper Area
Topside*
Backside
2500mm2
2500mm2
2
1000mm
2500mm2
2
225mm
2500mm2
100mm2
2500mm2
2
50mm
2500mm2
*Device is mounted on topside
Board Area
Thermal Resistance
(Junction-to-Ambient)
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
55°C/W
57°C/W
60°C/W
65°C/W
68°C/W
Table 3. Measured Thermal Resistance for DD-Pak Package
Copper Area
Topside*
Backside
2500mm2
2500mm2
1000mm2
2500mm2
125mm2
2500mm2
*Device is mounted on topside
Board Area
Thermal Resistance
(Junction-to-Ambient)
2500mm2
2500mm2
2500mm2
25°C/W
30°C/W
35°C/W
Calculating Junction Temperature
Example: Given an output voltage of 2.5V, an input voltage range of 3.3V ± 5%, an output current range of 0mA
to 500mA and a maximum ambient temperature of 85°C,
what will the maximum junction temperature be?
The power dissipated by the device equals:
IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX)
where:
IOUT(MAX) = 500mA
VIN(MAX) = 3.465V
IGND at (IOUT = 500mA, VIN = 3.465V) = 8.2mA
So,
P = 500mA(3.465V – 2.5V) + 8.2mA(3.465V) = 0.511W
Using a DFN package, the thermal resistance will be in
the range of 60°C/W to 70°C/W depending on the copper area. So the junction temperature rise above ambient
approximately equals:
0.511W • 65°C/W = 33.22°C
The maximum junction temperature equals the maximum
ambient temperature plus the maximum junction temperature rise above ambient or:
TJMAX = 85°C + 33.22°C = 118.22°C
Protection Features
Measured Thermal Resistance for TO-220 Package
Thermal Resistance (Junction-to-Case) = 3°C/W
The LT1965 regulators incorporate several protection
features that makes them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices also protect
against reverse-input voltages, reverse-output voltages
and reverse output-to-input voltages.
Current-limit protection and thermal overload protection
protect the device against current overload conditions
at its output. For normal operation, do not exceed the
maximum rated junction temperature of 125°C (LT1965E,
LT1965I) or 150°C (LT1965H).
1965fb
For more information www.linear.com/LT1965
15
LT1965 Series
Applications Information
The input of the device withstands reverse voltages of 22V.
The LT1965 limits current flow to less than 1mA (typically
less than 300µA) and no negative voltage appears at the
output. The device protects both itself and the load against
batteries that are plugged in backwards.
The LT1965 incurs no damage if its output is pulled below ground. If the input is left open-circuit or grounded,
the output can be pulled below ground by 22V. For fixed
voltage versions, the output will act like a large resistor,
typically 5k or higher, limiting current flow to typically
less than 300µA. For the adjustable version, the output
acts like an open circuit and no current flows from the
output. However, current flows out of (but is limited by)
the resistor divider that sets the output voltage. If the input
is powered by a voltage source, the LT1965 protects itself
by shutting off the output.
The LT1965 adjustable version incurs no damage if the
ADJ pin is pulled above or below ground by 9V. If the input
is left open-circuit or grounded, the ADJ pin performs like
a diode in series with typically 1.5k of resistance when
pulled below ground and like a large resistor (typically 5k
up to 3V on the ADJ pin and then 1.5k up to 9V) in series
with a diode when pulled above ground.
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.20V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when
the ADJ pin is at 9V. The 11V difference between the OUT
and ADJ pins divided by the 5mA maximum current into
the ADJ pin yields a minimum top resistor value of 2.2k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open-circuit. Current flow back into the output follows the
curve shown in Figure 6.
If the LT1965’s IN pin is forced below the OUT pin or the
OUT pin is pulled above the IN pin, input current typically
drops to less than 2µA. This occurs if the LT1965 input
is connected to a discharged (low voltage) battery and
either a backup battery or a second regulator holds up
the output. The state of the SHDN pin has no effect on
the reverse-output current if the output is pulled above
the input.
In situations where the ADJ pin connects to a resistor
divider that would pull the ADJ pin above its 9V clamp
REVERSE OUTPUT CURRENT (mA)
6
TJ = 25°C
VIN = 0V
5 VOUT = VADJ (LT1965)
VOUT = VSENSE
(LT195-1.5/-1.8/-2.5/-3.3)
4 CURRENT FLOWS INTO
OUTPUT PIN
3
LT1965
LT1965-1.5
2
LT1965-1.8
1
0
LT1965-3.3
0
1
2
LT1965-2.5
3
4
5
6
7
OUTPUT VOLTAGE (V)
9
8
1965 F06
Figure 6. Reverse-Output Current
16
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For more information www.linear.com/LT1965
LT1965 Series
Typical Applications
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
VIN > 3.7V
+
IN
OUT
+
LT1965-3.3
C1
100µF
SHDN
SENSE
3.3V
2.2A
C2
22µF
GND
R2
0.01Ω
IN
OUT
R6
6.65k
1%
LT1965
SHDN
SHDN
R3
2.2k
R4
2.2k 3
2
ADJ
GND
+
–
R5
10k
8
1/2
LT1366
R7
4.02k
1%
1
C3
0.01µF
4
1965 TA03
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
R = 0.125
TYP
5
0.40 ±0.10
8
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.50
BSC
2.38 ±0.05
3.00 ±0.10
(4 SIDES)
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
4
0.25 ±0.05
1
(DD8) DFN 0509 REV C
0.50 BSC
2.38 ±0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
1965fb
For more information www.linear.com/LT1965
17
LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev K)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1
1.88 ±0.102
(.074 ±.004)
0.29
REF
1.68
(.066)
0.889 ±0.127
(.035 ±.005)
0.05 REF
5.10
(.201)
MIN
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
1.68 ±0.102 3.20 – 3.45
(.066 ±.004) (.126 – .136)
8
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ±0.038
(.0165 ±.0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
18
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS8E) 0213 REV K
1965fb
For more information www.linear.com/LT1965
LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461 Rev F)
.256
(6.502)
.060
(1.524)
TYP
.060
(1.524)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.045 – .055
(1.143 – 1.397)
15° TYP
.060
(1.524)
.183
(4.648)
+.008
.004 –.004
+0.203
0.102 –0.102
.059
(1.499)
TYP
.330 – .370
(8.382 – 9.398)
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
DETAIL A
.300
(7.620)
+.012
.143 –.020
+0.305
3.632 –0.508
(
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
.067
(1.702)
.028 – .038 BSC
(0.711 – 0.965)
TYP
)
.013 – .023
(0.330 – 0.584)
.050 ±.012
(1.270 ±0.305)
DETAIL A
0° – 7° TYP
.420
.276
.080
.420
0° – 7° TYP
.325
.350
.205
.585
.585
.320
.090
.090
.067
.042
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.067
.042
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
Q(DD5) 0811 REV F
1965fb
For more information www.linear.com/LT1965
19
LT1965 Series
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
T-Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.147 – .155
(3.734 – 3.937)
DIA
.045 – .055
(1.143 – 1.397)
.230 – .270
(5.842 – 6.858)
.460 – .500
(11.684 – 12.700)
.570 – .620
(14.478 – 15.748)
.330 – .370
(8.382 – 9.398)
.700 – .728
(17.78 – 18.491)
.620
(15.75)
TYP
SEATING PLANE
.152 – .202
.260 – .320 (3.861 – 5.131)
(6.60 – 8.13)
BSC
.067
(1.70)
.095 – .115
(2.413 – 2.921)
.155 – .195*
(3.937 – 4.953)
.013 – .023
(0.330 – 0.584)
.028 – .038
(0.711 – 0.965)
.135 – .165
(3.429 – 4.191)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0801
20
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For more information www.linear.com/LT1965
LT1965 Series
Revision History
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
08/13
Added H-grade, specs and curves
PAGE NUMBER
Lowered max ESR to 0.3Ω
Removed references to “starting up from negative output”
2-10
12
11, 12, 16
1965fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT1965
21
LT1965 Series
Typical Application
Adjustable Current Source
R5, 0.01Ω
VIN > 2.7V
+
IN
R1
1k
C1
10µF
LT1004-1.2
R2
80.6k
R4
2.2k
R3
2k
3
NOTE: ADJUST R1 FOR
0A TO 1.1A CONSTANT-CURRENT
C2
3.3µF
–
+
+
SHDN
ADJ
GND
R6
2.2k
2
LT1965
OUT
R8
100k
C3
1µF
R7
470Ω
8
1
1/2
LT1366
LOAD
C4
10µF
1965 TA04
4
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
LT1129
700mA, Micropower, LDO
VIN: 4.2V to 30V, VOUT(MIN) = 3.8V, VDO = 0.40V, IQ = 50µA, ISD = 16µA;
DD, SOT-223, S8, TO220-5 and TSSOP20 Packages
LT1761
100mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20µA, ISD = < 1µA,
Low Noise < 20µVRMS , Stable with 1µF Ceramic Capacitors, ThinSOT™ Package
LT1762
150mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD = < 1µA,
Low Noise < 20µVRMS , MS8 Package
LT1763
500mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD = < 1µA,
Low Noise < 20µVRMS , S8 Package
LT1764/
LT1764A
3A, Low Noise, Fast Transient Response,
LDO
VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = < 1µA, Low Noise
< 40µVRMS , “A” Version Stable with Ceramic Capacitors, DD and TO220-5 Packages
LTC1844
150mA, Very Low Drop-Out LDO
VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 35µA, ISD = < 1µA,
Low Noise < 60µVRMS , ThinSOT™ Package
LT1962
300mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30µA, ISD = < 1µA,
Low Noise < 20µVRMS , MS8 Package
LT1963/
LT1963A
1.5A, Low Noise, Fast Transient Response, VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = < 1µA,
Low Noise < 40µVRMS , “A” Version Stable with Ceramic Capacitors;
LDO
DD, TO220-5, SOT-223 and S8 Packages
LT3020
100mA, Low Voltage VDO , VIN(MIN) = 0.9V, VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.15V, IQ = 120µA, ISD = 3µA, DFN and
LDO
MS8 Packages
LT3021
500mA, Low Voltage VDO , VIN(MIN) = 0.9V, VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.16V, IQ = 120µA, ISD = 3µA, DFN and
LDO
S8 Packages
LT3023
Dual, 2x 100mA, Low Noise Micropower,
LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40µA, ISD = < 1µA, DFN and
MS10 Packages
LT3024
Dual, 100mA/500mA, Low Noise
Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60µA, ISD = < 1µA, DFN and
TSSOP Packages
LT3027
Dual, 2x 100mA, Low Noise Micropower,
LDO with Independent Inputs
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25µA, ISD = < 1µA,
Low Noise < 20µVRMS , DFN and MS10 Packages
LT3028
Dual, 100mA/500mA, Low Noise
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30µA, ISD = < 1µA,
Micropower, LDO with Independent Inputs Low Noise < 20µVRMS , DFN and TSSOP Packages
LT3080/
LT3080-1
1.1A Parallelable, Low Noise, Low Dropout 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable
Linear Regulator
(No Op Amp Required), Stable with Ceramic Caps, TO-220, SOT-223, MSOP and 3mm ×
3mm DFN Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor
22 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT1965
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT1965
1965fb
LT 0813 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2007
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