MPQ2122 6V, 2A, Low Quiescent Current Dual, SYNC Buck Regulator The Future of Analog IC Technology DESCRIPTION FEATURES The MPQ2122 is an internally-compensated, 1MHz fixed-frequency, dual PWM, synchronous, step-down regulator. The MPQ2122 operates from a 2.7V-to-6V input, generates an output voltage as low as 0.608V, and has a 45µA quiescent current that makes it ideal for powering portable equipment that runs on a single cell lithium-ion (Li+) battery. The MPQ2122 integrates dual 80mΩ high-side switches and 35mΩ synchronous rectifiers for high efficiency without an external Schottky diode. Peak-current mode control and internal compensation limits the minimum number of readily-available external components. • • • • • • • • • • • • • • Fault-condition protections include cycle-by-cycle current limiting and thermal shutdown. APPLICATIONS The MPQ2122 is available in an 8-pin TSOT23-8 package. • • • • • Dual 2A-Output Current >93% Peak Efficiency >80% Light-Load Efficiency Wide 2.7V-to-6V Operating Input Range 80mΩ and 35mΩ Internal Power MOSFET 1MHz Fixed Switching Frequency Adjustable Output from 0.608V to VIN 180° Phase-Shifted Operation 100% Duty-Cycle Operation 45µA Quiescent Current Cycle-by-Cycle Over-Current Protection Short-Circuit Protection with Hiccup Mode Thermal Shutdown Available in an 8-pin TSOT23-8 Package Small/Handhold Devices DVD Drivers Portable Instruments Smartphones and Feature Phones Battery-Powered Devices All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 100 90 80 70 60 50 40 30 0.01 0.1 MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 10 1 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR ORDERING INFORMATION Part Number* MPQ2122GJ Package TSOT23-8 Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MPQ2122GJ–Z). TOP MARKING AED: product code of MPQ2122GJ; Y: year code; PACKAGE REFERENCE TOP VIEW FB2 1 8 FB1 EN2 2 7 IN SW2 3 6 SW1 EN1 4 5 GND TSOT23-8 MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply Voltage VIN.....................................6.5V VSW–0.3V (-3V for<10ns) to 6.5V (7.5V for<10ns) All Other Pins ............................ –0.3V to +6.5 V Junction Temperature .............................. 150°C Lead Temperature ................................... 260°C (2) Continuous Power Dissipation (TA = +25°C) ................................................................ 1.25W TSOT23-8 ..................................... 100 ..... 55 °C/W Recommended Operating Conditions (3) Supply Voltage VIN ............................ 2.7V to 6V Output Voltage VOUT................... 0.608V to 5.5V Operating Junction Temp. ........ -40°C to +125°C (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR ELECTRICAL CHARACTERISTICS (5) VIN = VEN = 3.6V, TJ = -40ºC to + 125°C, unless otherwise noted. Typical values are at TJ=25ºC. Parameters Supply Current (Quiescent) Shutdown Current IN Under-Voltage Lockout Threshold IN Under-Voltage Lockout Hysteresis Regulated FB Voltage FB Input Current EN, HIGH Threshold EN, LOW Threshold Internal Soft-Start Time High-Side Switch, ONResistance Low-Side Switch, ONResistance Symbol Condition VIN=3.6V, TJ = +25°C IQ VEN=2V, VFB = 0.65V TJ = -40°C to +125°C VEN = 0V TJ = +25°C Rising edge VFB Max 35 45 55 30 45 60 0 1 μA 2.5 2.6 V 2.4 TA = +25°C TJ = -40°C to +125°C VFB = 0.608V –40°C ≤ TJ ≤ +125°C –40°C ≤ TJ ≤ +125°C 0.596 0.59 0.608 0.608 ±10 Units μA mV 0.620 0.626 50 V 0.5 nA V V ms RDSON_P VIN=5V 80 mΩ RDSON_N VIN=5V 35 mΩ 1.2 0.4 τSS VEN = 0V; VIN = 6V VSW = 0V and 6V High-Side Switch, Current Limit Sourcing, D=40% TJ = +25°C TJ = +25°C TJ = -40°C to +125°C Both channels work in CCM Oscillator Frequency Phase Shift (6) Typ 300 SW Leakage Current Minimum ON Time Minimum OFF Time Maximum Duty Cycle Thermal Shutdown (6) Threshold Min τON_MIN τOFF_MIN Hysteresis = 30°C –1 0 1 2.8 2.3 0.8 3.5 3.5 1 180 4.5 4.5 1.2 μA A MHz degree 90 100 100 ns ns % 160 °C Notes: 5) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. 6) Guarantee by design MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. 100 100 90 90 80 80 70 70 60 60 -0.1 50 50 -0.2 40 40 30 0.01 0.1 1 10 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 0.20.40.60.8 1 1.21.4 1.61.8 2 2.2 30 0.4 0.3 0.2 0.1 0 -0.3 -0.4 0.01 1 10 -0.5 0 0.20.4 0.6 0.8 1 1.2 1.41.6 1.8 2 2.2 80 615 70 610 60 605 50 600 40 595 30 590 -60 -40 -20 5 1.15 4.5 1.1 4 1.05 3.5 1 3 0.95 2.5 0.9 2 0.85 1.5 0 20 40 60 80 100 0.1 620 1.2 0.8 -60 -40 -20 0.5 1 -60 -40 -20 0 20 40 60 80 100 20 -60 -40 -20 0 20 40 60 80 100 30 25 20 15 10 5 0 20 40 60 80 100 0 0 0.5 1 1.5 MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 2.5 5 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. 40 35 30 25 20 15 10 5 0 0 0.5 1 1.5 2 2.5 MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. EN on without load EN on with half load EN on with full load IOUT1 = IOUT2= 0A IOUT1 = IOUT2= 1A IOUT1 = IOUT2= 2A VOUT1 1V/div. VOUT1 1V/div. VOUT1 1V/div. VOUT2 1V/div. VOUT2 1V/div. VOUT2 1V/div. EN 5V/div. EN 5V/div. EN 5V/div. EN down without load EN down with half load EN down with full load IOUT1 = IOUT2= 0A IOUT1 = IOUT2= 1A IOUT1 = IOUT2= 2A VOUT1 1V/div. VOUT1 1V/div. VOUT1 1V/div. VOUT2 1V/div. VOUT2 1V/div. VOUT2 1V/div. EN 5V/div. EN 5V/div. EN 5V/div. 1s/div. Vin Power On without Ioad Vin Power On Vin Power On IOUT1 = IOUT2= 0A IOUT1 =1A, IOUT2= 0A IOUT1 = 2A, IOUT2= 0A VOUT1 1V/div. VOUT2 5V/div. VOUT1 1V/div. VOUT2 5V/div. VOUT1 1V/div. VOUT2 5V/div. SW 2V/div. SW 5V/div. SW 5V/div. IL1 500mA/div. IL1 1A/div. IL1 2A/div. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. Vin Power down Vin Power down Vin Power down IOUT1 = IOUT2= 0A IOUT1 = 1A, IOUT2= 0A IOUT1 = 2A, IOUT2= 0A VOUT1 1V/div. VIN 5V/div. SW 2V/div. IL1 500mA/div. VOUT1 1V/div. VOUT1 1V/div. VIN 5V/div. SW 5V/div. VIN 5V/div. SW 5V/div. IL1 1A/div. IL1 2A/div. 40ms/div. 10ms/div. 10ms/div. Enable on Enable on Enable on IOUT1 = IOUT2= 0A IOUT1 = 1A, IOUT2= 0A IOUT1 = 2A, IOUT2= 0A VOUT1 1V/div. VOUT1 1V/div. VOUT1 1V/div. VIN 5V/div. VIN 5V/div. VIN 5V/div. SW 5V/div. SW 5V/div. SW 5V/div. IL1 500mA/div. IL1 1A/div. IL1 2A/div. Enable down Enable down Enable down IOUT1 = IOUT2= 0A IOUT1 =1A, IOUT2= 0A IOUT1 = 2A, IOUT2= 0A VOUT1 1V/div. VOUT1 1V/div. VOUT1 1V/div. VIN 5V/div. VIN 5V/div. VIN 5V/div. SW 5V/div. SW 5V/div. SW 5V/div. IL1 500mA/div. IL1 1A/div. IL1 2A/div. 1s/div. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L = 1.5µH, COUT1=COUT2=22µF, TA = 25°C, unless otherwise noted. VOUT1 AC Coupled 100mV/div. VOUT2 AC Coupled 100mV/div. VSW1 5V/div. VSW2 5V/div. IOUT1 1A/div. IOUT2 1A/div. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 10 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR PIN FUNCTIONS Package Pin # Name 1 FB2 Feedback 2. Error amplifier input. Connect to the tap of an external resistor divider between the output and GND. Sets the regulation voltage. 2 EN2 Channel 2 Enable. Buck. 3 SW2 Switch Node Connects to the channel 2 internal high-side and low-side power MOSFETs..Connects to the inductor. 4 EN1 Channel 1 Enable. Buck. 5 GND Ground. 6 SW1 Switch Node Connects to the channel 1 internal high-side and low-side power MOSFETs..Connects to the inductor. 7 IN 8 FB1 Description Input Supply. Requires a decoupling capacitor to ground to reduce switching spikes. Feedback 1. Error amplifier input. Connect to the tap of an external resistor divider between the output and GND. Sets the regulation voltage. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR UVLO VIN UVLO & Bandgap MAIN SWITCH PCH 0.608V INTERNAL SS FB1 CONTROL LOGIC COMP1 0.608V PWM SW1 Hi-Z ISLOPE1 EN1 PH1 Slope Comp SYNCHRONOUS RECTIFIER NCH OSC1 LOW SIDE GATE DRIVER 1MHz OSCILLATOR GND PH2 EN2 VIN Slope Comp OSC2 MAIN SWITCH PCH ISLOPE2 INTERNAL SS FB2 0.608V COMP2 CONTROL LOGIC PWM SW2 Hi-Z SYNCHRONOUS RECTIFIER NCH LOW SIDE GATE DRIVER GND Figure 1: Functional Block Diagram MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR OPERATION MPQ2122 is a fully-integrated, dual-channel, synchronous, step-down converter. Both channels have peak-current modes with internal compensation for faster transient responses and cycle-by-cycle current limits. When either channel enters DCM or lowdropout operation, this channel will not be controlled by the internal 1MHz oscillator. Condition CH1 CH2 MPQ2122 is optimized for low-voltage, portable applications where efficiency and small size are critical. 1 Heavy Load 180° Phase-Shift 2 Light Load By default, the MPQ2122’s two channels operate at a 180° phase-shift to reduce input current ripple: The smaller current ripple allows for a smaller input bypass capacitor. In CCM, two internal clocks control the switching: The high-side MOSFET turns on at the corresponding CLK’s rising edge. 3 Low Dropout 4 5 6 7 8 CLK1 o CLk1, 2 has a 180 phase shift 9 CLK2 Heavy Load Light Load Heavy Load Low Dropout Light Load Low Dropout Light Load Heavy Load Low Dropout Heavy Load Low Dropout Light Load Mode CH1 1MHz CCM DCM Fixed OFF Time 0.95MHz CCM DCM 0.95MHz CCM Fixed OFF Time DCM Fixed OFF Time CH2 1MHz CCM,0° Phase DCM Fixed OFF Time DCM 0.95MHz CCM Fixed OFF Time 0.95MHz CCM Fixed OFF Time DCM Soft Start SW1 SW2 t Figure 2: Clock/Switching Timing However, the switching frequency for each channel falls when operating at low dropout, so the MPQ2122 operates at a default switching frequency of 1MHz with a fixed OFF time. After the input voltage recovers, switching for PWM mode resumes normally and synchronizes with the master oscillator for phase-shifted operation. Light-Load Operation In light loads, the MPQ2122 uses a proprietary control scheme to save power and improve efficiency. The MPQ2122 will turn off the low side switch when inductor current starts to reverse. Then MPQ2122 works in discontinuous conduction mode (DCM) operation. MPQ2122 has a built-in soft start that ramps up the output voltage at a controlled slew rate to start-up overshoot. The soft-start time is ~0.5ms. Current Limit and Short-Circuit Recovery Each channel’s high-side switch has a 3.5A (typ.) current limit. The MPQ2122 treats any current-limit condition that remains for 400us as a short and enter hiccup mode. The MPQ2122 disables its output power stage in hiccup mode, and then slowly discharges the soft-start capacitor before initiating soft-start. If the short-circuit condition remains, the MPQ2122 repeats this operation till the short circuit disappears and output returns to the regulation level. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR APPLICATION INFORMATION The maximum inductor peak current is: COMPONENT SELECTION Output Voltage External resistor dividers connected to the FB pins set the output voltages. The feedback resistor connected to FB1 (R1) also sets the feedback loop bandwidth (fC). fC does not exceed 0.1×fSW. When using a ceramic output capacitor (CO), set the range to 50kHz and 100kHz for optimal transient performance and good phase margin. When using an electrolytic capacitor, set the loop bandwidth no higher than 1/4 the ESR zero frequency (fESR). fESR is: fESR = 1 2π ⋅ RESR ⋅ CO We suggest using a 600k to 800k resistor for R1 when CO=22μF. R2 is then: R2 = R1 VOUT −1 0.608V Table 1: Resistor Values vs. Output Voltage VOUT R1 R2 L COUT (Ceramic) 1.2V 806kΩ 825kΩ 0.47μH-2.2μH 22μF 1.5V 806kΩ 549kΩ 0.47μH-2.2μH 22μF 1.8V 806kΩ 412kΩ 0.47μH-2.2μH 22μF 2.5V 806kΩ 261kΩ 1μH-4.7μH 22μF 3.3V 806kΩ 182kΩ 1μH-4.7μH 22μF Inductor Selection Use a 1.5µH-to-2.2µH inductor with a DC current rating of at least 1.25 times the maximum load current for most applications. For best efficiency, select an inductor with a DC resistance <20mΩ. See Table 2 for recommended inductors. For most designs, estimate the inductance value using the following equation: L= VOUT (VIN − VOUT ) VIN ⋅ ΔIL ⋅ fOSC Where ∆IL is the inductor ripple current. Select an inductor ripple current equal to approximately 30% of the maximum load current, 2A. IL(MAX) = ILOAD + ΔIL 2 Table 2: Suggested Surface-Mount Inductors Part Number Vendor L (μH) DCR (mΩ) SC (A) LxWxH 3 (mm ) WURTH 744777002 2.2 13 6 7.3×7.3×4.5 744310200 2 14.2 6.5 7×6.9×3 8 6.5 7.8×6.8×3.2 TDK RLF7030T1R5N6R1-T 1.5 Input Capacitor The input capacitor reduces the surge current drawn from the input and the switching noise from the device. Select an input capacitor with a switching-frequency impedance that is less than the input source impedance to prevent highfrequency-switching current from passing to the input source. Use low-ESR ceramic capacitors with X5R or X7R dielectrics with small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Output Capacitor The output capacitor limits the output voltage ripple and ensures a stable regulation loop. Select an output capacitor with low impedance at the switching frequency. Use ceramic capacitors with X5R or X7R dielectrics. Using an electrolytic capacitor may result in additional output voltage ripple, thermal issues, and requires additional care in selecting the feedback resistor (R1) due to the large ESR. The output ripple (∆VOUT) is approximately: ΔVOUT = ⎞ VOUT (VIN − VOUT ) ⎛ 1 ⋅ ⎜ ESR + ⎟ VIN ⋅ fOSC ⋅ L 8 ⋅ fOSC ⋅ CO ⎠ ⎝ Power Dissipation IC power dissipation plays an important role in circuit design—not only because of efficiency concerns, but also because of the chip’s thermal requirements. Several parameters influence power dissipation, such as: • Conduction Loss (Cond) • Dead Time (DT) MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR • Switching Loss (SW) • MOSFET Driver Current (DR) • Supply Current (S) external feedback resistors next to the FB pin. Keep the switching node SW short and away from the feedback network. The circuit of below PCB layout is shown in Figure 4. AGND Based on these parameters, we can estimate the power loss as: R4 PLOSS = PCond + PDT + PSW + PDR + PS Thermal Regulation As previously discussed, changes in IC temperature change the electrical characteristics, especially when the temperature exceeds the IC’s recommended operating range. Managing the IC’s temperature requires additional considerations to ensure that the IC runs below the maximum-allowable temperature. While operating the IC within recommended electrical limits is a major component to maintaining proper thermal regulation, specific layout designs can improve the thermal profile while limiting costs to either efficiency or operating range. For the MPQ2122, connect the ground pin on the package to a GND plane on top of the PCB to use this plane as a heat sink. Connect this GND plane to GND planes beneath the IC using vias to further improve heat dissipation. However, given that these GND planes can introduce unwanted EMI noise and occupy valuable PCB space, design the size and shape of these planes to match the thermal resistance requirement: θSA = θJA − θJC However, connecting the GND pin to a heat sink can not guarantee that the IC will not exceed its recommended temperature limits; for instance, if the ambient temperature exceeds the IC’s temperature limits. If the ambient air temperature approaches the IC’s temperature limit, options such as derating the IC so it operates using less power can help prevent thermal damage and unwanted electrical characteristics. PCB Layout Proper layout of the switching power supplies is very important, and sometimes critical for proper function: poor layout design can result in poor line or load regulation and stability issues. R2 R1 R3 EN2 SW2 VIN 1 8 2 7 3 6 4 5 C1A C1B SW1 EN1 C5 C3 OUT2 C6 GND C4 OUT1 Figure 3: Suggested PCB Layout Design Example Below is a design example following the application guidelines for the specifications: Table 3: Design Example VIN 5V VOUT1 1.8V VOUT2 1.2V The detailed application schematic is shown in Figure 1. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. Place the high-current paths (GND, IN and SW) very close to the device with short, direct, and wide traces. Place the input capacitor as close as possible to the IN and GND pins. Place the MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 15 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR TYPICAL APPLICATION CIRCUITS Figure 4: Typical Application Circuit MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 16 MPQ2122 –6V, 2A, LOW QUIESCENT CURRENT, DUAL, SYNC BUCK REGULATOR PACKAGE INFORMATION TSOT23-8 See note 7 EXAMPLE TOP MARK PIN 1 ID IAAAA RECOMMENDED LAND PATTERN TOP VIEW SEATING PLANE SEE DETAIL'' A'' FRONT VIEW SIDE VIEW NOTE: DETAIL ''A'' 1) ALL DIMENSIONS ARE IN MILLIMETERS . 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-193, VARIATION BA. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ2122 Rev. 1.0 www.MonolithicPower.com 3/2/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 17