M21324 SD, HD, 3G Cable Equalizer
The M21324 is a high-speed, low-power, adaptive co-axial cable equalizers designed to increase the maximum
low-jitter transmission distance of serial digital interface (SDI) video signals and DVB-ASI across commonly used
bandwidth-limiting 75Ω coaxial cable. This device automatically optimizes the transfer function based on the bit rate
and cable length to minimize the inter-symbol interference (ISI) jitter caused by the cable and to remove the DC
offset components introduced with the pathological test pattern and AC coupling in systems.
The M21324 is designed to support SD, HD, and 3G data rates from 143 Mbps to 2970 Mbps.
The low-noise, high-gain equalizer allows for low jitter 3G transmissions up to 100m (Belden 1694A) and HD
transmissions up to a length of 200m (Belden 1694A) and 120m (Belden 8281). For SD data rates, cable lengths
up to 400m (Belden 1694A) and 300m (Belden 8281) are supported.
The M21324 shares the same footprint as the GS2974A, GS1574/GS1574A or GS9074A, except that the M21324
has a shared Signal Detect/Mute function pin, while the GS2974A, GS1574/1574A and GS9074A have separate
CD and mute pins.
Applications
Features
•
•
•
•
• Adaptive cable equalization
• Optimized data rate from 143 Mbps to 2.97 Gbps
• Typical equalized length of Belden 1694A cable: 100m at 2.97 Gbps,
200m at 1.485 Gbps, and 400m at 270 Mbps
• Programmable mute level
• Manual bypass mode
• Differential CML outputs (50 Ω on-chip terminations)
• Single 3.3V power supply
• Small form factor (4x4mm, 16-pin QFN package)
• Pb-free and RoHS compliant
• Extended operating temperature range: –10 to +85 °C
SDI Routers
SDI Switches
SDI Distribution Amplifiers
SDI Camera
Standards Compliance
• SMPTE 259, SMPTE 292M, SMPTE 344M,
SMPTE 424M complaint
• Supports DVB-ASI (270 Mbps)
Functional Block Diagram
SD/ MUTE
M21324
Cable Equalizer
SDI
SDI
THRESH
CONTROL
LOGIC
1
INPUT
BUFFER
EQUALIZER
SDO
DC
RESTORE
CORE
0
OUTPUT
BUFFER
SDO
EQ_ BYP
21324-DSH-001-D
Mindspeed Technologies®
Mindspeed Proprietary and Confidential
March 2010
Ordering Information
Part Number
Package
Operating Data Rate
Operating Temperature
M21324G-13*
16-pin QFN (RoHS compliant)
143–2970 Mbps
–10 °C to 85 °C
* Consult the price list for exact part number when ordering.
* The letter ‘G’ designator after the part number indicates a RoHS-compliant package. Refer to www.mindspeed.com for additional information.
Revision History
Revision
Level
Date
D
Released
March 2010
C
Released
November 2009
Description
Replaced MLF with QFN references.
Updated for -13 part.
Added marking diagram.
B
Released
August 2007
Added θJA (Junction to Ambient Thermal Resistance) to Table 1-2.
A
Preliminary
August 2007
Preliminary Release.
M21324 Marking Diagram
32413
Lot #
Date and Country
21324-DSH-001-D
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2
Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.0
Product Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
1.2
Input/Output Level Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.3
EQ Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
1.4
Package Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
1.5
1.4.1
Mechanical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Manufactureability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
1.6
1.5.1
Electrostatic Discharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
1.5.2
Peak Reflow Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
1.5.3
Moisture Sensitivity Level (MSL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Design Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
1.6.1
2.0
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2.2
2.1.1
General Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2.1.2
High-Speed Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2.1.3
High-Speed Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.1.4
Adaptive Equalization Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.1.5
Output Mute and Signal Detect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.1.6
Equalizer Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
M21324 Common Signals by Interface Group. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
2.2.1
M21324 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
A.1
Glossary of Terms/Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
A.2
Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
A.2.1
21324-DSH-001-D
External . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
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List of Figures
Figure 1-1.
Output Symbols Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 1-2.
M21324 Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 1-3.
M21324 Packaging Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 2-1.
Single-ended Typical Input Matching/Termination Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Figure 2-2.
Test Setup Diagram for Cable Equalizer Evaluation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
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List of Tables
Table 1-1.
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 1-2.
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 1-3.
Power DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 1-4.
CMOS Input Electrical Specifications (Logic Signals Only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 1-5.
High Speed Input Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 1-6.
High Speed Output Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Table 1-7.
Cable Equalizer Distance Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 1-8.
SD/MUTE Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 2-1.
Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 2-2.
High-speed Signal Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 2-3.
Control/Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
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1.0 Product Specification
1.1
General Specifications
Table 1-1.
Absolute Maximum Ratings
Symbol
Parameter
Minimum
Maximum
Units
AVDD
Positive Supply
AVSS – 0.5
AVSS + 3.6
V
VIOAM
Any I/O pin
AVSS – 0.5
AVDD + 0.5
V
TSTORE
Storage Temperature
–65
+150
°C
ESDHBML
Human Body Model (low-speed)
2000
—
V
ESDHBMH
Human Body Model (high-speed)
2000
—
V
ESDCDM
Charge Device Model
500
—
V
NOTE:
1.
No Damage.
Table 1-2.
Recommended Operating Conditions
Symbol
Parameter
Notes
Minimum
Typical
Maximum
Units
AVDD
Supply Voltage
—
–5
3.3
+5
%
TAMB
Ambient Temperature
—
–10
—
+85
°C
Junction to Ambient Thermal Resistance
1, 2
—
44.5
—
°C/W
Notes
Minimum
Typical
Maximum
Units
1
—
70
90
mA
1, 2, 3
—
230
312
mW
θJA
NOTES:
1.
Mounted on multi layer board (≥ 4 layers).
2.
Airflow = 0.0 m/s.
Table 1-3.
Power DC Electrical Specifications
Symbol
Total IDD
PDISS
Parameter
Supply Current
Total Power Dissipation (@3.3V)
NOTES:
1.
Specified at recommended operating conditions—see Table 1-2.
2.
Includes on-chip power dissipation as well as off-chip power dissipated by termination resistors.
3.
Typical calculated at nominal supply voltage, maximum calculated at nominal supply voltage + 5%.
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Product Specification
1.2
Input/Output Level Specifications
Table 1-4.
CMOS Input Electrical Specifications (Logic Signals Only)
Symbol
Parameter
Notes
Minimum
Typical
Maximum
Units
VIH
Input Logic High Voltage
1
0.75 x AVDD
—
AVDD + 0.3
V
VIL
Input Logic Low Voltage
1
0
—
0.25 x AVDD
V
IIH
Input Current (logic high)
1
–100
—
100
μA
IIL
Input Current (logic low)
1
–100
—
100
μA
NOTE:
1.
Specified at recommended operating conditions—see Table 1-2. Spec is for a max load of 20 pF.
Table 1-5.
High Speed Input Electrical Specifications
Symbol
DRIN
Parameter
Input Bit Rate
Notes
Minimum
Typical
Maximum
Units
1
143
—
2970
Mbps
VID
Input Voltage Range with 0m of cable, p-p
1, 5
700
800
1200
mV
VICM
Input Common-Mode Voltage
1, 4
—
2.75
—
V
CIN
Input capacitance
1, 4
—
0.5
—
pF
RIN
Input resistance
1, 4
—
1.6
—
kΩ
S11
Input Return Loss (5 MHz to 1.5 GHz)
1, 2, 3
20
30
—
dB
Input Return Loss (1.5 GHz to 3 GHz)
1, 2, 3
—
13
—
dB
NOTES:
1.
Specified at recommended operation conditions—see Table 1-2.
2.
Using the recommended input termination shown in Figure 2-1.
3.
Measured single ended.
4.
Guaranteed by design.
5.
This is also the recommended cable launch level (far end).
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Product Specification
Table 1-6.
High Speed Output Electrical Specifications
Symbol
Notes
Minimum
Typical
Maximum
Units
Rise/Fall Time (20%–80%)
1, 2, 7
—
100
120
ps
tr/tfmm
Rise/Fall Time Mismatch
1, 2, 7
—
0
30
ps
DCDO
Duty Cycle Distortion (DCD)
1, 2, 5, 6
—
0
15
ps
1, 3
600
750
950
mV
1, 3, 4
—
AVDD – 0.205
—
V
1
40
50
60
Ω
tr/tf
Parameter
VOD
Differential Output Voltage p-p
VOCM
Common mode Voltage
ZO
Internal Output Termination Resistance to AVDD
NOTES:
1.
Specified at recommended operation conditions—see Table 1-2.
2.
With 100Ω differential termination.
3.
With 50Ω to AVDD termination.
4.
Outputs DC-coupled.
5.
Duty Cycle Distortion (DCD) is defined as the difference in the intrinsic jitter at the 50% voltage level and the intrinsic jitter at the rising/falling
edge crossing point. If the rising/falling edge crossing point is at the 50% voltage level, then DCD = 0.
6.
Measured with a 1010 pattern.
7.
Measured with a PRBS23 pattern.
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Product Specification
Figure 1-1.
Output Symbols Definition
tr
tf
VOH
JOPP
VOD VOCM
VOL
VOH: Average voltage high level
VOL: Average voltage low level
VOD: (VOH) – (VOL)
VOCM: Common Mode Voltage
JOPP: Output Jitter Peak-Peak
tr: 20-80% Rise Time
tf: 80-20% Fall Time
NOTE: Waveform above is differential.
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Product Specification
1.3
Table 1-7.
EQ Specifications
Cable Equalizer Distance Specifications
Symbol
Parameter
LENSD
Max Cable Length
LENHD
LEN3G
Conditions
Notes
Minimum
Typical
Maximum
Units
Belden 1694A
1, 4
—
400
—
m
Max Cable Length
Belden 8281
1, 4
—
300
—
m
Max Cable Length
Belden 1694A
2, 6
—
200
—
m
Max Cable Length
Belden1694A
2, 5
—
140
—
m
Max Cable Length
Belden 8281
2, 5
—
120
—
m
Max Cable Length
Belden 1694A
3, 7
—
100
—
m
Notes
Minimum
Typical
Maximum
Units
NOTES:
Entire table specified at recommended operating conditions—see Table 1-2.
1. Data Rate = 270 Mbps.
2.
Data Rate = 1485 Mbps.
3.
Data Rate = 2970 Mbps.
4.
Error Free with timing Jitter typically = 0.2 UI, pathological pattern.
5.
Error Free with alignment Jitter typically = 0.25 UI, pathological pattern.
6.
Error Free with alignment jitter typically = 0.3 UI, pathological pattern.
7.
Error Free with alignment Jitter typically = 0.35 UI, pathological pattern.
Table 1-8.
SD/MUTE Specifications
Symbol
Parameter
VMUT_LO
Output voltage when input signal detected
1
—
0.16 x AVDD
—
V
VMUT_HI
Output voltage when input signal not detected
1
—
0.95 x AVDD
—
V
NOTE:
1.
Specified at recommended operating condition—see Table 1-2.
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Product Specification
1.4
Package Specification
The pin assignment is illustrated in Figure 1-2. The M21324 package is RoHS compliant. This package is
backwards compatible with the standard soldering techniques as defined in JEDEC-STD-020C (SnPb Process).
2
SDI
3
SD/MUTE
NC
AV DD
14
13
CENTER PAD
AVSS
5
6
7
8
THRESH
4
EQ_BYP
SS
15
1
SDI
AV
21324-DSH-001-D
SS
16
AGC
AV
AV DD
M21324 Pin Assignments
AGC
Figure 1-2.
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AV
11
SD0
10
SD0
9
AV
SS
SS
11
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A
SLP
0.850
0.800
0.750
0.700
0.900
MIN.
0.800
TSLP
NOM.
MAX.
BUT WITH DIFFERENT THICKNESS:
1) TSLP AND SLP SHARE THE SAME EXPOSE OUTLINE
NOTE:
TOP VIEW
0.000-0.050
0.350±0.050
0.650 Bsc
SIDE VIEW
BOTTOM VIEW
4.000
1.950
Ref.
2.755±0.050
Exp.DAP
0.203 Ref.
2.760±0.050
Exp.DAP
0.400±0.050
PIN #1 IDENTIFICATION
CHAMFER 0.350 X 45˚
Figure 1-3.
16L T/SLP
(4x4mm)
4.000±0.050
1.4.1
4.000±0.050
PIN 1 DOT
BY MARKING
Product Specification
Mechanical Description
The package for the M21324 is illustrated in Figure 1-3 below.
M21324 Packaging Details
Please see Amkor’s Application Note for PCB footprint (referenced in the Section A.2.1).
12
Product Specification
1.5
Manufactureability
The values shown in this section may change; however, these are standard requirements.
1.5.1
Electrostatic Discharge
Tested per JESD22-A114. This device passes 2000V of ESD Human Body Model (HBM) testing.
Tested per JESD22-C101. This device passes 500V of ESD Charged Device Model (CDM) testing.
Tested per EIA/JESD78. This device passes 150mA of trigger current at 85°C during Latchup testing.
1.5.2
Peak Reflow Temperature
M21324G (RoHS compliant package): Peak reflow temperature is 260°C per JEDEC standards.
1.5.3
Moisture Sensitivity Level (MSL)
All versions of this device (Std Pb-type and RoHS compliant packages) are Moisture Sensitivity Level (MSL) 3 per
J-STD-020B and J-STD-033.
1.6
Design Considerations
See Digital Video Interfacing Application Note (212xx-APP-001-A) for guidance on the following:
•
Component Placement and Layout
•
Routing Considerations
1.6.1
Thermal Considerations
The M21324 consumes less power than legacy devices, therefore they will contribute less thermal energy and
should result in a lower operating temperature.
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2.0 Functional Description
2.1
Pin Descriptions
2.1.1
General Nomenclature
Throughout this data sheet, physical pins will be denoted in BOLD print.
2.1.2
High-Speed Input
Digital video coaxial cables are AC-coupled to the high-speed low-noise inputs, SDI/SDI, which, are designed to
operate in both the single-ended or differential mode. The typical application is single-ended into the non-inverting
SDI input with the inverting SDI input biased to match the bias on the input used.
The M21324 does not contain any internal input terminations and require both external input termination as well as
the matching circuit to exceed the SMPTE input return loss specifications. The package and IC design of the
M21324 has been optimized for high-speed performance, allowing them to exceed the SD/HD SMPTE return loss
spec by 5 dB to 10 dB, using the recommended external matching/termination network and commonly employed
right-angle, through-hole, or vertical mount 75Ω BNC connectors. For non-inverting single-ended operation, the
recommended input circuit is shown in Figure 2-1. For differential operation, the matching/termination circuit on
SDI should be duplicated on SDI. The internal pull ups automatically bias SDI/SDI for proper AC coupled operation.
Figure 2-1.
Single-ended Typical Input Matching/Termination Network
8.2 nH
M21324
BNC
4.7 μF
SDI
75Ω
75Ω
SDI
4.7 μF
37.5Ω
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Functional Description
2.1.3
High-Speed Outputs
The high-speed differential outputs after equalization are made available on the SDO/SDO pins. The output swing
and common-mode is compatible with the GS2974/GS2974A, GS1574/GS1574A and GS9074A.
2.1.4
Adaptive Equalization Selection
In typical operation, the adaptive equalization is enabled with EQ_BYP = Low; however, with EQ_BYP = High, the
adaptive equalization and DC restore circuit is bypassed and the input is fed directly to the output.
2.1.5
Output Mute and Signal Detect
When configured as an input by forcing a voltage on SD/MUTE = High (Vdd), the output of the M21324 will be
inhibited at logic low (outputs muted). When SD/MUTE = Low (Vss), the output is never muted and the
programmable cable length based mute function is disabled.
When tied to a high-impedance input or left floating, the programmable inhibit based on cable length is enabled and
the pin is defined as an LOS output (logic). In the event of an LOS, the output is muted. The inhibit threshold is set
with an analog voltage applied to the THRESH input pin, this threshold will depend on cable type (e.g. Belden
1694A or 8281). To achieve maximum cable length equalization, the THRESH pin should be left open. Decoupling
capacitors should be used between the THRESH pin and GND.
2.1.6
Equalizer Detailed Description
The basic equalizer design consists of interlaced stages of gain and equalization to maximize both the overall
equalization gain as well as the input sensitivity for maximum performance with minimum jitter. In order to achieve
maximum distance at 270 Mbps, 1485 Mbps and 2970 Mbps with Belden 1694A, the overall equalizer block has
over 50 dB of broadband signal boost and maintains an input sensitivity of approximately 10 mV. Using a highperformance silicon process, high gain-bandwidth products are achieved allowing for high-performance, wide
dynamic range design with minimum power dissipation.
Since signals are launched with different SMPTE specified rise and fall times which can vary substantially
(especially at the receive end after going though a wide dynamic range of valid cable lengths) the equalization
routine determines both the bit rate and the resultant signal HF attenuation as opposed to just looking at the launch
edge rates. By determining both sets of conditions, it is possible to optimize the equalizer for the different rates. For
example, the M21324 maintains the same maximum cable length as optimized SD only equalizers. An SD signal
through a short cable can have the same edge rate as a HD signal through a long cable; yet, both conditions
require different levels of equalization as well as different optimized inverse-transfer functions. The advanced
equalization technology can make the distinction between the two cases for optimal performance. This also leads
to proper mute threshold (THRESH) that is independent of the bit rate.
In order to accommodate both the SMPTE worst case equalizer pathological patterns as well as some customer
derived worst case DC offset patterns, a high-gain slicer is included in the signal path to correct for any eyecrossing wander due to AC coupling of the input. Figure 2-2 shows the test setup used by Mindspeed to evaluate
the performance of the M21324.
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Functional Description
Figure 2-2.
Test Setup Diagram for Cable Equalizer Evaluation
Multi-Rate Video
Pattern Generator
75Ω Coaxial Cable
2.2
Table 2-1.
Multi-Rate Video
Monitor
Power Pins
Pin Number
AVSS
1, 4, 9, 12
AVDD
13, 16
Center Pad
—
Function
Type
Ground
Power
Positive Supply
Power
Chip Ground
Power
High-speed Signal Pins
Pin Name
Pin Number
SDI/SDI
2, 3
SDO/SDO
11, 10
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M21328
Cable
Driver
M21324 Common Signals by Interface Group
Pin Name
Table 2-2.
M21324
Cable
Equalizer
Function
Non-inverting and Inverting Serial Data Input to the adaptive equalizer
Non-inverting and Inverting Differential Serial Data Output
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I—AC coupled high speed
O—High speed CML
16
Functional Description
2.2.1
Table 2-3.
M21324 Pins
Control/Interface Pins
Pin Name
Pin Number
AGC/AGC
5, 6
EQ_BYP
7
Function
External AGC (Automatic Gain Control) capacitor connection points.
Use 1.0uF capacitor.
Input control signal that when enabled (High) bypasses the inputs
directly to the output stage.
Default
Type
Internal pull up
Analog
Internal pull down
I—CMOS
N/A
N/A
Low = Normal operation
High = Disables EQ and bypasses input to output
NC
14
Internal, no connection. Mute not available on this pin
THRESH
8
Input control signal voltage. Programmable cable length forced mute
threshold. This function is disabled if SD/MUTE = Low
Internal pull down
Analog
SD/MUTE
15
Bidirectional Signal that can be used as an input control signal or as an
output status indicator.
—
I/O
When configured as an input by forcing a voltage on SD/MUTE = High,
the SDO outputs will be inhibited at logic low (outputs muted). See
Table 1-4 for levels.
When SD/MUTE = Low (Vss), the output is never muted and the
programmable cable length based mute function is disabled.
When configured as an output (tied to a high-impedance input) or left
floating, the programmable inhibit based on cable length is enabled
Configured as Output:
Low = Input signal detect
High = Loss of signal
Configured as Input:
Low = Never mute
High = Force Mute
NOTE:
Internal pull-up/pull-down is 100 kΩ.
NC: GS2974A, GS1574/GD1574A and GS9074 use this pin as MUTE.
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Appendix
A.1
Glossary of Terms/Acronyms
BER
Bit Error Rate
CD
Cable Driver
CDA
Cable Distribution Amplifier
CML
Current Mode Logic
DDI
Differential Data Inputs
DTV
Digital Television
DVB
Digital Video Broadcast
EMI
Electro Magnetic Interference
EQ
Equalizer or Equalization
ESD
Electro Static Discharge
GREEN
Environmentally friendly
HD
High Definition
HW
Hardware
ID
Identifier
I/O
Input/Output
QFN
QuadFrameOnLead
RoHS
Restriction of Hazardous Substances
SD
Standard Definition
SDI
Serial Digital Input
SDO
Serial Digital Output
SE
Single Ended
SMPTE
Society of Motion Picture and Television Engineers
SW
Software
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Appendix
A.2
Reference Documents
A.2.1
External
The following external documents were referenced in this data sheet.
•
Application Notes for Surface Mount Assembly of Amkor’s MicroLeadFrame (MLF) Packages
•
Amkor Technology Thermal Test Report TT-00-06 (See http://www.amkor.com for detailed information)
•
SMPTE 292M, SMPTE 259M, SMPTE 344M, SMPTE424M
•
ESI TR101 891 DVB Asynchronous Serial Interface (ASI)
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www.mindspeed.com
General Information:
Telephone: (949) 579-3000
Headquarters - Newport Beach
4000 MacArthur Blvd., East Tower
Newport Beach, CA 92660
© 2007-2010 Mindspeed Technologies®, Inc. All rights reserved.
Information in this document is provided in connection with Mindspeed Technologies® ("Mindspeed®") products.
These materials are provided by Mindspeed as a service to its customers and may be used for informational
purposes only. Except as provided in Mindspeed’s Terms and Conditions of Sale for such products or in any
separate agreement related to this document, Mindspeed assumes no liability whatsoever. Mindspeed assumes
no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and
product descriptions at any time, without notice. Mindspeed makes no commitment to update the information and
shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its
specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any
intellectual property rights is granted by this document.
THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL
DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. MINDSPEED FURTHER DOES NOT WARRANT THE ACCURACY OR
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CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS,
WHICH MAY RESULT FROM THE USE OF THESE MATERIALS.
Mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. Mindspeed
customers using or selling Mindspeed products for use in such applications do so at their own risk and agree to
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