CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 1/12 3A Low Dropout LDO EM5103 General Description EM5103 is a 3A low dropout linear regulator designed for low dropout and high current applications. This device works with dual supplies, a control input for the control circuitry and a power input as low as 1.2V for providing current to output. It features 3A output current and ultra-low-drop output voltage as well as full protection functions. VOUT can be as low as 0.8V. Features ●VIN Range 1.2V to 5.5V ●VOUT is Adjustable (0.8V Min) ●Excellent Line Regulation ●Excellent Load Regulation ●3A Guaranteed Output Current* ●300mV @ 3A Dropout Voltage ●OTP and OCP Functions ●Very Low On-Resistance ●Enable & Power good Signal *Check thermal design information. Applications ●Notebook ●Chipset ●Graphic & Netbook Cards & MB ●Low Voltage Logic Supplies ●Server Supplies System ●SMPS Post Regulators Ordering Information Part Number EM5103QP EM5103NA Package PSOP-8 (Pb-free lead plating package) DFN3×3-10L (Pb-free lead plating package) Pin Configuration PSOP-8 EM5103 DFN3×3-10L CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 2/12 Typical Application Circuit PSOP-8 DFN3×3-10L Pin Assignment Pin No. Pin Name PSOP-8 DFN3×3-10L Pin Function Power OK Indication. POK is an open-drain output. An external pull high 5 1 POK resistor connected to this pin is required. Enable Input. Pulling the pin below 0.4V turns the regulator off. EN 2 6 Input Voltage. This is the drain input to the power device that supplies current to the output pin. VIN cannot be forced higher than VCNTL. 3 7,8,9 VIN CNTL NC VOUT FB GND EM5103 4 10 5 - 6 1,2,3 7 4 8 11 Supply Input for Control Circuit. CNTL provides supply voltage to the control circuitry and driver for the pass transistor. The driving capability of output current is proportioned to the VCNTL. For the device to regulate, the voltage on this pin must be at least 2.0V greater than the output voltage, and no less than VCNTL_MIN. No Connection inside chip. Output Voltage. VOUT is power output pin. An internal pull low resistance exists when the device is disabled. Minimum 22μF low ESR ceramic holding capacitor is required at this pin for stabilizing VOUT voltage. Feedback Voltage. FB is the inverting input to the error amplifier. A resistor divider from the output to GND is used to set the regulation voltage as VOUT = (1 + R1/R2) × 0.8V (V). This pin has high impedance and should be kept from noisy source to guarantee stable operation. Ground. CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 3/12 Function Block Diagram Absolute Maximum Ratings (Note 1) ●VIN ---------------------------------------------------------------------------------------------- -0.3V to +6.0V ●VCNTL (Note 1)----------------------------------------------------------------------------------- -0.3V to +6.0V ●Other Pins---------------------------------------------------------------------------- -0.3V to (VCNTL+0.3V) ●Package Thermal Resistance, θJA, PSOP-8 (Note 2) ------------------------------------------- 75°C/W DFN3×3-10L ------------------------------------------- 60°C/W ●Package Thermal Resistance, θJC, PSOP-8 (Note 2) ------------------------------------------- 15°C/W ●Power Dissipation, PD @ TA = 25°C, PSOP-8 (Note 3) -------------------------------------------- 1.9W DFN3×3-10L ------------------------------------------- 1.67W ●Junction Temperature-------------------------------------------------------------------------------- 150°C ●Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------ 260°C ●Storage Temperature ----------------------------------------------------------------------- -65°C to 150°C ●ESD susceptibility (Note4) HBM (Human Body Mode)------------------------------------------------------------------------- 2KV MM (Machine Mode)--------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note5) Supply Input Voltage, VIN -------------------------------------------------------------------- 1.0V to VCNTL Control Voltage, VCNTL -----------------------------------------------------------------------3.0V to 5.5V Junction Temperature ----------------------------------------------------------------------−40°C to 125°C Ambient Temperature ------------------------------------------------------------------------- −40°C to 85°C EM5103 CYStek Product Specification Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 4/12 CYStech Electronics Corp. Electrical Characteristics Parameter @VCNTL=5V, TA=25℃, unless otherwise specified Symbol Test Conditions Min Typ Max Units 3.0 1.0 - 2.7 0.2 10 5.5 VCNTL 30 V V V V μA - 0.9 1.5 mA 0.788 0.8 0.812 - 5 - nA - 0.01 0.1 %/V - 0.8 1.5 %/A 10mA<IOUT<3A, VIN=VCNTL=VEN=5V, VOUT=VREF, -40° C<Tj<125° C by design - - 3 % IOUT=2A, VCNTL=VEN=5V, VOUT=VREF - 200 240 mV IOUT=3A, VCNTL=VEN=5V, VOUT=VREF - 300 360 mV VCNTL-2 V Supply Input Section Control Input Voltage POR Threshold POR Hysteresis Power Input Voltage Control Input Current in Quiescent Current VOUT= VREF VCNTL VCNTLRTH VCNTLHYS VIN VOUT=VREF ICNTL_SD VIN=VCNTL=5V, IOUT=0A,VEN=0V VIN=VCNTL=VEN=5V, IOUT=0A, IQ VOUT=VREF Feedback Reference Voltage Feedback Input Current VREF IFB VIN Line Regulation VREF(LINE) Load Regulation (Note 6) VREF(LOAD) Load Regulation over Temperature VREF(TOTAL) Dropout Voltage (Note 7) VDROP Output Voltage VOUT VOUT Pull Low Resistance Enable Enable High Level Disable Low Level Enable Source Current Enable Input Impedance Output Voltage Ramp Up Time PWROK VIN=VCNTL=VEN=5V, IOUT=0A, VOUT=VREF 1.2V<VIN<5V, VCNTL=VEN=5V, IOUT=0A, VOUT=VREF 10mA<IOUT<3A, VIN=VCNTL=VEN=5V, VOUT=VREF 0.8 VIN=VCNTL=5V, VEN=0V VEN VSD IEN ZEN VCNTL=5V, VEN=0V V - 70 - Ω 1.4 - 7 700 0.4 18 - V V μA KΩ 2.5 4.5 ms 1.5 FB Power OK Threshold VPOKTH VIN=VCNTL=VEN=5V, IOUT=0A, VOUT=VREF - 90 - % Power OK Hysteresis VPOKHYS VIN=VCNTL=VEN=5V, IOUT=0A, VOUT=VREF - 8 - % From VOUT>90% to POK rising 0.5 1.0 2.0 ms POK Delay Time Over Current Protection OCP Threshold Level IOCP VIN=VCNTL=VEN=5V, VOUT=VREF 3.2 4.0 - A Output Short Circuit Current ISC VIN=VCNTL=VEN=5V, VOUT=0V 1.5 2.5 - A EM5103 CYStek Product Specification Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 5/12 CYStech Electronics Corp. Parameter Thermal Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis Symbol Test Conditions Min Typ Max TSD VIN=VCNTL=VEN=5V, IOUT=0A, VOUT=VREF - 160 - TSDHYS VIN=VCNTL=VEN=5V, IOUT=0A, VOUT=VREF - 30 - Units °C °C Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA=25°C on a 4-layers high effective thermal conductivity test board with minimum copper area of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for PSOP-8 package. Note 3. θJA is 52°C/W for PSOP-8 packages on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm² copper area. Note 4. Devices are ESD sensitive. Handling precaution is recommended. Note 5. The device is not guaranteed to function outside its operating conditions. Note 6. Load regulation is measured by a current pulse with 50Hz frequency and 10% duty cycle. Note 7. The dropout voltage is defined as (VIN-VOUT), which is measured when VOUT equal to (VOUT,(NORMAL)-100mV). EM5103 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 6/12 Typical Operating Characteristics Power On from VCNTL Power On from VIN VCNTL VIN VOUT VOUT POK POK IIN IIN VCNTL =5V, VIN = 3.3V, COUT = 1000μF, No Load. VCNTL =5V, VIN = 3.3V, COUT = 1000μF, No Load. Turn On from EN Dropout Voltage vs Output Current VEN VOUT POK IIN VCNTL =5V, VIN = 3.3V, COUT = 1000μF, No Load. VCNTL=5V， VOUT=1.6V Output Short Circuit Output Voltage vs Output Current Output Voltage(V) 0.8V 0.6V 0.4V 0.2V 0V 0A 1A 2A 3A 4A 5A Output Current(A) VIN =VCNTL=5V， VOUT=VREF EM5103 VCNTL = VIN = 5V, VOUT=1.0V CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 7/12 Typical Operating Characteristics(Cont.) Load Transient Response Quiescent Current vs Input Voltage VOUT IOUT VIN=VCNTL(V) VCNTL= 5V, VIN =3.3V, COUT = 22μF Shutdown Current vs. Input Voltage Quiescent Current vs. Temperature EM5103 VOUT= VREF Line Regulation FB Voltage vs. Temperature CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 8/12 Typical Operating Characteristics(Cont.) On Resistance vs. Temperature VCNTL=5V，VOUT=1.6V. Functional Description Enable Function EM5103 is enabled if the voltage of the EN pin is greater than 1.4V. If the voltage of the EN pin is less than 0.4V, the IC will be disabled. The quiescent current can be decreased to be less than 10μA typically. POR – Power ON Reset To let EM5103 start to operation, CNTL voltage must be higher than its POR voltage even when EN voltage is pulled higher than enable high voltage. Typical POR voltage is 2.7V. VOUT Voltage Adjustment The VOUT voltage of EM5103 can be adjusted by external voltage divider. Refer to typical application circuit, VOUT voltage is calculated by the following equation: EM5103 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 9/12 Over Current Limit Function EM5103 features over current limiting function as well as output short circuit current fold back function. Typically, before the thermal protection is triggered, EM5103 can limit its output current to 4.0A. When output voltage is decreased, the limiting current level also decreases. When VOUT is short to GND, or VOUT voltage is zero, the output current level is limited to 2.5A, typically. Input and Output Capacitor Selection For CNTL pin, a 1μF ceramic capacitor is enough for bypassing the supply of CNTL to GND. For VIN pin, 10μF or larger ceramic capacitor is required to provide bypass path in transient current demand. VOUT pin is also recommended to have 22μF or larger ceramic capacitor to be stable and reduce the VOUT voltage dip when fast loading transient is happened. A feed-forward capacitor can be placed between VOUT and FB pin to speed up the transient response, optionally. Power Dissipation The max power depends on some conditions, including thermal impedance, PCB layout, airflow, and so on. The max power dissipation can be calculated by the formula as below: PD(max)=(TJ(max)-TA) / θJA TJ(max) is the max junction temperature; θJA is the thermal impedance from junction to ambient. The thermal impedance θJA of exposed SOP-8 is package design and PCB design dependent. The thermal impedance can be reduced by increasing the copper area under the exposed pad of the SOP-8 package. So, to let the copper area as large as possible is helpful for the thermal performance of the exposed SOP-8 package. For recommended specification of EM5103, the max junction temperature is 125 degree C. The θJA of exposed SOP-8 is 75°C/W on the standard JEDEC 51-7(4 layers, 2S2P, copper 2 oz) thermal test board. The max power dissipation (at 25°C ambient, on the min exposed pad layout) can be calculated as below: PD (max at 25°C)=(125°C – 25°C) / (75°C/W) = 1.33W EM5103 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 10/12 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. EM5103 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 11/12 PSOP-8 Dimension Marking: Device Name Date Code 8-Lead PSOP-8 Plastic Surface Mounted Package CYStek Package Code: QP *:Typical Inches Min. Max. 0.1850 0.2008 0.1457 0.1614 0.2283 0.2441 0.0130 0.0200 0.05* 0.0472 0.0638 0.0032 0.0110 DIM A B C D E F G Millimeters Min. Max. 4.70 5.10 3.70 4.10 5.80 6.20 0.33 0.51 1.27 * 1.20 1.62 0.08 0.28 DIM H I J K M N Inches Min. Max. 0.0157 0.0327 0.0075 0.0102 0.0098 0.0197 0° 8° 0.0764 0.0980 0.0764 0.0980 Millimeters Min. Max. 0.40 0.83 0.19 0.26 0.25 0.50 0° 8° 1.94 2.49 1.94 2.49 Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0 EM5103 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 12/12 DFN3×3-10L Dimension Marking: Device Name Date Code 10-Lead DFN3×3-10L Plastic Surface Mounted Package CYStek Package Code: NA *:Typical Inches Min. Max. 0.028 0.031 0.000 0.020 0.008* 0.007 0.012 0.118* 0.118* DIM A A1 A3 b D E Millimeters Min. Max. 0.70 0.80 0.00 0.50 0.20* 0.18 0.30 3.0* 3.0* DIM D2 E2 e L K Inches Min. Max. 0.087 0.106 0.055 0.069 0.020* 0.012 0.020 0.008 - Millimeters Min. Max. 2.20 2.70 1.40 1.75 0.50* 0.30 0.50 0.20 - Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. EM5103 CYStek Product Specification