INTEGRATED CIRCUITS 74F543 Octal registered transceiver, non-inverting (3-State) 74F544 Octal registered transceiver, inverting (3-State) Product specification IC15 Data Handbook Philips Semiconductors 1994 Dec 5 Philips Semiconductors Product specification Octal registered transceivers 74F543 74F544 74F543, 74F544 Octal registered transceiver, non-inverting (3-State) Octal registered transceiver, inverting 93-State) FEATURES FUNCTIONAL DESCRIPTION • Combines74F245 and 74F373 type functions in one chip • 8-bit octal transceiver with D-type latch • 74F543 Non-inverting The 74F543 and 74F544 contain two sets of eight D-type latches, with separate input and controls for each set. For data flow from A to B, for example, the A-to-B Enable (EAB) input must be Low in order to enter data from A0 - A7 or take data from B0 - B7, as indicated in the Function Table. With EAB Low, a Low signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent Low-to-High transition for the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With EAB and OEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. 74F544 Inverting • Back-to-back registers for storage • Separate controls for data flow in each direction • A outputs sink 20mA and source 3mA • B outputs sink 64mA and source 15mA • 3-State outputs for bus-oriented applications • 74F543 available in SSOP Type II package DESCRIPTION The 74F543 and 74F544 Octal Registered Transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. While the 74F543 has non-inverting data path, the 74F544 inverts data in both directions. The A outputs are guaranteed to sink 24mA, while the B outputs are rated for 64mA. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F543 6.0ns 80mA 74F544 6.5ns 95mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, TA = 0°C to +70°C DRAWING NUMBER 24-pin plastic skinny DIP (300mil) N74F543N, N74F544N SOT222–1 24-pin plastic SOL N74F543D, N74F544D SOT137-1 24-pin plastic SSOP Type II 74F543DB SOT340-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS 74F543 74F544 74F543 74F544 DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 - A7 Port A, 3-State inputs 3.5/1.0 70µA/0.6mA B0 - B7 Port B, 3-State inputs 3.5/1.0 70µA/0.6mA OEAB A-to-B Output Enable input (Active Low) 1.0/1.0 20µA/0.6mA OEBA B-to-A Output Enable input (Active Low) 1.0/1.0 20µA/0.6mA EAB A-to-B Enable input (Active Low) 1.0/2.0 20µA/1.2mA EBA B-to-A Enable input (Active Low) 1.0/2.0 20µA/1.2mA LEAB A-to-B Latch Enable input (Active Low) 1.0/1.0 20µA/0.6mA LEBA B-to-A Latch Enable input (Active Low) 1.0/1.0 20µA/0.6mA A0 - A7 Port A, 3-State outputs 150/40 3.0mA/24mA B0 - B7 Port B, 3-State outputs 750/106.7 15mA/64mA A0 - A7 Port A, 3-State outputs 150/40 3.0mA/24mA B0 - B7 Port B, 3-State outputs 750/106.7 15mA/64mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High State and 0.6mA in the Low state. 1994 Dec 5 2 853-0874 14379 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 PIN CONFIGURATION – 74F543 LOGIC SYMBOL – 74F543 LEBA 1 24 VCC OEBA 2 23 EBA A0 3 22 B0 A1 4 21 B1 A2 5 20 B2 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 A3 6 19 B3 A4 7 18 B4 A5 8 17 B5 A6 9 16 B6 A7 10 14 LEAB GND 12 13 OEAB OEAB 13 LEAB OEBA 2 1 LEBA 22 21 20 19 18 17 16 15 VCC = Pin 24 GND = Pin 12 SF00238 2 IEN3 23 G1 1 1C5 13 2EN4 11 G2 14 2C6 3 6D 5D 4 22 21 5 20 6 19 7 18 8 17 9 16 10 15 SF00239 1994 Dec 5 EBA 14 15 B7 EAB 11 LOGIC SYMBOL (IEEE/IEC) – 74F543 4 EAB B0 B1 B2 B3 B4 B5 B6 B7 SF00237 3 11 23 3 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 PIN CONFIGURATION – 74F544 LOGIC SYMBOL – 74F544 LEBA 1 24 VCC OEBA 2 23 EBA A0 3 22 B0 A1 4 21 B1 A2 5 20 B2 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 19 B3 A3 6 A4 7 18 B4 A5 8 17 B5 A6 9 16 B6 A7 10 11 EAB 23 EBA OEAB 13 14 LEAB OEBA 2 1 LEBA B0 B1 B2 B3 B4 B5 B6 B7 15 B7 EAB 11 14 LEAB GND 12 13 OEAB 22 21 20 19 18 17 16 15 VCC = Pin 24 GND = Pin 12 SF00240 SF00242 LOGIC SYMBOL (IEEE/IEC) – 74F544 2 FUNCTION TABLE for 74F543 and 74F544 INPUTS IEN3 OEXX LEXX DATA 74F543 74F544 STATUS 23 G1 1 1C5 H X X X Z Z Disabled 13 2EN4 11 G2 X H X X Z Z Disabled L ↑ L h Z Z L ↑ L l Z Z Disable + Latch 22 L L ↑ h H L 21 L L ↑ l L H L L L H H L L L L L L H L L H X NC NC 14 3 4 5 2C6 3 6D 5D 4 20 6 19 7 18 8 17 9 16 10 15 H L h Latch + Display Transparent Hold = High voltage level = Low voltage level = High state must be present one setup time before the Low-to-High transition of LEXX or EXX (XX=AB or BA) l = Low state must be present one setup time before the Low-to-High transition of LEXX or EXX (XX=AB or BA) ↑ = Low-to-High transition of LEXX or EXX XX = AB or BA X = Don’t care NC = No change Z = High impedance “off” state SF00241 1994 Dec 5 OUTPUTS EXX 4 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 LOGIC DIAGRAM FOR 74F543 D DETAIL A Q 22 B0 LE A0 3 Q D LE A1 A2 A3 A4 A5 A6 A7 OEBA 4 21 5 20 6 19 7 18 DETAIL A X 7 8 17 9 16 10 15 B1 B2 B3 B4 B5 B6 B7 2 13 OEAB EBA 23 11 LEBA 1 VCC = Pin 24 GND = Pin 12 EAB 14 LEAB SF00243 LOGIC DIAGRAM FOR 74F544 D DETAIL A Q 22 B0 LE A0 3 Q D LE A1 A2 A3 A4 A5 A6 A7 OEBA 4 21 5 20 6 19 7 DETAIL A X 7 18 8 17 9 16 10 15 LEBA B3 B4 B5 B6 B7 OEAB 23 11 VCC = Pin 24 GND = Pin 12 B2 2 13 EBA B1 1 14 EAB LEAB SF00244 1994 Dec 5 5 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT V VCC Supply voltage -0.5 to +7.0 VIN Input voltage -0.5 to +7.0 V IIN Input current -30 to +5 mA VOUT Voltage applied to output in High output state IOUT O Current applied to output in Low output state Tamb Operating free-air temperature range TSTG Storage temperature -0.5 to +5.5 V A0 - A7, A0 - A7 48 mA B0 - B7, B0 - B7 128 mA 0 to +70 °C -65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current -18 mA IOH O High level output current High-level A0 - A7, A0 - A7 -3 mA B0 - B7, B0 - B7 -15 mA IOL O Low level output current Low-level A0 - A7, A0 - A7 24 mA 64 mA Tamb Operating free-air temperature range +70 °C 1994 Dec 5 B0 - B7, B0 - B7 -0 6 V V Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL TEST CONDITIONS1 PARAMETER A0 - A7, A0 - A7 VOH A0 - A7, A0 - A7 Input clamp voltage II Input current at maximum input voltage IIH High-level input current IIL Low-level input current VIH = MIN IOH = -15mA 10%VCC 2.4 5%VCC 2.7 10%VCC 2.0 5%VCC 2.0 Others MAX UNIT V 3.4 V V V 0.35 0.50 V 5%VCC 0.35 0.50 V 0.55 V 0.42 0.55 V –0.73 –1.2 V 100 µA VCC = 5.5, VI = 5.5V 1 mA VCC = MAX, VI = 2.7V 20 µA VCC = MIN IOL = 24mA VIH = MIN IOL = 64mA 10%VCC 5%VCC VCC = MIN, II = IIK OEAB, OEBA, EAB TYP2 10%VCC VIL = MAX Low-level out output ut voltage B0 - B7, B0 - B7 VIK IOH = -3mA VIL = MAX High-level out output ut voltage B0 - B7, B0 - B7 VOL VCC = MIN LIMITS MIN VCC = MAX, VI = 7.0 V Others –0.6 mA EAB, EBA VCC = MAX, VI = 0.5V –1.2 mA IOZH + IIH Off-state output current, high-level voltage applied VCC= MAX, VO = 2.7V 70 µA IOZH + IIL Off-state output current, Low-level voltage applied VCC= MAX, VO = 0. 5V –600 µA –60 –150 mA –100 –225 mA 70 105 mA 95 135 mA 95 135 mA 80 110 mA 105 140 mA 100 135 mA IOS Short-circuit output out ut A0 - A7, A0 - A7 current3 B0 - B7, B0 - B7 VCC = MAX ICCH 74F543 ICC ICCL VCC = MAX ICCZ Supply Su ly current (total) ICCH 74F544 ICCL VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1994 Dec 5 7 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 AC ELECTRICAL CHARACTERISTICS FOR 74F543 74F543 LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = 5.0V CL = 50pF RL = 500Ω TEST CONDITIONS Tamb = 0°C to +70°C VCC = 5.0V ± 10% CL = 50pF RL = 500Ω MIN TYP MAX MIN MAX UNIT tPLH tPHL Propagation delay An to Bn Waveform 2 3.5 3.0 5.5 5.0 8.5 8.0 3.0 2.5 9.0 8.5 ns tPLH tPHL Propagation delay Bn to An Waveform 2 2.5 2.5 4.0 4.5 7.0 7.5 2.5 2.5 7.5 8.0 ns tPLH tPHL Propagation delay LEBA to An Waveform NO TAG, 2 5.0 4.0 7.0 6.0 10.0 9.0 4.5 4.0 11.0 9.5 ns tPLH tPHL Propagation delay LEAB to Bn Waveform NO TAG, 2 6.0 4.5 8.5 6.5 11.5 9.5 5.5 4.0 12.5 10.0 ns tPZH tPZL Output Enable time OEBA to An or OEAB to Bn Waveform 4 Waveform 5 2.0 3.5 4.0 5.0 7.5 8.5 1.5 3.0 8.0 9.0 ns tPHZ tPLZ Output Disable time OEBA to An or OEAB to Bn Waveform 4 Waveform 5 1.0 1.5 3.0 4.0 6.5 7.5 1.0 1.0 7.5 8.5 ns tPZH tPZL Output Enable time EBA to An or EAB to Bn Waveform 4 Waveform 5 4.5 5.0 7.0 7.0 10.5 10.5 4.0 4.5 11.5 11.0 ns tPHZ tPLZ Output Disable time EBA to An or EAB to Bn Waveform 4 Waveform 5 2.5 4.5 5.0 7.0 8.5 11.0 2.0 3.0 9.5 12.0 ns AC SETUP REQUIREMENTS FOR 74F543 74F543 LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C VCC = 5.0V CL = 50pF RL = 500Ω MIN ts(H) ts(L) Setup time, High or Low An to LEAB or Bn to LEBA th(H) th(L) Hold time, High or Low An to LEAB or Bn to LEBA ts(H) ts(L) Setup time, High or Low An to EAB or Bn to EBA th(H) th(L) tw(L) 1994 Dec 5 TYP Tamb = 0°C to +70°C VCC = 5.0V ± 10% CL = 50pF RL = 500Ω MIN UNIT MAX Waveform 3 0.0 2.5 0.0 3.0 ns Waveform 3 0.0 1.5 0.0 2.0 ns Waveform 3 1.0 2.5 1.5 3.0 ns Hold time, High or Low An to EAB or Bn to EBA Waveform 3 0.0 1.5 0.0 2.0 ns Latch enable pulse width, Low Waveform 3 4.0 4.5 ns 8 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 AC ELECTRICAL CHARACTERISTICS FOR 74F544 74F544 LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = 5.0V CL = 50pF RL = 500Ω TEST CONDITIONS Tamb = 0°C to +70°C VCC = 5.0V ± 10% CL = 50pF RL = 500Ω UNIT MIN TYP MAX MIN MAX Waveform NO TAG 3.0 3.0 6.5 5.0 9.5 8.0 3.0 3.0 10.5 8.5 ns tPLH tPHL Propagation delay An to Bn or Bn to An tPLH tPHL Propagation delay LEBA to An Waveform NO TAG, 2 4.0 4.0 7.0 7.0 9.5 9.5 4.0 4.0 10.5 10.5 ns tPLH tPHL Propagation delay LEAB to Bn Waveform NO TAG, 2 5.0 4.0 8.0 7.5 11.5 9.5 4.0 4.0 12.5 10.5 ns tPZH tPZL Output Enable time OEBA to An or OEAB to Bn Waveform 4 Waveform 5 2.0 3.5 4.0 5.5 7.0 8.5 1.5 3.0 7.5 9.0 ns tPHZ tPLZ Output Disable time OEBA to An or OEAB to Bn Waveform 4 Waveform 5 1.0 1.5 4.0 4.0 6.5 6.5 1.0 1.5 7.0 7.5 ns tPZH tPZL Output Enable time EBA to An or EAB to Bn Waveform 4 Waveform 5 4.0 4.5 7.0 8.0 9.5 11.0 3.5 4.5 10.0 12.0 ns tPHZ tPLZ Output Disable time EBA to An or EAB to Bn Waveform 4 Waveform 5 2.5 4.5 5.0 8.5 8.0 11.5 2.5 4.0 9.0 11.5 ns AC SETUP REQUIREMENTS FOR 74F544 74F544 LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C VCC = 5.0V CL = 50pF RL = 500Ω MIN TYP Tamb = 0°C to +70°C VCC = 5.0V ± 10% CL = 50pF RL = 500Ω MIN UNIT MAX ts(H) ts(L) Setup time, High or Low An to LEAB or Bn to LEBA Waveform 3 1.5 1.5 2.0 2.5 ns th(H) th(L) Hold time, High or Low An to LEAB or Bn to LEBA Waveform 3 1.5 2.0 2.5 2.5 ns ts(H) ts(L) Setup time, High or Low An to EAB or Bn to EBA Waveform 3 1.5 1.5 2.5 2.5 ns th(H) th(L) Hold time, High or Low An to EAB or Bn to EBA Waveform 3 1.5 2.0 2.0 2.0 ns tw(L) Latch enable pulse width, Low Waveform 3 4.0 4.5 ns 1994 Dec 5 9 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 AC WAVEFORMS VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance. OEAB, OEBA EAB, EBA VIN VM VM tPHL tPLH VM tPZH VM VOUT VM VM An, Bn An, Bn VM tPHZ 0V SF00248 SF00245 Waveform 1. VIN Propagation Delay for Inverting Outputs VM Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level VM tPLH OEAB, OEBA EAB, EBA tPHL VOUT VM VM An, Bn An, Bn VM VM tPZL tPLZ VM VOL +0.3V SF00246 Waveform 2. VOH -0.3V Propagation Delay for Non-Inverting Outputs SF00249 Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level An Bn An Bn VM ts(H) LEAB, LEBA VM VM th(H) ts(L) VM EAB, EBA VM th(L) VM tw(L) SF00247 Waveform 3. 1994 Dec 5 Data Setup Time and Hold Times, and Latch Enable Pulse Width 10 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 1994 Dec 5 11 Philips Semiconductors Product specification Bus transceivers 74F543, 74F544 DIP24: plastic dual in-line package; 24 leads (300 mil) 1994 Dec 05 12 SOT222-1 Philips Semiconductors Product specification Bus transceivers 74F543, 74F544 SO24: plastic small outline package; 24 leads; body width 7.5 mm 1994 Dec 05 13 SOT137-1 Philips Semiconductors Product specification Bus transceivers 74F543, 74F544 SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1994 Dec 05 14 SOT340-1 Philips Semiconductors Product specification Bus transceivers 74F543, 74F544 NOTES 1994 Dec 05 15 Philips Semiconductors Product specification Octal registered transceivers 74F543, 74F544 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1994 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-05135