ETC 8300DPFCTD

56F8300 Digital Power Factor Correction
using Processor ExpertTM
Targeting Document
56F8300
16-bit Hybrid Controllers
8300DPFCTD
Rev. 1
09/2004
freescale.com
Document Revision History
Version History
Description of Change
Rev 0
Initial release
Rev 1
Updating format; adding reference to 56F8100 family and 56F8367EVM
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Preliminary
Manual Operating Mode
Digital Power Factor Correction
This application exercises simple control of the Power Factor Correction (PFC) without motor control
on the 56F8346, 56F8357 or 56F8367 EVM board and the EVM Motor Kit.
Applications developed for this demonstration board were not designed for the 56F8100 devices. The
56F8300 demonstration board does, however, fully support 56F8100 software development.
1.
Specifications
The Digital PFC application performs power factor correction for 3-Phase AC/BLDC High-Voltage Power
Stage hardware without motor drive. This demonstration evaluates the basic algorithm of power factor
correction for the current hardware implementation. PFC software was designed for use with motor control
applications; the Digital PFC application allows target memory configuration of RAM and Flash.
The input power line must meet the following requirements:
•
•
Input voltage value 115V and 60Hz
Input voltage value 230V and 50Hz
The applications run at 230V, 50Hz by default. To switch to 115V, 60Hz, comment this line in
Digital_PFC.c:
#define MILESTONE_OFFSET MKS_TO_TICK(570L)
//For 50 Hz, 230 V
And uncomment this line:
//#define MILESTONE_OFFSET MKS_TO_TICK(1498L) //For 60 Hz, 115 V
The Digital PFC application may be used in the Manual Operating Mode. The remote control functionality
of the PC master software application is not implemented.
The application can run on:
•
•
External RAM
Flash
1.1 Manual Operating Mode
The PFC conversion is controlled by the RUN/STOP switch (S3); see Figure 1-1. The green USER LED
(LED2; see Figure 1-2) indicates the application states. When the application is ready, the USER LED
blinks at a 2Hz frequency.
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RUN/STOP
Switch
Figure 1-1 RUN/STOP Switch on the Daughter Card
User green LED
Figure 1-2 USER LED on the Daughter Card
The PFC conversion can be enabled after the RUN/STOP switch is moved to the RUN position. The
normal PFC conversion process is indicated by the green USER LED, which will light continuously. To
disable PFC conversion, the RUN/STOP switch must be moved to the STOP position.
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PC Master Software (Remote) Operating Mode
Table 1-1 Motor Application States
Application State
Digital PFC State
LED State
Stopped
Stopped
Green LED blinking
Red LED off
Running
Spinning
Green LED on
Red LED off
Fault
Stopped
Green LED off,
Red LED on
1.2 PC Master Software (Remote) Operating Mode
The drive is monitored remotely from a PC through the SCI communication channel of the device via an
RS-232 physical interface.
PC master software displays the following information:
•
•
•
Application mode
Application status
DCBus Voltage
Application Mode Project files for the PC master software are located in:
..\pcmaster\sdm_external_memory.pmp, uses Map file to run in the small memory model of the external
memory
..\pcmaster\ldm_external_memory.pmp, uses Map file to run in the large memory model of the external
memory
..\pcmaster\sdm_pROM-xRAM.pmp, uses Map file to run in the small memory model of the internal
memory
..\pcmaster\ldm_pROM-xRAM.pmp, uses Map file to run in the large memory model of the internal
memory
..\pcmaster\sdm_xROM-xRAM.pmp, uses Map file to run in the small memory model of the internal
memory
..\pcmaster\ldm_xROM-xRAM.pmp, uses Map file to run in the large memory model of the internal
memory
Start the PC master software window’s application, sdm_external_memory.pmp. Figure 1-3 illustrates the
PC master software control window after this project has been launched.
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Figure 1-3 PC Master Software Control Window
2.
Hardware Set-up
Figure 2-1 illustrates the hardware set-up for the Digital PFC application, which requires a motor drive.
The 3-Phase AC/BLDC High-Voltage Power Stage board contains the JP201 jumper that selects the power
supply device. Pins 2 and 3 of the JP201 connection correspond to a simple rectifier-capacitor power stage.
The PFC hardware set-up requires closing pins 1 and 2 of the JP201 connection; see Figure 2-2.
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Preliminary
PC Master Software (Remote) Operating Mode
Motor Power
Connector
Optoisolation
Board
AC Power Line
Connector
3-ph AC BLDC
HV Power Stage
Power Supply
Controller
board
Daughter Card
Serial cable
Parallel
cable
Figure 2-1 Digital PFC Application Set-up
The system is comprised of the following components:
•
Controller board for 56F8346, 56F8357 or 56F8367
— Supplied as 56F8346EVM, 56F8357EVM or 56F8367EVM board
— Described in 56F8346 Evaluation Module Hardware User’s Manual, 56F8357
Evaluation Module Hardware User’s Manual or 56F8367 Evaluation Module
Hardware User’s Manual
•
•
3-Phase AC BLDC High-Voltage Power Stage, 180W
— Supplied in a kit with optoisolation board as ECOPTHIVACBLDC
— Described in 3-Phase Brushless DC High-Voltage Power Stage
Optoisolation Board
— Supplied with 3-Phase AC/BLDC High-Voltage Power Stage as ECOPTHIVACBLDC
or
— Supplied alone as ECOPT - optoisolation board
— Described in Optoisolation Board User’s Manual
Warning: It is strongly recommended that optoisolation (optocouplers and optoisolation amplifiers) be used
during development to avoid damage to the development equipment.
Note:
Documentation for all components can be found at:
http://freescale.com
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PFC Jumper
JP201
3
1
2
Figure 2-2 Jumper JP201 on the 3-Phase AC BLDC Power Stage
For detailed information, see the 56F8346 Evaluation Module Hardware User’s Manual, 56F8357
Evaluation Module Hardware User’s Manual, or 56F8367 Evaluation Module Hardware User’s
Manual. The serial cable is needed for the PC master software debugging tool only.
2.1 EVM Jumper Settings
To execute the Digital PFC application, the daughter card requires the strap settings shown in Figure 2-3
and Table 2-1.
Figure 2-3 56F8300EVM - Daughter Card Jumper Reference
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EVM Jumper Settings
Table 2-1 56F8300EVM Daughter Card Jumper Settings
Jumper Group
Comment
Connections
JG1
Primary PFC
1-2, 3-4, 5-6, 7-8, 9-10
JG2
Secondary PFC
NC
JG3
Phase_IS / Over_I
1-2
JG4
Primary Zero-Crossing / Encoder
2-3, 5-6, 8-9
JG5
Secondary Zero-Crossing / Encoder
NC
JG6
Primary Back-EMF / Phase-IS
1-2, 4-5, 7-8
JG7
Secondary Back-EMF / Phase-IS
NC
JG8
Fault A Monitor
1-2, 3-4, 5-6
JG9
Fault B Monitor
1-2, 3-4, 5-6
JG10
Switch 1
1-2
JG11
Switch 2
1-2
JG12
Switch 3 (Run / Stop)
1-2
Note: When running the EVM target system in a stand-alone mode from Flash, in the 56F8346EVM, the
JG9 jumper must be set in the 1-2 configuration to disable the command converter parallel port interface.
In the 56F8357EVM or 56F8367EVM, the JG3 jumper must be set in the 1-2 configuration to disable the
command converter parallel port interface.
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3.
Build
When building the Digital PFC Application, the user can create an application that runs from internal Flash
or External RAM. To select the type of application to build, open the digital_PFC.mcp project and choose
the target build type; see Figure 3-1. A definition of the projects associated with these target build types
may be viewed under the Targets tab of the project window.
Figure 3-1 Target Build Selection
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EVM Jumper Settings
The project may now be built by executing the Make command, as shown in Figure 3-2. This will build
and link the Digital PFC Application and all needed Metrowerks and Processor Expert libraries.
Figure 3-2 Execute Make Command
For more information about these commands, see:
<...>\CodeWarrior Manuals\PDF\Targeting_56800E.pdf
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4.
Projects Files
The Digital PFC application is composed of the following files:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
5.
...\Project Directory\“Project File Name”.mcp, application project file
...\Project Directory\“Project File Name”.pe, Processor Expert software file
...\Project Directory\“Project File Name”.G_C, Processor Expert software file
...\Project Directory\“Project File Name”.dsk, Processor Expert software file
...\Project Directory\bin\*.xMAP, map file
...\Project Directory\bin\*.elf, standard binary file
...\Project Directory\startup\*.c, *.h, *.asm, initialization files
...\Project Directory\Code\adcPrimary.* files generated by the PE for adcPrimary bean
...\Project Directory\Code\PC_M1.*, files generated by the PE for PC_M1 bean
...\Project Directory\Code\tiAux.*, files generated by the PE for tiAux bean
...\Project Directory\Code\tmrD1.*, files generated by the PE for tmrD2 bean
...\Project Directory\Code\Cpu.*, files generated by the PE for the CPU used
...\Project Directory\Code\Events.*, files generated by the PE for events
...\Project Directory\Code\PE_Const.*, PE internal definitions of the constants
...\Project Directory\Code\PE_Error.*, PE internal definitions of the error constants
...\Project Directory\Code\PE_Types.*, PE internal definitions of the types
...\Project Directory\Code\PESL.*, configuration file for PESL library
...\Project Directory\Code\Vectors.*, definitions of the interrupt vectors
Execute
To execute the Digital PFC Application, select the Project/Debug command in the CodeWarrior IDE,
followed by the Run command. For more help with these commands, refer to the CodeWarrior tutorial
documentation in the following file, located in the CodeWarrior installation directory:
<...>\CodeWarrior Manuals\PDF\Targeting_56800E.pdf
If the Flash target is selected, CodeWarrior will automatically program the device’s internal Flash with the
executable generated during Build. If the External RAM target is selected, the executable will be loaded
to off-chip RAM.
Once Flash has been programmed with the executable, the EVM target system may be run in a stand-alone
mode from Flash. To do this, set the JG9 jumper on the 8346EVM and JG3 on the 56F8357EVM or
56F8367EVM in the 1-2 configuration to disable the parallel port, and press the RESET button.
To enable the PFC conversion, set the RUN/STOP switch to the RUN position. If this switch was in the
RUN position before the application started, move it to the STOP position first, then back to the RUN
position. The USER LED should light continuously when the PFC conversion is enabled. To disable the
PFC conversion, move the RUN/STOP switch to the STOP position, causing the USER LED to blink
again.
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EVM Jumper Settings
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Preliminary
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EVM Jumper Settings
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© Freescale Semiconductor, Inc. 2004
8300BLDCQETD
Rev. 1
09/2004