Aeroflex ACT-SF512K16N-26P7C Act-sf512k16 high speed 512kx16 sram/flash multichip module Datasheet

ACT–SF512K16 High Speed
512Kx16 SRAM/FLASH Multichip Module
CIRCUIT TECHNOLOGY
www.aeroflex.com
FEATURES
■ 2 – 512K x 8 SRAMs & 2 – 512K x 8 Flash Die in
■ Packaging – Hermetic Ceramic
One MCM
■ Access Times of 25ns (SRAM) and 60ns (Flash) or
35ns (SRAM) and 70 or 90ns (Flash)
■ 512K x 16 SRAM
■ 512K x 16 5V Flash
■ Organized as 512K x 16 of SRAM and 512K x 16 of
Flash Memory with Separate Data Buses
■ Both Blocks of Memory are User Configurable as
1M x 8
■ Low Power CMOS
■ Input and Output TTL Compatible Design
■ MIL-PRF-38534 Compliant MCMs Available
■ Decoupling Capacitors and Multiple Grounds for Low
Noise
■ Industrial and Military Temperature Ranges
■ Industry Standard Pinouts
66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,
Aeroflex code# "P3"
● 66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
● 68 Lead, .94" x .94" x .140" Single-Cavity Small
Outline Gull Wing, Aeroflex code# "F18" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
■ DESC SMD Pending – 5962-96901
Note: Programming information available upon request
●
FLASH MEMORY FEATURES
■ Sector Architecture (Each Die)
●8
Equal Sectors of 64K bytes each
combination of sectors can be erased with one
command sequence.
+5V Programing, 5V ±10% Supply
Embedded Erase and Program Algorithms
Hardware and Software Write Protection
Internal Program Control Time.
10,000 Erase / Program Cycles
● Any
■
■
■
■
■
Block Diagram – PGA Type Packages (P3 & P7) & CQFP (F18)
Pin Description
SWE1 SCE1 SWE2 SCE2 FWE1 FCE1 FWE2 FCE2
OE
A0 – A18
512Kx8
SRAM
512Kx8
SRAM
512Kx8
Flash
512Kx8
Flash
8
8
8
8
SI/O0-7
SI/O8-15
FI/O0-7
FI/O8-15
FI/O0-15
Flash Data I/O
SI/O0-15
SRAM Data I/O
A0–18
Address Inputs
FWE1-2
Flash Write Enables
SWE1-2 SRAM Write Enables
FCE1-2
Flash Chip Enables
SCE1-2
SRAM Chip Enables
OE
Output Enable
NC
Not Connected
VCC
Power Supply
GND
Ground
eroflex Circuit Technology - Advanced Multichip Modules © SCD1663 REV A 4/28/98
Absolute Maximum Ratings
Symbol
TC
TSTG
Rating
Range
Units
Operating Temperature
-55 to +125
°C
Storage Temperature
-65 to +150
°C
-0.5 to +7
V
300
°C
VG
Maximum Signal Voltage to Ground
TL
Maximum Lead Temperature (10 seconds)
Parameter
Flash Data Retention
10 Years
Flash Endurance (Write/Erase Cycles)
10,000
Normal Operating Conditions
Symbol
Parameter
Minimum
Maximum
Units
VCC
Power Supply Voltage
+4.5
+5.5
V
VIH
Input High Voltage
+2.2
VCC + 0.3
V
VIL
Input Low Voltage
-0.5
+0.8
V
Capacitance
(VIN = 0V, f = 1MHz, TC = 25°C)
Symbol
Maximum
Units
A0 – A18 Capacitance
50
pF
OE Capacitance
50
pF
CWE1,2
F/S Write Enable Capacitance
20
pF
CCE1,2
F/S Chip Enable Capacitance
20
pF
I/O0 – I/O15 Capacitance
20
pF
Min
Max Units
CAD
COE
CI / O
Parameter
These parameters are guaranteed by design but not tested
DC Characteristics
(VCC = 5.0V, VSS = 0V, Tc = -55°C to +125°C, unless otherwise indicated)
Parameter
Sym
Conditions
Input Leakage Current
ILI
VCC = Max, VIN = 0 to VCC
10
µA
Output Leakage Current
ILO
FCE = SCE = VIH, OE = VIH,
VOUT = 0 to VCC
10
µA
260
mA
SCE = VIL, OE = VIH, f = 5MHz, VCC =
SRAM Operating Supply Current x 16
ICCx16
Max, FCE = VIH
Mode
Standby Current
ISB
FCE = SCE = VIH, OE = VIH, f = 5MHz,
VCC = Max
35
mA
SRAM Output Low Voltage
VOL
IOL = 8 mA, VCC = Min, FCE = VIH
0.4
V
SRAM Output High Voltage
VOH
IOH = -4.0 mA, , VCC = Min, FCE = VIH
Flash Vcc Active Current for Read (1)
ICC1
FCE = VIL, OE = VIH, SCE = VIH
130
mA
Flash Vcc Active Current for Program
or Erase (2)
ICC2
FCE = VIL, OE = VIH, SCE = VIH
150
mA
Flash Output Low Voltage
VOL
IOL = 8 mA, VCC = Min, SCE = VIH
0.45
V
Flash Output High Voltage
VOH
IOH = -2.5 mA, , VCC = Min, SCE = VIH
Flash Low Vcc Lock Out Voltage
VLKO
2.4
V
0.85 x VCC
3.2
V
4.2
V
Notes: 1) The ICC current listed includes both the DC operating current and the frequency dependent component (at 5MHz). The
frequency component typically is less than 2mA/MHz, with OE at VIH 2) ICC active while Embedded Algorithim (program or
erase) is in progress 3) DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
Aeroflex Circuit Technology
2
SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
SRAM AC Characteristics
(VCC = 5.0V, VSS= 0V, Tc= -55°C to +125°C)
Read Cycle
Parameter
Symbol
–025
Min Max
–035
Min Max
25
35
Units
ns
Read Cycle Time
tRC
Address Access Time
tAA
25
35
ns
Chip Select Access Time
tACE
25
35
ns
Output Hold from Address Change
tOH
Output Enable to Output Valid
tOE
Chip Select to Output in Low Z *
tCLZ
2
4
ns
Output Enable to Output in Low Z *
tOLZ
0
0
ns
Chip Deselect to Output in High Z *
tCHZ
12
15
ns
Output Disable to Output in High Z *
tOHZ
12
15
ns
–025
Min Max
–035
Min Max
0
0
12
ns
25
ns
* Parameters guaranteed by design but not tested
Write Cycle
Parameter
Symbol
Units
Write Cycle Time
tWC
25
35
ns
Chip Select to End of Write
tCW
17
25
ns
Address Valid to End of Write
tAW
17
25
ns
Data Valid to End of Write
tDW
13
20
ns
Write Pulse Width
tWP
17
25
ns
Address Setup Time
tAS
2
2
ns
Output Active from End of Write *
tOW
4
4
ns
Write to Output in High Z *
tWHZ
Data Hold from Write Time
tDH
0
0
ns
Address Hold Time
tAH
0
0
ns
13
15
ns
* Parameters guaranteed by design but not tested
Truth Table
Mode
SCE
OE
SWE
Data I/O
Power
Standby
H
X
X
High Z
Standby
Read
L
L
H
Data Out
Active
Output Disable
L
H
H
High Z
Active
Write
L
X
L
Data In
Active
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
Timing Diagrams — SRAM
Write Cycle Timing Diagrams
Read Cycle Timing Diagrams
Write Cycle (SWE Controlled, OE = VIH)
Read Cycle 1 (SCE = OE = VIL, SWE = VIH)
tWC
tRC
A0-18
A0-18
tAA
tAW
tCW
tOH
DI/O
Previous Data Valid
tAH
SCE
Data Valid
tAS
tWP
SWE
tWHZ
tOW
tDH
tDW
SEE NOTE
DI/O
Data Valid
Read Cycle 2 (SWE = VIH)
tRC
Write Cycle (SCE Controlled, OE = VIH )
A0-18
tWC
tAA
A0-18
tAH
tAW
SCE
tACE
tAS
tCHZ
tCLZ
SEE NOTE
SCE
tOHZ
SWE
tCW
SEE NOTE
OE
tWP
tOE
SEE NOTE
tOLZ
SEE NOTE
DI/O
UNDEFINED
tDW
Data Valid
High Z
DI/O
tDH
Data Valid
Note: Guaranteed by design, but not tested.
DON’T CARE
AC Test Circuit
Current Source
AC Test Conditions
IOL
VZ ~ 1.5 V (Bipolar Supply)
To Device Under Test
CL = 50 pF
Parameter
Input Pulse Level
Input Rise and Fall
Input and Output Timing Reference
Typical
0 – 3.0
5
1.5
Units
V
ns
V
IOH
Current Source
Notes:
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
Flash AC Characteristics – Read Only Operations
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Symbol
–60
–70
–90
Units
JEDEC Stand’d Min Max Min Max Min Max
Parameter
Read Cycle Time
tAVAV
tRC
60
70
90
ns
Address Access Time
tAVQV
tACC
60
70
90
ns
Chip Enable Access Time
tELQV
tCE
60
70
90
ns
Output Enable to Output Valid
tGLQV
tOE
30
35
35
ns
Chip Enable to Output High Z (1)
tEHQZ
tDF
20
20
20
ns
Output Enable High to Output High Z(1)
tGHQZ
tDF
20
ns
Output Hold from Address, CE or OE Change, Whichever is First
tAXQX
tOH
20
20
0
0
0
ns
Note 1. Guaranteed by design, but not tested
Flash AC Characteristics – Write / Erase / Program Operations, FWE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
JEDEC Stand’d
–60
–70
–90
Min Max Min Max Min Max
Units
Write Cycle Time
tAVAC
tWC
60
70
90
ns
Chip Enable Setup Time
tELWL
tCE
0
0
0
ns
Write Enable Pulse Width
tWLWH
tWP
40
45
45
ns
tAS
0
0
0
ns
Address Setup Time
tAVWL
Data Setup Time
tDVWH
tDS
40
45
45
ns
Data Hold Time
tWHDX
tDH
0
0
0
ns
Address Hold Time
tWLAX
tAH
45
45
45
ns
Write Enable Pulse Width High
tWHWL
tWPH
20
20
20
ns
Duration of Byte Programming Operation
tWHWH1
Sector Erase Time
tWHWH2
Read Recovery Time before Write
tGHWL
14
0
tOEH 1
Chip Erase Time
TYP
14
30
0
50
Chip Programming Time
Chip Enable Hold Time
14
30
tVCE
Vcc Setup Time
TYP
TYP
µs
30
Sec
50
µs
0
50
µs
50
50
50
Sec
10
10
10
ns
120
tWHWH3
120
120
Sec
1. Toggle and Data Polling only.
Flash AC Characteristics – Write / Erase / Program Operations, FCE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
JEDEC Stand’d
–60
–70
–90
Min Max Min Max Min Max
Write Cycle Time
tAVAC
tWC
Write Enable Setup Time
tWLEL
tWS
0
Chip Enable Pulse Width
tELEH
tCP
40
Address Setup Time
tAVEL
tAS
0
Data Setup Time
tDVEH
tDS
40
Data Hold Time
tEHDX
tDH
0
Address Hold Time
tELAX
tAH
45
Chip Enable Pulse Width High
tEHEL
tCPH
20
Duration of Byte Programming
tWHWH1
Sector Erase Time
tWHWH2
Read Recovery Time
tGHEL
Chip Programming Time
Chip Erase Time
Aeroflex Circuit Technology
tWHWH3
5
60
14
70
90
ns
0
0
ns
45
45
ns
0
0
ns
45
45
ns
0
0
ns
45
45
ns
20
TYP
14
30
0
Units
20
TYP
14
30
0
ns
TYP
µs
30
Sec
0
ns
50
50
50
Sec
120
120
120
Sec
SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
AC Waveforms for Flash Memory Read Operations
tRC
Addresses
Addresses Stable
tACC
FCE
tDF
OE
tOE
FWE
tCE
tOH
High Z
Outputs
Output Valid
High Z
Write/Erase/Program
Operation for Flash Memory, FWE Controlled
Data Polling
Addresses
5555H
PA
tWC
tAS
PA
tRC
tAH
FCE
tGHWL
OE
tWP
tWHWH1
tWPH
FWE
tCE
tDF
tOE
tDH
AOH
Data
PD
D7
DOUT
tDS
tOH
5.0V
tCE
Notes:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the 0utput of the complement of the data written to the deviced.
4. Dout is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
AC Waveforms Chip/Sector
Erase Operations for Flash Memory
Data Polling
tAH
5555H
Addresses
2AAAH
5555H
5555H
2AAAH
SA
tAS
FCE
tGHWL
OE
tWP
FWE
tCE
tWPH
tDH
AAH
Data
55H
80H
AAH
55H
10H/30H
tDS
VCC
tVCE
Notes:
1. SA is the sector address for sector erase.
AC Waveforms for Data Polling
During Embedded Algorithm Operations for Flash Memory
tCH
FCE
tDF
tOE
OE
tOEH
tCE
FWE
tOH
*
DQ7
DQ7
DQ7=
Valid Data
High Z
tWHWH1 or 2
DQ0-DQ6
DQ0–DQ6
Valid Data
DQ0–DQ6=Invalid
tOE
* DQ7=Valid Data (The device has completed the Embedded operation).
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
Write/Erase/Program Operation for Flash Memory, FCE Controlled
Data Polling
Addresses
5555H
PA
tWC
tAS
PA
tAH
FCE
tGHWL
OE
tCP
FWE
tWHWH1
tCPH
tWS
tDH
AOH
Data
PD
D7
DOUT
tDS
5.0V
Notes:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the 0utput of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
Pin Numbers & Functions
66 Pins — PGA-Type
Pin #
Function
Pin #
Function
Pin #
Function
Pin #
Function
1
SI/O8
18
A12
35
FI/O9
52
FWE1
2
SI/O9
19
Vcc
36
FI/O10
53
FCE1
3
SI/O10
20
SCE1
37
A6
54
GND
4
A13
21
NC
38
A7
55
FI/O3
5
A14
22
SI/O3
39
NC
56
FI/O15
6
A15
23
SI/O15
40
A8
57
FI/O14
7
A16
24
SI/O14
41
A9
58
FI/O13
8
A18
25
SI/O13
42
FI/O0
59
FI/O12
9
SI/O0
26
SI/O12
43
FI/O1
60
A0
10
SI/O1
27
OE
44
FI/O2
61
A1
11
SI/O2
28
A17
45
VCC
62
A2
12
SWE2
29
SWE1
46
FCE2
63
FI/O7
13
SCE2
30
SI/O7
47
FWE2
64
FI/O6
14
GND
31
SI/O6
48
FI/O11
65
FI/O5
15
SI/O11
32
SI/O5
49
A3
66
FI/O4
16
A10
33
SI/O4
50
A4
17
A11
34
FI/O8
51
A5
"P3" — 1.08" SQ PGA Type (without shoulder) Package
"P7" — 1.08" SQ PGA Type (with shoulder) Package
Bottom View (P7 & P3)
Side View
(P7)
Side View
(P3)
1.085 SQ
MAX
1.000
.185
MAX
.600
.025
.035
Pin 56
.050
1.030
1.040
.100
Pin 1
1.030
1.040
.100
.020
.016
1.000
.020
.016
Pin 66
.180
TYP
Pin 11
.180
TYP
.100
.160
MAX
All dimensions in inches
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
Pin Numbers & Functions
68 Pins — Dual-Cavity CQFP
Pin #
Function
Pin #
Function
Pin #
Function
Pin #
Function
1
GND
18
GND
35
OE
52
GND
2
FCE1
19
SI/O8
36
SCE2
53
FI/O7
3
A5
20
SI/O9
37
A17
54
FI/O6
4
A4
21
SI/O10
38
SWE2
55
FI/O5
5
A3
22
SI/O11
39
FWE1
56
FI/O4
6
A2
23
SI/O12
40
FWE2
57
FI/O3
7
A1
24
SI/O13
41
A18
58
FI/O2
8
A0
25
SI/O14
42
NC
59
FI/O1
9
NC
26
SI/O15
43
NC
60
FI/O0
10
SI/O0
27
Vcc
44
FI/O15
61
VCC
11
SI/O1
28
A11
45
FI/O14
62
A10
12
SI/O2
29
A12
46
FI/O13
63
A9
13
SI/O3
30
A13
47
FI/O12
64
A8
14
SI/O4
31
A14
48
FI/O11
65
A7
15
SI/O5
32
A15
49
FI/O10
66
A6
16
SI/O6
33
A16
50
FI/O9
67
SWE1
17
SI/O7
34
SCE1
51
FI/O8
68
FCE2
"F18" — CQFP Package
Pin 9
.990 SQ
±.010
.940 SQ
±.010
Pin 10
.140
MAX
.015
±.002
Pin 61
Pin 60
.008
±.002
.010
±.008
.040
.015
±.002
Detail “A”
.900 SQ
REF
.640 SQ
REF
Metal spacer
Pin 26
Pin 27
Pin 44
.800 REF
Pin 43
See Detail “A”
All dimensions in inches
Aeroflex Circuit Technology
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SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
CIRCUIT TECHNOLOGY
Ordering Information
Model Number
DESC SMD Number
Speed
Package
ACT–SF512K16N–26P3Q
5462-96901 (Pending)
25(S) / 60(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–37P3Q
5462-96901 (Pending)
35(S) / 70(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–39P3Q
5462-96901 (Pending)
35(S) / 90(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–26P7Q
5462-96901 (Pending)
25(S) / 60(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–37P7Q
5462-96901 (Pending)
35(S) / 70(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–39P7Q
5462-96901 (Pending)
35(S) / 90(F) ns
1.08"sq PGA-Type
ACT–SF512K16N–26F18Q
5462-96901 (Pending)
25(S) / 60(F) ns
.94"sq CQFP
ACT–SF512K16N–37F18Q
5462-96901 (Pending)
35(S) / 70(F) ns
.94"sq CQFP
ACT–SF512K16N–39F18Q
5462-96901 (Pending)
35(S) / 90(F) ns
.94"sq CQFP
Note: (S) = Speed for SRAM, (F) = Speed for FLASH
Part Number Breakdown
ACT– S F 512K 16 N– 26 P7 Q
Aeroflex Circuit
Technology
Screening
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
M = Military Temp, -55°C to +125°C, Screening *
Q = MIL-PRF-38534 Compliant / SMD
Memory Type
S (SRAM) & F (FLASH) Combo
Memory Depth
Options, N = none
Package Type & Size
Surface Mount Packages
Thru-Hole Packages
F18 = .94"SQ 68 Lead Dual-Cavity P3 = 1.085"SQ PGA 66 Pins
with out shoulder
CQFP
P7 = 1.085"SQ PGA 66 Pins
with shoulder
Memory Width, Bits
Memory Speed Code
26 = 25ns SRAM & 60ns FLASH
37 = 35ns SRAM & 70ns FLASH
39 = 35ns SRAM & 90ns FLASH
* Screened to the individual test methods of MIL-STD-883
Specifications subject to change without notice.
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11830
Aeroflex Circuit Technology
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800) 843-1553
11
SCD1663 REV A 4/28/98 Plainview NY (516) 694-6700
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