AD AD534TH Internally trimmed precision ic multiplier Datasheet

Internally Trimmed
Precision IC Multiplier
AD534
FEATURES
APPLICATIONS
High quality analog signal processing
Differential ratio and percentage computations
Algebraic and trigonometric function synthesis
Wideband, high crest rms-to-dc conversion
Accurate voltage controlled oscillators and filters
Available in chip form
FUNCTIONAL BLOCK DIAGRAM
STABLE
REFERENCE
AND BIAS
SF
+VS
–VS
TRANSFER FUNCTION
X1
V-TO-1
X2
TRANSLINEAR
MULTIPLIER
ELEMENT
Y1
VOUT = A
(X1 – X2) (Y1 – Y2)
– (Z1 – Z2)
SF
V-TO-1
Y2
A
Z1
V-TO-1
OUT
HIGH GAIN
OUTPUT
AMPLIFIER
0.75 ATTEN
Z2
09675-006
Pretrimmed to ±0.25% maximum 4-quadrant error (AD534L)
All inputs (X, Y, and Z) differential, high impedance for
[(X1 − X2)(Y1 − Y2)/10 V] + Z2 transfer function
Scale factor adjustable to provide up to ×100 gain
Low noise design: 90 μV rms, 10 Hz to10 kHz
Low cost, monolithic construction
Excellent long-term stability
Figure 1.
GENERAL DESCRIPTION
The AD534 is a monolithic laser trimmed four-quadrant multiplier divider having accuracy specifications previously found
only in expensive hybrid or modular products. A maximum
multiplication error of ±0.25% is guaranteed for the AD534L
without any external trimming. Excellent supply rejection, low
temperature coefficients and long-term stability of the on-chip
thin film resistors and buried Zener reference preserve accuracy
even under adverse conditions of use. It is the first multiplier to
offer fully differential, high impedance operation on all inputs,
including the Z input, a feature that greatly increases its
flexibility and ease of use. The scale factor is pretrimmed to the
standard value of 10.00 V; by means of an external resistor, this
can be reduced to values as low as 3 V.
The wide spectrum of applications and the availability of several
grades commend this multiplier as the first choice for all new
designs. The AD534J (±1% maximum error), AD534K (±0.5%
maximum), and AD534L (±0.25% maximum) are specified for
operation over the 0°C to +70°C temperature range. The AD534S
(±1% maximum) and AD534T (±0.5% maximum) are specified
over the extended temperature range, −55°C to +125°C. All
grades are available in hermetically sealed TO-100 metal cans
and SBDIP packages. AD534K, AD534S, and AD534T chips are
also available.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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AD534
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Description.................................................................. 12
Applications....................................................................................... 1
Provides Gain with Low Noise ..................................................... 12
Functional Block Diagram .............................................................. 1
Operation as a Multiplier .......................................................... 12
General Description ......................................................................... 1
Operation as a Squarer .............................................................. 13
Revision History ............................................................................... 2
Operation as a Divider............................................................... 13
Specifications..................................................................................... 3
Operation as a Square Rooter................................................... 14
Absolute Maximum Ratings............................................................ 7
Unprecedented Flexibility ......................................................... 14
Thermal Resistance ...................................................................... 7
Applications Information .............................................................. 15
ESD Caution.................................................................................. 7
Outline Dimensions ....................................................................... 17
Pin Configurations and Function Descriptions ........................... 8
Ordering Guide .......................................................................... 18
Typical Performance Characteristics ........................................... 10
REVISION HISTORY
4/11—Rev. B to Rev. C
Changes to Features Section, Figure 1, and
General Description Section ........................................................... 1
Added Pin Configurations and Function Descriptions
Section................................................................................................ 8
Moved Provides Gain with Low Noise Section .......................... 12
Moved Unprecedented Flexibility Section .................................. 14
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 18
Rev. C | Page 2 of 20
AD534
SPECIFICATIONS
TA = 25°C, ±VS = ±15 V, R ≥ 2 kΩ, all minimum and maximum specifications are guaranteed, unless otherwise noted.
Table 1.
Parameter
MULTIPLIER PERFORMANCE
Transfer Function
Min
AD534J
Typ
( X 1 − X 2 )(Y1 − Y2 )
10 V
Total Error 1 (−10 V ≤ X, Y ≤ +10 V)
TA = TMIN to TMAX
Total Error vs. Temperature
Scale Factor Error
(SF = 10.000 V Nominal) 3
Temperature Coefficient of
Scaling Voltage
Supply Rejection (±15 V ± 1 V)
Nonlinearity, X (X = 20 V p-p,
Y = 10 V)
Nonlinearity, Y (Y = 20 V p-p, X = 10 V
Feedthrough 4 , X (Y Nulled,
X = 20 V p-p 50 Hz)
Feedthrough4, Y (X Nulled,
Y = 20 V p-p, 50 Hz)
Output Offset Voltage
Output Offset Voltage Drift
DYNAMICS
Small Signal BW (VOUT = 0.1 rms)
1% Amplitude Error (CLOAD = 1000 pF)
Slew Rate (VOUT 20 p-p)
Settling Time (to 1%, D VOUT = 20 V)
NOISE
Noise Spectral Density
SF = 10 V
SF = 3 V 5
Wideband Noise
f = 10 Hz to 5 MHz
f = 10 Hz to 10 kHz
OUTPUT
Output Voltage Swing
Output Impedance (f ≤ 1 kHz)
Output Short-Circuit Current
(RL = 0 Ω, TA = TMIN to TMAX)
Amplifier Open-Loop Gain (f = 50 Hz)
INPUT AMPLIFIERS (X, Y, and Z) 6
Signal Voltage Range
Differential or Common Mode
Operating Differential
Offset Voltage (X, Y)
Offset Voltage Drift (X, Y)
Offset Voltage (Z)
Offset Voltage Drift (Z)
CMRR
Max
+ Z2
Min
AD534K
Typ
( X 1 − X 2 )(Y1 − Y2 )
10 V
±1.0 2
+ Z2
Min
AD534L
Typ
( X 1 − X 2 )(Y1 − Y2 )
10 V
±0.52
Max
Unit
+ Z2
±0.252
±1.5
±0.022
±1.0
±0.015
±0.5
±0.008
%
%
%/°C
±0.25
±0.1
±0.1
%
±0.02
±0.01
±0.4
±0.01
±0.01
±0.2
±0.32
±0.005
±0.01
±0.10
±0.122
%/°C
%
%
±0.2
±0.3
±0.1
±0.15
±0.12
±0.32
±0.005
±0.05
±0.12
±0.122
%
%
±0.01
±0.01
±0.12
±0.003
±0.12
%
±2
100
±152
±2
100
±102
mV
μV/°C
±5
200
±302
1
50
20
2
1
50
20
2
1
50
20
2
MHz
kHz
V/μs
μs
0.8
0.4
0.8
0.4
0.8
0.4
μV/√Hz
μV/√Hz
1
90
1
90
1
90
mV rms
μV rms
±112
602
Max
±112
±112
0.1
0.1
0.1
V
Ω
30
70
30
70
30
70
mA
dB
±10
±12
±5
100
±5
200
80
±10
±12
±2
50
±2
100
90
±10
±12
±2
50
±2
100
90
V
V
mV
μV/°C
mV
μV/°C
dB
±202
±302
702
Rev. C | Page 3 of 20
±102
±152
702
±102
±102
AD534
Parameter
Bias Current
Offset Current
Differential Resistance
DIVIDER PERFORMANCE
Transfer Function (X1 > X2)
Min
AD534J
Typ
0.8
0.1
10
10 V
Total Error1
X = 10 V, −10 V ≤ Z ≤ +10 V
X = 1 V, −1 V ≤ Z ≤ +1 V
0.1 V ≤ X ≤ 10 V, −10 V ≤ Z ≤ +10 V
SQUARER PERFORMANCE
Transfer Function
(Z 2 − Z 1 )
(X1 − X 2 )
AD534K
Typ
0.8
0.1
10
Min
+Y1
(X 1 − X 2 )2
(X 1 − X 2 )2
+Z2
10 V
Min
+Y1
10 V
62
1
4
3
Rev. C | Page 4 of 20
+Z2
%
±15
62
Specifications given are percent of full scale, ±10 V (that is, 0.01% = 1 mV).
Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
Can be reduced down to 3 V using external resistor between –VS and SF.
4
Irreducible component due to nonlinearity; excludes effect of offsets.
5
Using external resistor adjusted to give SF = 3 V.
6
See Figure 1 for definition of sections.
2
%
%
%
√(10 V(Z2 – Z1)) + X2
±0.25
±8
4
Unit
μA
μA
MΩ
+Y1
±0.2
±182
±8
(X1 − X 2 )
(X 1 − X 2 )2
+Z2
±15
±182
(Z 2 − Z 1 )
Max
2.02
0.22
±0.2
±0.8
±0.8
√(10 V(Z2 – Z1)) + X2
±0.5
±15
AD534L
Typ
0.8
0.05
10
10 V
±0.3
√(10 V(Z2 – Z1)) + X2
±1.0
4
(X1 − X 2 )
Max
2.02
±0.35
±1.0
±1.0
±0.6
±8
(Z 2 − Z 1 )
10 V
±0.75
±2.0
±2.5
10 V
Total Error (−10 V ≤ X ≤ +10 V)
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z1 ≤ Z2)
Total Error1 (1 V ≤ Z ≤ 10 V)
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance
Operating
Supply Current
Quiescent
Max
2.02
%
±182
V
V
62
mA
AD534
TA = 25°C, ±VS = ±15 V, R ≥ 2 kΩ, all minimum and maximum specifications are guaranteed, unless otherwise noted.
Table 2.
Parameter
MULTIPLIER PERFORMANCE
Transfer Function
Min
AD534S
Typ
( X 1 − X 2 )(Y1 − Y2 )
10 V
Total Error 1 (−10 V ≤ X, Y ≤ +10 V)
TA = TMIN to TMAX
Total Error vs. Temperature
Scale Factor Error
(SF = 10.000 V Nominal) 3
Temperature Coefficient of Scaling Voltage
Supply Rejection (±15 V ± 1 V)
Nonlinearity, X (X = 20 V p-p, Y = 10 V)
Nonlinearity, Y (Y = 20 V p-p, X = 10 V
Feedthrough 4 , X (Y Nulled,
X = 20 V p-p, 50 Hz)
Feedthrough4, Y (X Nulled,
Y = 20 V p-p, 50 Hz)
Output Offset Voltage
Output Offset Voltage Drift
DYNAMICS
Small Signal BW (VOUT = 0.1 rms)
1% Amplitude Error (CLOAD = 1000 pF)
Slew Rate (VOUT 20 p-p)
Settling Time (to 1%, ΔVOUT = 20 V)
NOISE
Noise Spectral Density
SF = 10 V
SF = 3 V 5
Wideband Noise
f = 10 Hz to 5 MHz
f = 10 Hz to 10 kHz
OUTPUT
Output Voltage Swing
Output Impedance (f ≤ 1 kHz)
Output Short-Circuit Current (RL = 0 Ω, TA = TMIN to TMAX)
Amplifier Open-Loop Gain (f = 50 Hz)
INPUT AMPLIFIERS (X, Y, and Z) 6
Signal Voltage Range
Differential or Common Mode
Operating Differential
Offset Voltage (X, Y)
Offset Voltage Drift (X, Y)
Offset Voltage (Z)
Offset Voltage Drift (Z)
CMRR
Bias Current
Offset Current
Differential Resistance
Max
Min
( X 1 − X 2 )(Y1 − Y2 )
+ Z2
10 V
±1.0 2
±2.02
±0.022
Max
Unit
+ Z2
±0.52
±0.012
%
%
%/°C
±1.0
±0.25
±0.02
±0.01
±0.4
±0.2
±0.1
±0.01
±0.01
±0.2
±0.1
±0.32
±0.12
%
%/°C
%
%
%
±0.3
±0.15
±0.32
%
±0.01
±2
±0.12
±152
3002
%
mV
μV/°C
±0.01
±5
±302
5002
1
50
20
2
1
50
20
2
MHz
kHz
V/μs
μs
0.8
0.4
0.8
0.4
μV/√Hz
μV/√Hz
1
90
1
90
mV/rms
μV/rms
0.1
30
70
0.1
30
70
V
Ω
mA
dB
±10
±12
±5
100
±5
±10
±12
±2
150
±2
±112
602
AD534T
Typ
±112
80
0.8
0.1
10
Rev. C | Page 5 of 20
±202
±302
5002
702
2
2.0
90
0.8
0.1
10
±102
±152
3002
2.02
V
V
mV
μV/°C
mV
μV/°C
dB
μA
μA
MΩ
AD534
Parameter
DIVIDER PERFORMANCE
Transfer Function (X1 > X2)
Min
AD534S
Typ
10 V
Total Error1
X = 10 V, −10 V ≤ Z ≤ +10 V
X = 1 V, −1 V ≤ Z ≤ +1 V
0.1 V ≤ X ≤ 10 V, −10 V ≤ Z ≤ +10 V
SQUARER PERFORMANCE
Transfer Function
(Z 2 − Z 1 )
(X1 − X 2 )
Min
+Y1
( X 1 − X 2 )2
10 V
3
Rev. C | Page 6 of 20
+Z2
%
√(10 V(Z2 – Z1)) + X2
±0.5
±8
62
Specifications given are percent of full scale, ±10 V (that is, 0.01% = 1 mV).
Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
Can be reduced down to 3 V using external resistor between –VS and SF.
4
Irreducible component due to nonlinearity: excludes effect of offsets.
5
Using external resistor adjusted to give SF = 3 V.
6
See Figure 1 for definition of sections.
2
%
%
%
±15
±222
4
Unit
+Y1
±0.3
±15
1
(X1 − X 2 )
( X 1 − X 2 )2
+Z2
√(10 V(Z2 – Z1)) + X2
±1.0
4
(Z 2 − Z 1 )
Max
±0.35
±1.0
±1.0
±0.6
±8
AD534T
Typ
10 V
±0.75
±2.0
±2.5
10 V
Total Error (−10 V ≤ X ≤ +10 V)
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z1 ≤ Z2)
Total Error1 (1 V ≤ Z ≤ 10 V)
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance
Operating
Supply Current
Quiescent
Max
%
±222
V
V
62
mA
AD534
ABSOLUTE MAXIMUM RATINGS
+VS
X1
Table 3.
AD534S,
AD534T
±22 V
500 mW
Indefinite
Indefinite
±VS
±VS
0°C to +70°C
−55°C to +125°C
−65°C to +150°C
−65°C to +150°C
300°C
300°C
8
A
0.076
(1.93)
SF
Z1
Y2
–VS
Z2
0.100 (2.54)
Figure 2. Chip Dimensions and Bonding Diagram
Dimensions shown in inches and (mm)
Contact factory for latest dimensions.
+VS
470kΩ
50kΩ
1kΩ
THERMAL RESISTANCE
TO APPROPRIATE
INPUT TERMINAL
–VS
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Figure 3. Optional Trimming Configuration
ESD CAUTION
Table 4. Thermal Resistance
θJA
150
95
95
θJC
25
25
25
Unit
°C/W
°C/W
°C/W
Rev. C | Page 7 of 20
09675-004
Y1
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Package Type
10-Pin TO-100 (H-10)
14-Lead SBDIP (D-14)
20-Terminal LCC (E-20-1)
5
3
4
09675-005
Parameter
Supply Voltage
Internal Power Dissipation
Output Short Circuit to
Ground
Input Voltages (X1, X2, Y1, Y2,
Z1, Z2)
Rated Operating
Temperature Range
Storage Temperature
Range
Lead Temperature Range,
60 sec Soldering
X2
AD534J,
AD534K,
AD534L
±18 V
500 mW
OUT
AD534
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
+VS
X2
OUT
9
10
1
8
AD534
TOP VIEW
(Not to
2
Scale)
SF
3
Y1
4
Z1
7
6
Z2
5
–VS
Y2
09675-001
X1
Figure 4. TO-100 (H-10) Pin Configuration
Table 5. H-10 Package Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
X2
SF
Y1
Y2
−VS
Z2
Z1
OUT
+VS
X1
Description
Inverting Differential Input of the X Multiplicand Input.
Scale Factor Input.
Noninverting Differential Input of the Y Multiplicand Input.
Inverting Differential Input of the Y Multiplicand Input.
Negative Supply Rail.
Inverting Differential Input of the Z Reference Input.
Noninverting Differential Input of the Z Reference Input.
Product Output.
Positive Supply Rail.
Noninverting Differential Input of the X Multiplicand Input.
X1
1
X2
2
NC
3
14 +VS
13 NC
AD534
NC
12 OUT
TOP VIEW
11 Z1
(Not to Scale)
5
10 Z2
Y1
6
9
NC
Y2
7
8
–VS
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
09675-002
SF 4
Figure 5. TO-100 (D-14) Pin Configuration
Table 6. D-14 Package Pin Function Descriptions
Pin No.
1
2
3, 5, 9, 13
4
6
7
8
10
11
12
14
Mnemonic
X1
X2
NC
SF
Y1
Y2
−VS
Z2
Z1
OUT
+VS
Description
Noninverting Differential Input of the X Multiplicand Input.
Inverting Differential Input of the X Multiplicand Input.
No Connect. Do not connect to this pin.
Scale Factor Input.
Noninverting Differential Input of the Y Multiplicand Input.
Inverting Differential Input of the Y Multiplicand Input.
Negative Supply Rail.
Inverting Differential Input of the Z Reference Input.
Noninverting Differential Input of the Z Reference Input.
Product Output.
Positive Supply rail.
Rev. C | Page 8 of 20
2
1
NC
X1
NC
3
+VS
X2
AD534
20 19
18
OUT
AD534
17
NC
TOP VIEW
(Not to Scale)
16
Z1
15
NC
14
Z2
NC 4
SF 6
NC 7
NC 8
NC
–VS
NC
10 11 12 13
Y2
Y1
9
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
09675-003
NC 5
Figure 6. LCC (E-20-1) Pin Configuration
Table 7. E-20-1 Package Pin Function Descriptions
Pin No.
1, 4, 5, 7, 8, 11, 13, 15, 17, 19
2
3
6
9
10
12
14
16
19
20
Mnemonic
NC
X1
X2
SF
Y1
Y2
−VS
Z2
Z1
OUT
+VS
Description
No Connect. Do not connect to this pin.
Noninverting Differential Input of the X Multiplicand Input.
Inverting Differential Input of the X Multiplicand Input.
Scale Factor Input.
Noninverting Differential Input of the Y Multiplicand Input.
Inverting Differential Input of the Y Multiplicand Input.
Negative Supply Rail.
Inverting Differential Input of the Z Reference Input.
Noninverting Differential Input of the Z Reference Input.
Product Output.
Positive Supply Rail.
Rev. C | Page 9 of 20
AD534
TYPICAL PERFORMANCE CHARACTERISTICS
Typical at 25°C, with ±VS = ±15 V dc, unless otherwise noted.
1000
OUTPUT, RL ≥ 2kΩ
12
100
10
8
6
8
10
12
14
16
18
POSITIVE OR NEGATIVE SUPPLY (V)
20
1
0.1
10
Y-FEEDTHROUGH
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 10. AC Feedthrough vs. Frequency
Figure 7. Input/Output Signal Range vs. Supply Voltages
800
1.5
600
NOISE SPECTRAL DENSITY (µV/ Hz)
700
BIAS CURRENT (nA)
X-FEEDTHROUGH
SCALING VOLTAGE = 10V
500
400
300
200
0
–60
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
140
SCALING VOLTAGE = 10V
0.5
0
10
09675-021
SCALING VOLTAGE = 3V
100
1
SCALING VOLTAGE = 3V
100
1k
FREQUENCY (Hz)
10k
100k
09675-024
4
10
09675-023
FEEDTHROUGH (mV p-p)
ALL INPUTS, SF = 10V
09675-020
PEAK POSITIVE OR NEGATIVE SIGNAL (V)
14
Figure 11. Noise Spectral Density vs. Frequency
Figure 8. Bias Current vs. Temperature (X, Y, or Z Input)
90
100
OUTPUT NOISE VOLTAGE (µV rms)
80
70
TYPICAL FOR
ALL INPUTS
50
40
30
20
CONDITIONS:
10Hz TO 10kHz BANDWIDTH
80
70
60
0
100
1k
10k
FREQUENCY (Hz)
100k
1M
50
2.5
Figure 9. Common-Mode Rejection Ratio vs. Frequency
5.0
7.5
SCALING VOLTAGE, SF (V)
Figure 12. Wideband Noise vs. Scaling Voltage
Rev. C | Page 10 of 20
10.0
09675-025
10
09675-022
CMRR (dB)
60
90
AD534
10
60
0
40
–10
CL ≤ 1000pF
CF ≤ 200pF
–20
WITH ×10
FEEDBACK
ATTENUATOR
–30
10k
Figure 13. Frequency Response as a Multiplier
VX = 1V dc
VZ = 100mV rms
0
NORMAL
CONNECTION
100k
1M
FREQUENCY (Hz)
20
VX = 10V dc
VZ = 1V rms
10M
–20
1k
10k
100k
FREQUENCY (Hz)
1M
10M
09675-027
CL ≤ 1000pF
CF = 0pF
VX = 100mV dc
VZ = 10mV rms
( )
VO
OUTPUT – dB V
Z
CL = 0pF
09675-026
OUTPUT RESPONSE (dB)
0dB = 0.1V RMS, RL = 2kΩ
Figure 14. Frequency Response vs. Divider Denominator Input Voltage
Rev. C | Page 11 of 20
AD534
FUNCTIONAL DESCRIPTION
Figure 1 shows a functional block diagram of the AD534. Inputs
are converted to differential currents by three identical voltageto-current converters, each trimmed for zero offset. The product
of the X and Y currents is generated by a multiplier cell using
Gilbert’s translinear technique. An on-chip buried Zener
provides a highly stable reference, which is laser trimmed to
provide an overall scale factor of 10 V. The difference between
XY/SF and Z is then applied to the high gain output amplifier.
This permits various closed-loop configurations and dramatically reduces nonlinearities due to the input amplifiers, a
dominant source of distortion in earlier designs.
The effectiveness of the new scheme can be judged from the
fact that, under typical conditions as a multiplier, the nonlinearity on the Y input, with X at full scale (±10 V), is ±0.005% of FS.
Even at its worst point, which occurs when X = ±6.4 V, nonlinearity is typically only ±0.05% of FS. Nonlinearity for signals applied
to the X input, on the other hand, is determined almost entirely
by the multiplier element and is parabolic in form. This error is a
major factor in determining the overall accuracy of the unit and
therefore is closely related to the device grade.
The generalized transfer function for the AD534 is given by
(X1 − X 2 )(Y1 − Y2 ) − (Z
SF
1
PROVIDES GAIN WITH LOW NOISE
The AD534 is the first general-purpose multiplier capable of
providing gains up to ×100, frequently eliminating the need for
separate instrumentation amplifiers to precondition the inputs.
The AD534 can be very effectively employed as a variable gain
differential input amplifier with high common-mode rejection.
The gain option is available in all modes and simplifies the
implementation of many function-fitting algorithms such as
those used to generate sine and tangent. The utility of this
feature is enhanced by the inherent low noise of the AD534:
90 μV rms (depending on the gain), a factor of 10 lower than
previous monolithic multipliers. Drift and feedthrough are also
substantially reduced over earlier designs.
OPERATION AS A MULTIPLIER
− Z2 )
where:
A is the open-loop gain of the output amplifier, typically
70 dB at dc.
X1, Y1, Z1, X2, Y2, and Z2 are the input voltages (full scale = ±SF,
peak = ±1.25 SF).
SF is the scale factor, pretrimmed to 10.00 V but adjustable by
the user down to 3 V.
In most cases, the open-loop gain can be regarded as infinite,
and SF is 10 V. The operation performed by the AD534, can
then be described in terms of the following equation:
(X1 − X2)(Y1 −Y2 ) = 10 V (Z1 − Z2)
The user can adjust SF for values between 10.00 V and 3 V by
connecting an external resistor in series with a potentiometer
between SF and −VS. The approximate value of the total
resistance for a given value of SF is given by the relationship:
R S F = 5.4 kΩ
Supply voltages of ±15 V are generally assumed. However,
satisfactory operation is possible down to ±8 V (see Figure 7).
Because all inputs maintain a constant peak input capability of
±1.25 SF, some feedback attenuation is necessary to achieve
output voltage swings in excess of ±12 V when using higher
supply voltages.
SF
1 0 − SF
Due to device tolerances, allowance should be made to vary RSF
by ±25% using the potentiometer. Considerable reduction in
bias currents, noise, and drift can be achieved by decreasing SF.
This has the overall effect of increasing signal gain without the
customary increase in noise. Note that the peak input signal is
always limited to 1.25 SF (that is, ±5 V for SF = 4 V) so the
overall transfer function shows a maximum gain of 1.25. The
performance with small input signals, however, is improved by
using a lower scale factor because the dynamic range of the
Figure 15 shows the basic connection for multiplication. Note
that the circuit meets all specifications without trimming.
X INPUT
±10V FS
±12V PK
X1
+VS
X2
OUT
AD534
SF
Y INPUT
±10V FS
±12V PK
Y1
Y2
+15V
Z1
OUTPUT, ±12V PK =
(X1 – X2) (Y1 – Y2)
+ Z2
10V
Z2
OPTIONAL SUMMING
INPUT, Z, ±10V PK
–VS
–15V
09675-007
VOUT = A
inputs is now fully utilized. Bandwidth is unaffected by the use
of this option.
Figure 15. Basic Multiplier Connection
To reduce ac feedthrough to a minimum (as in a suppressed
carrier modulator), apply an external trim voltage (±30 mV
range required) to the X or Y input (see Figure 3). Figure 10
shows the typical ac feedthrough with this adjustment mode.
Note that the Y input is a factor of 10 lower than the X input
and should be used in applications where null suppression is
critical.
The high impedance Z2 terminal of the AD534 can be used to
sum an additional signal into the output. In this mode, the
output amplifier behaves as a voltage follower with a 1 MHz
small signal bandwidth and a 20 V/μs slew rate. This terminal
should always be referenced to the ground point of the driven
system, particularly if this is remote. Likewise, the differential
inputs should be referenced to their respective ground potentials to realize the full accuracy of the AD534.
A much lower scaling voltage can be achieved without any
reduction of input signal range using a feedback attenuator as
shown in Figure 16. In this example, the scale is such that VOUT =
Rev. C | Page 12 of 20
AD534
If the application depends on accurate operation for inputs that
are always less than ±3 V, the use of a reduced value of SF is recommended as described in the Functional Description section.
Alternatively, a feedback attenuator can be used to raise the
output level. This is put to use in the difference-of-squares
application to compensate for the factor of 2 loss involved in
generating the sum term (see Figure 20).
X1
+VS
X2
OUT
AD534
Y INPUT
±10V FS
±12V PK
+15V
OUTPUT, ±12V PK =
(X1 – X2) (Y1 – Y2)
(SCALE = 1V)
90kΩ
SF
Z1
Y1
Z2
Y2
–VS
OPTIONAL PEAKING
CAPACITOR CF = 200pF
10kΩ
09675-008
X INPUT
±10V FS
±12V PK
–15V
Figure 16. Connections for Scale Factor of Unity
Feedback attenuation also retains the capability for adding a
signal to the output. Signals can be applied to the high impedance
Z2 terminal where they are amplified by +10 or to the common
ground connection where they are amplified by +1. Input signals
can also be applied to the lower end of the 10 kΩ resistor, giving
a gain of −9. Other values of feedback ratio, up to ×100, can be
used to combine multiplication with gain.
Occasionally, it may be desirable to convert the output to a
current into a load of unspecified impedance or dc level. For
example, the function of multiplication is sometimes followed
by integration; if the output is in the form of a current, a simple
capacitor provides the integration function. Figure 17 shows
how this can be achieved. This method can also be applied in
squaring, dividing, and square rooting modes by appropriate
choice of terminals. This technique is used in the voltage
controlled low-pass filter and the differential input voltage-tofrequency converter shown in the Applications Information
section.
X1
X2
+VS
OUT
AD534
Y INPUT
±10V FS
±12V PK
SF
Z1
Y1
Z2
Y2
CURRENT-SENSING
RESISTOR, RS, 2kΩ MIN
IOUT =
–VS
OPERATION AS A DIVIDER
Figure 18 shows the connection required for division. Unlike
earlier products, the AD534 provides differential operation on
both numerator and denominator, allowing the ratio of two
floating variables to be generated. Further flexibility results
from access to a high impedance summing input to Y1. As with
all dividers based on the use of a multiplier in a feedback loop,
the bandwidth is proportional to the denominator magnitude,
as shown in Figure 14.
X INPUT
(DENOMINATOR)
±10V FS
±12V PK
OPTIONAL
SUMMING
INPUT
±10V PK
(X1 – X2) (Y1 – Y2)
1
×
10V
RS
+
–
X1
+VS
X2
OUT
AD534
SF
Z1
Y1
Z2
Y2
–VS
+15V
OUTPUT, ±12V PK =
10V (Z2 – Z1)
+ Y1
(X1 – X2)
Z INPUT
(NUMERATOR)
±10V FS
±12V PK
–15V
Figure 18. Basic Divider Connection
INTEGRATOR
CAPACITOR
(SEE TEXT)
09675-009
X INPUT
±10V FS
±12V PK
The difference of squares function is also used as the basis for a
novel rms-to-dc converter shown in Figure 27. The averaging
filter is a true integrator, and the loop seeks to zero its input. For
this to occur, (VIN)2 − (VOUT)2 = 0 V (for signals whose period is
well below the averaging time constant). Therefore, VOUT is
forced to equal the rms value of VIN. The absolute accuracy of
this technique is very high; at medium frequencies and for
signals near full scale, it is determined almost entirely by the
ratio of the resistors in the inverting amplifier. The multiplier
scaling voltage affects only open-loop gain. The data shown is
typical of performance that can be achieved with an AD534K,
but even using an AD534J, this technique can readily provide
better than 1% accuracy over a wide frequency range, even for
crest factors in excess of 10.
09675-010
(X1 – X2)(Y1 – Y2), so that the circuit can exhibit a maximum
gain of 10. This connection results in a reduction of bandwidth
to about 80 kHz without the peaking capacitor CF = 200 pF. In
addition, the output offset voltage is increased by a factor of 10
making external adjustments necessary in some applications.
Adjustment is made by connecting a 4.7 MΩ resistor between
Z1 and the slider of a potentiometer connected across the
supplies to provide ±300 mV of trim range at the output.
Figure 17. Conversion of Output to Current
OPERATION AS A SQUARER
Operation as a squarer is achieved in the same fashion as the
multiplier except that the X and Y inputs are used in parallel.
The differential inputs can be used to determine the output
polarity (positive for X1 = Yl and X2 = Y2, negative if either one
of the inputs is reversed). Accuracy in the squaring mode is
typically a factor of 2 better than in the multiplying mode and
the largest errors occurring with small values of output for
input below 1 V.
Without additional trimming, the accuracy of the AD534K and
AD534L is sufficient to maintain a 1% error over a 10 V to 1 V
denominator range. This range can be extended to 100:1 by
simply reducing the X offset with an externally generated trim
voltage (range required is ±3.5 mV maximum) applied to the
unused X input (see Figure 3). To trim, apply a ramp of +100 mV
to +V at 100 Hz to both X1 and Z1 (if X2 is used for offset adjustment; otherwise, reverse the signal polarity) and adjust the trim
voltage to minimize the variation in the output
Because the output is near 10 V, it should be ac-coupled for
this adjustment. The increase in noise level and reduction in
bandwidth preclude operation much beyond a ratio of 100 to 1.
Rev. C | Page 13 of 20
AD534
In contrast to earlier devices, which were intolerant of capacitive
loads in the square root modes, the AD534 is stable with all
loads up to at least 1000 pF. For critical applications, a small
adjustment to the Z input offset (see Figure 3) improves
accuracy for inputs below 1 V.
As with the multiplier connection, overall gain can be introduced
by inserting a simple attenuator between the output and Y2
terminal. This option and the differential ratio capability of the
AD534 are used in the percentage computer application shown
in Figure 24. This configuration generates an output proportional to the percentage deviation of one variable (A) with
respect to a reference variable (B), with a scale of 1% per volt.
UNPRECEDENTED FLEXIBILITY
OPERATION AS A SQUARE ROOTER
The operation of the AD534 in the square root mode is shown
in Figure 19. The diode prevents a latching condition, which
may occur if the input momentarily changes polarity. As shown,
the output is always positive; it can be changed to a negative
output by reversing the diode direction and interchanging the X
inputs. Because the signal input is differential, all combinations
of input and output polarities can be realized, but operation is
restricted to the one quadrant associated with each combination
of inputs.
The precise calibration and differential Z input provide a degree
of flexibility found in no other currently available multiplier.
Standard multiplication, division, squaring, square-rooting
(MDSSR) functions are easily implemented while the restriction
to particular input/output polarities imposed by earlier designs
has been eliminated. Signals can be summed into the output,
with or without gain and with either a positive or negative
sense. Many new modes based on implicit function synthesis
have been made possible, usually requiring only external
passive components. The output can be in the form of a current,
if desired, facilitating such operations as integration.
OUTPUT, ±12V PK =
10V (Z2 – Z1) + X2
+VS
X2
OUT
AD534
+15V
SF
Z1
–
Y1
Z2
+
Y2
–VS
REVERSE THIS
AND X INPUTS
FOR NEGATIVE
OUTPUTS
RL
(MUST BE
PROVIDED)
Z INPUT
±10V FS
±12V PK
–15V
09675-011
OPTIONAL
SUMMING
INPUT
X, ±10V PK
X1
Figure 19. Square-Rooter Connection
Rev. C | Page 14 of 20
AD534
APPLICATIONS INFORMATION
The versatility of the AD534 allows the creative designer to implement a variety of circuits such as wattmeters, frequency doublers, and
automatic gain controls.
MODULATION
INPUT, ±EM
OUT
AD534
A+B
2
B
+15V
30kΩ
SF
Z1
Y1
Z2
Y2
–VS
A2 – B2
OUTPUT =
10V
CARRIER INPUT
EC sin ωt
10kΩ
–15V
2kΩ
SIGNAL INPUT,
ES, ±5V PK
+VS
X2
OUT
AD534
Z1
Y1
Z2
Y2
–VS
OUTPUT, ±12V PK =
1kΩ
EC ES
0.1V
9kΩ
0.005µF
1kΩ
–15V
NOTES
1. GAIN IS × 10 PER VOLT OF EC, ZERO TO × 50.
2. WIDEBAND (10Hz TO 30kHz) OUTPUT NOISE IS 3mV rms,
TYP CORRESPONDING TO A.F.S. SNR OF 70dB.
3. NOISE REFERRED TO SIGNAL INPUT, WITH EC = ±5V, IS
60µV rms, TYP.
4. BANDWIDTH IS DC TO 20kHz, –3dB, INDEPENDENT OF GAIN.
B INPUT,
(+VE ONLY)
10kΩ
INPUT, Eθ
0V TO +10V
X2
OUT
AD534
SF
Y1
Z2
Y2
–VS
–15V
X1
+VS
X2
OUT
AD534
SF
Z1
Y1
Z2
Y2
–VS
+15V
OUTPUT = (100V)
(1% PER VOLT)
A–B
B
A INPUT (±)
–15V
+15V
OUTPUT = (10V) sin θ
Eθ
π
WHERE θ =
×
10V
2
4.7kΩ
Z1
–VS
Figure 24. Percentage Computer
4.3kΩ
X1
+VS
X2
OUT
AD534
3kΩ
SF
Z1
Y1
Z2
Y2
–VS
–15V
USING CLOSE TOLERANCE RESISTORS AND AD543L,
ACCURACY OF FIT IS WITHIN ±0.5% AT ALL POINTS.
θ IS IN RADIANS.
INPUT, Y ±10V FS
09675-014
18kΩ
+VS
Y2
OTHER SCALES, FROM 10% PER VOLT TO 0.1% PER VOLT
CAN BE OBTAINED BY ALTERING THE FEEDBACK RATIO.
Figure 21. Voltage-Controlled Amplifier
X1
Z2
+15V
39kΩ
SF
Y1
Figure 23. Linear AM Modulator
09675-013
–VS
SET GAIN
1kΩ
X1
Z1
EM
E sin ωt
10V C
THE SF PIN OR A Z ATTENUATOR CAN BE USED TO PROVIDE OVERALL
SIGNAL AMPLIFICATION. OPERATION FROM A SINGLE SUPPLY POSSIBLE;
BIAS Y2 TO VS/2.
Figure 20. Difference of Squares
CONTROL INPUT,
EC, 0V TO ±5V
SF
OUTPUT = 1 ±
09675-015
X2
OUT
09675-016
+VS
X2
+15V
Figure 22. Sine Function Generator
+15V
OUTPUT, ±5V/PK =
y
(10V)
1+y
Y
WHERE y =
(10V)
–15V
Figure 25. Bridge Linearization Function
Rev. C | Page 15 of 20
09675-017
X1
A–B
2
+VS
AD534
09675-012
A
X1
AD534
+15V
39kΩ
+VS
X2
OUT
AD534
SF
3pF to 30pF
+15V
Z1
3
+
Y1
Z2
–
Y2
–VS
OUTPUT
±15V APPROX.
PINS 5, 6, 8 TO +15V
PINS 1, 4 TO –15V
EC
1
f=
×
= 1kHz PER VOLT
40 CR
WITH VALUES SHOWN
0.01
(= C)
–15V
7
AD211
500Ω 2.2kΩ
(= R)
CONTROL INPUT,
EC 100mV TO 10V
82kΩ
2
ADJ
1kHz
CALIBRATION PROCEDURE:
WITH EC = 1.0V, ADJUST POTENTIOMETER TO SET f = 1.000kHz WITH
EC = 8.0V, ADJUST TRIMMER CAPACITOR TO SET f = 8.000kHz. LINEARITY
WILL TYPICALLY BE WITHIN ±0.1% OF FS FOR ANY OTHER INPUT.
DUE TO DELAYS IN THE COMPARATOR, THIS TECHNIQUE IS NOT SUITABLE
FOR MAXIMUM FREQUENCIES ABOVE 10kHz. FOR FREQUENCIES ABOVE
10kHz THE AD537 VOLTAGE-TO-FREQUENCY CONVERTER IS RECOMMENDED.
A TRIANGLE-WAVE OF ±5V PK APPEARS ACROSS THE 0.01µF CAPACITOR: IF
USED AS AN OUTPUT, A VOLTAGE-FOLLOWER SHOULD BE INTERPOSED.
09675-018
X1
2kΩ
ADJ 8kHz
Figure 26. Differential Input Voltage-to-Frequency Converter
MATCHED TO 0.025%
20kΩ
10kΩ
AD741K
RMS + DC
MODE
AC RMS
X1
+VS
X2
OUT
+15V
5kΩ
10kΩ
+
10µF SOLID Ta
10kΩ
AD534
OUTPUT
0V TO 5V
Z1
SF
10kΩ
Z2
Y1
10MΩ
–VS
Y2
20kΩ
–15V
ZERO
ADJ
AD741J
+15V
CALIBRATION PROCEDURE:
WITH MODE SWITCH IN ‘RMS + DC’ POSITION, APPLY AN INPUT OF +1.00V DC.
ADJUST ZERO UNTIL OUTPUT READS SAME AS INPUT. CHECK FOR INPUTS
OF ±10V; OUTPUT SHOULD BE WITHIN ±0.05% (5mV).
ACCURACY IS MAINTAINED FROM 60Hz TO 100kHz, AND IS TYPICALLY HIGH
BY 0.5% AT 1MHz FOR VIN = 4V RMS (SINE, SQUARE, OR TRIANGLULAR-WAVE).
PROVIDED THAT THE PEAK INPUT IS NOT EXCEEDED, CREST FACTORS UP
TO AT LEAST 10 HAVE NO APPRECIABLE EFFECT ON ACCURACY.
INPUT IMPEDANCE IS ABOUT 10kΩ; FOR HIGH (10MΩ) IMPEDANCE, REMOVE
MODE SWITCH AND INPUT COUPLING COMPONENTS.
FOR GUARANTEED SPECIFICATIONS THE AD536A AND AD636 ARE OFFERED
AS A SINGLE PACKAGE RMS-TO-DC CONVERTER.
Figure 27. Wideband, High-Crest Factor, RMS-to-DC Converter
Rev. C | Page 16 of 20
09675-019
INPUT
5V RMS FS
±10V PEAK
10µF
NONPOLAR
10kΩ
AD534
OUTLINE DIMENSIONS
REFERENCE PLANE
0.500 (12.70)
MIN
0.185 (4.70)
0.165 (4.19)
0.160 (4.06)
0.110 (2.79)
0.335 (8.51)
0.305 (7.75)
0.370 (9.40)
0.335 (8.51)
6
7
5
0.021 (0.53)
0.016 (0.40)
0.115
(2.92)
BSC
8
4
9
3
10
2
0.230 (5.84)
BSC
BASE & SEATING PLANE
0.040 (1.02) MAX
1
0.045 (1.14)
0.025 (0.65)
0.034 (0.86)
0.025 (0.64)
36° BSC
0.050 (1.27) MAX
022306-A
DIMENSIONS PER JEDEC STANDARDS MO-006-AF
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 28. 10-Pin Metal Header Package [TO-100]
(H-10)
Dimensions shown in inches and (millimeters)
0.005 (0.13) MIN
0.080 (2.03) MAX
8
14
1
PIN 1
0.200 (5.08)
MAX
7
0.310 (7.87)
0.220 (5.59)
0.100 (2.54)
BSC
0.765 (19.43) MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 29. 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-14)
Dimensions shown in inches and (millimeters)
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.088 (2.24)
0.054 (1.37)
0.200 (5.08)
REF
0.100 (2.54) REF
0.015 (0.38)
MIN
0.075 (1.91)
REF
0.095 (2.41)
0.075 (1.90)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.055 (1.40)
0.045 (1.14)
19
18
3
20
4
0.028 (0.71)
0.022 (0.56)
1
BOTTOM
VIEW
0.050 (1.27)
BSC
8
14
13
9
45° TYP
0.150 (3.81)
BSC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 30. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1)
Dimensions shown in inches and (millimeters)
Rev. C | Page 17 of 20
022106-A
0.100 (2.54)
0.064 (1.63)
AD534
ORDERING GUIDE
Model 1
AD534JD
AD534JDZ
AD534KD
AD534KDZ
AD534LD
AD534LDZ
AD534JH
AD534JHZ
AD534KH
AD534KHZ
AD534LH
AD534LHZ
AD534K Chips
AD534SD
AD534SD/883B
AD534TD
AD534TD/883B
AD534SE/883B
AD534TE/883B
AD534SH
AD534SH/883B
AD534TH
AD534TH/883B
AD534S Chips
AD534T Chips
1
Temperature Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0° C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
Package Description
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
Chip
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP]
20-Terminal Ceramic Leadless Chip Carrier [LCC]
20-Terminal Ceramic Leadless Chip Carrier [LCC]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
10-Pin Metal Header Package [TO-100]
Chip
Chip
Z = RoHS Compliant Part.
Rev. C | Page 18 of 20
Package Option
D-14
D-14
D-14
D-14
D-14
D-14
H-10
H-10
H-10
H-10
H-10
H-10
D-14
D-14
D-14
D-14
E-20-1
E-20-1
H-10
H-10
H-10
H-10
AD534
NOTES
Rev. C | Page 19 of 20
AD534
NOTES
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