Micropower, Low Noise Precision Voltage References with Shutdown ADR391/ADR392/ADR395 Compact 5-lead TSOT package Low temperature coefficient B grade: 9 ppm/°C A grade: 25 ppm/°C Initial accuracy B grade: ±4 mV maximum (ADR391) A grade: ±6 mV maximum Ultralow output noise: 5 μV p-p (0.1 Hz to 10 Hz) Low dropout: 300 mV Low supply current 3 μA maximum in shutdown 140 μA maximum in operation No external capacitor required Output current: 5 mA Automotive grade available Wide temperature range: −40°C to +125°C PIN CONFIGURATION SHDN 1 VIN 2 ADR391/ ADR392/ ADR395 5 GND VOUT (SENSE) 3 (Not to Scale) 4 VOUT (FORCE) 00419-001 FEATURES Figure 1. 5-Lead TSOT (UJ Suffix) Table 1. Model ADR391B ADR391A ADR392B ADR392A ADR395B ADR395A Output Voltage (VO) 2.5 2.5 4.096 4.096 5.0 5.0 Temperature Coefficient (ppm/°C) 9 25 9 25 9 25 Accuracy (mV) ±4 ±6 ±5 ±6 ±5 ±6 APPLICATIONS Battery-powered instrumentation Portable medical instrumentation Data acquisition systems Industrial process controls Automotive GENERAL DESCRIPTION The ADR391/ADR392/ADR395 are precision 2.048 V, 2.5 V, 4.096 V, and 5 V band gap voltage references, respectively, featuring low power and high precision in a tiny footprint. Using patented temperature drift curvature correction techniques from Analog Devices, Inc., the ADR39x references achieve a low 9 ppm/°C of temperature drift in the TSOT package. The ADR39x family of micropower, low dropout voltage references provides a stable output voltage from a minimum supply of 300 mV above the output. Their advanced design eliminates the need for external capacitors, which further reduces board space and system cost. The combination of low power operation, small size, and ease of use makes the ADR39x precision voltage references ideally suited for battery-operated applications. Rev. H Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved. ADR391/ADR392/ADR395 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................7 Pin Configuration ............................................................................. 1 Terminology .................................................................................... 13 General Description ......................................................................... 1 Theory of Operation ...................................................................... 14 Revision History ............................................................................... 2 Device Power Dissipation Considerations .............................. 14 Specifications..................................................................................... 3 Shutdown Mode Operation ...................................................... 14 ADR391 Electrical Characteristics............................................. 3 Applications Information .............................................................. 15 ADR392 Electrical Characteristics............................................. 4 Basic Voltage Reference Connection ....................................... 15 ADR395 Electrical Characteristics............................................. 5 Capacitors .................................................................................... 17 Absolute Maximum Ratings............................................................ 6 Outline Dimensions ....................................................................... 18 Thermal Resistance ...................................................................... 6 Ordering Guide .......................................................................... 18 REVISION HISTORY 10/09—Rev. G to Rev. H Deleted ADR390 ................................................................. Universal Changes to Ordering Guide Section ............................................ 18 2/08—Rev. F to Rev. G Changes to Ripple Rejection Ration Parameter (Table 2) ........... 3 Changes to Ripple Rejection Ration Parameter (Table 3) ........... 4 Changes to Ripple Rejection Ration Parameter (Table 4) ........... 5 Changes to Ripple Rejection Ration Parameter (Table 5) ........... 6 Changes to Figure 7 .......................................................................... 9 Changes to Outline Dimensions................................................... 19 Changes to Ordering Guide .......................................................... 19 5/05—Rev. E to Rev. F Changes to Table 5 ............................................................................ 7 Changes to Figure 2 .......................................................................... 9 4/04—Rev. D to Rev. E Changes to ADR390—Specifications ............................................. 3 Changes to ADR391—Specifications ............................................. 4 Changes to ADR392—Specifications ............................................. 5 Changes to ADR395—Specifications ............................................. 6 4/04—Rev. C to Rev. D Updated Format .................................................................. Universal Changes to Title ................................................................................ 1 Changes to Features.......................................................................... 1 Changes to Applications .................................................................. 1 Changes to General Description .................................................... 1 Changes to Table 1 ............................................................................ 1 Changes to ADR390—Specifications ............................................. 3 Changes to ADR391—Specifications ............................................. 4 Changes to ADR392—Specifications .............................................5 Changes to ADR395—Specifications .............................................6 Changes to Absolute Maximum Ratings ........................................7 Changes to Thermal Resistance.......................................................7 Moved ESD Caution..........................................................................7 Changes to Figure 3, Figure 4, Figure 7, and Figure 8 ..................9 Changes to Figure 11, Figure 12, Figure 13, and Figure 14....... 10 Changes to Figure 15, Figure 16, Figure 19, and Figure 20....... 11 Changes to Figure 23 and Figure 24............................................. 12 Changes to Figure 27...................................................................... 13 Changes to Ordering Guide .......................................................... 19 Updated Outline Dimensions ....................................................... 19 10/02—Rev. B to Rev. C Add parts ADR392 and ADR395 ..................................... Universal Changes to Features ..........................................................................1 Changes to General Description .....................................................1 Additions to Table I ...........................................................................1 Changes to Specifications .................................................................2 Changes to Ordering Guide .............................................................4 Changes to Absolute Maximum Ratings ........................................4 New TPCs 3, 4, 7, 8, 11, 12, 15, 16, 19, and 20 ..............................6 New Figures 4 and 5 ....................................................................... 13 Deleted A Negative Precision Reference without Precision Resistors Section ............................................. 13 Edits to General-Purpose Current Source Section .................... 13 Updated Outline Dimensions ....................................................... 15 5/02—Rev. A to Rev. B Edits to Layout .................................................................... Universal Changes to Figure 6 ........................................................................ 13 Rev. H | Page 2 of 20 ADR391/ADR392/ADR395 SPECIFICATIONS ADR391 ELECTRICAL CHARACTERISTICS VIN = 2.8 V to 15 V, TA = 25°C, unless otherwise noted. Table 2. Parameter OUTPUT VOLTAGE Symbol VO INITIAL ACCURACY VOERR TEMPERATURE COEFFICIENT TCVO SUPPLY VOLTAGE HEADROOM LINE REGULATION LOAD REGULATION VIN − VO ΔVO/ΔVIN ΔVO/ΔILOAD QUIESCENT CURRENT IIN VOLTAGE NOISE TURN-ON SETTLING TIME LONG-TERM STABILITY 1 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND en p-p tR ΔVO ΔVO_HYS RRR ISC SHUTDOWN PIN Shutdown Supply Current Shutdown Logic Input Current Shutdown Logic Low Shutdown Logic High ISHDN ILOGIC VINL VINH 1 Conditions A grade B grade A grade A grade B grade B grade A grade, −40°C < TA < +125°C B grade, −40°C < TA < +125°C Min 2.494 2.496 Typ 2.5 2.5 Max 2.506 2.504 6 0.24 4 0.16 25 9 10 25 60 140 120 140 300 VIN = 2.8 V to 15 V, −40°C < TA < +125°C ILOAD = 0 mA to 5 mA, −40°C < TA < +85°C, VIN = 3 V ILOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 3 V No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 5 20 50 100 −80 25 30 1000 hours fIN = 60 Hz VIN = 5 V VIN = 15 V 3 500 0.8 2.4 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. H | Page 3 of 20 Unit V V mV % mV % ppm/°C ppm/°C mV ppm/V ppm/mA ppm/mA μA μA μV p-p μs ppm ppm dB mA mA μA nA V V ADR391/ADR392/ADR395 ADR392 ELECTRICAL CHARACTERISTICS VIN = 4.3 V to 15 V, TA = 25°C, unless otherwise noted. Table 3. Parameter OUTPUT VOLTAGE Symbol VO INITIAL ACCURACY VOERR TEMPERATURE COEFFICIENT TCVO SUPPLY VOLTAGE HEADROOM LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VIN − VO ΔVO/ΔVIN ΔVO/ΔILOAD IIN VOLTAGE NOISE TURN-ON SETTLING TIME LONG-TERM STABILITY 1 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND en p-p tR ΔVO ΔVO_HYS RRR ISC SHUTDOWN PIN Shutdown Supply Current Shutdown Logic Input Current Shutdown Logic Low Shutdown Logic High ISHDN ILOGIC VINL VINH 1 Conditions A grade B grade A grade A grade B grade B grade A grade, −40°C < TA < +125°C B grade, −40°C < TA < +125°C Min 4.090 4.091 Typ 4.096 4.096 Max 4.102 4.101 6 0.15 5 0.12 25 9 10 25 140 120 140 300 VIN = 4.3 V to 15 V, −40°C < TA < +125°C ILOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 5 V No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 7 20 50 100 −80 25 30 1000 hours fIN = 60 Hz VIN = 5 V VIN = 15 V 3 500 0.8 2.4 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. H | Page 4 of 20 Unit V V mV % mV % ppm/°C ppm/°C mV ppm/V ppm/mA μA μA μV p-p μs ppm ppm dB mA mA μA nA V V ADR391/ADR392/ADR395 ADR395 ELECTRICAL CHARACTERISTICS VIN = 5.3 V to 15 V, TA = 25°C, unless otherwise noted. Table 4. Parameter OUTPUT VOLTAGE Symbol VO INITIAL ACCURACY VOERR TEMPERATURE COEFFICIENT TCVO SUPPLY VOLTAGE HEADROOM LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VIN − VO ΔVO/ΔVIN ΔVO/ΔILOAD IIN VOLTAGE NOISE TURN-ON SETTLING TIME LONG-TERM STABILITY 1 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND en p-p tR ΔVO ΔVO_HYS RRR ISC SHUTDOWN PIN Shutdown Supply Current Shutdown Logic Input Current Shutdown Logic Low Shutdown Logic High ISHDN ILOGIC VINL VINH 1 Conditions A grade B grade A grade A grade B grade B grade A grade, −40°C < TA < +125°C B grade, −40°C < TA < +125°C Min 4.994 4.995 Typ 5.000 5.000 Max 5.006 5.005 6 0.12 5 0.10 25 9 10 25 140 120 140 300 VIN = 4.3 V to 15 V, −40°C < TA < +125°C ILOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 6 V No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 8 20 50 100 −80 25 30 1000 hours fIN = 60 Hz VIN = 5 V VIN = 15 V 3 500 0.8 2.4 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. H | Page 5 of 20 Unit V V mV % mV % ppm/°C ppm/°C mV ppm/V ppm/mA μA μA μV p-p μs ppm ppm dB mA mA μA nA V V ADR391/ADR392/ADR395 ABSOLUTE MAXIMUM RATINGS At 25°C, unless otherwise noted. THERMAL RESISTANCE Table 5. θJA is specified for the worst-case conditions, that is, for a device soldered in a circuit board for surface-mount packages. Parameter Supply Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 18 V See derating curves −65°C to +125°C −40°C to +125°C −65°C to +125°C 300°C Table 6. Package Type TSOT (UJ-5) ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. H | Page 6 of 20 θJA 230 θJC 146 Unit °C/W ADR391/ADR392/ADR395 TYPICAL PERFORMANCE CHARACTERISTICS 2.506 140 SAMPLE 2 2.504 120 SUPPLY CURRENT (µA) SAMPLE 1 SAMPLE 3 2.500 2.498 +85°C +25°C 80 –40°C 60 –5 30 65 TEMPERATURE (°C) 100 125 00419-004 2.496 2.494 –40 +125°C 100 40 2.5 Figure 2. ADR391 Output Voltage (VOUT) vs. Temperature 00419-008 VOUT (V) 2.502 5.0 7.5 10.0 INPUT VOLTAGE (V) 12.5 15.0 Figure 5. ADR391 Supply Current vs. Input Voltage 4.100 140 4.098 +125 °C 120 4.094 SAMPLE 2 SAMPLE 1 4.092 100 +25°C –40°C 80 60 4.088 –40 0 40 TEMPERATURE (°C) 80 125 00419-005 4.090 00419-009 VOUT (V) 4.096 SUPPLY CURRENT (µA) SAMPLE 3 40 5 Figure 3. ADR392 Output Voltage (VOUT) vs. Temperature 7 9 11 INPUT VOLTAGE (V) 13 15 Figure 6. ADR392 Supply Current vs. Input Voltage 5.006 140 5.004 +125°C SAMPLE 3 SUPPLY CURRENT (µA) 120 SAMPLE 2 5.000 SAMPLE 1 4.998 4.996 –40°C 80 –5 30 65 TEMPERATURE (°C) 100 125 Figure 4. ADR395 Output Voltage (VOUT) vs. Temperature 40 5.5 00419-010 4.994 –40 +25°C 100 60 00419-006 VOUT (V) 5.002 7.0 8.5 11.5 10.0 INPUT VOLTAGE (V) 13.0 Figure 7. ADR395 Supply Current vs. Input Voltage Rev. H | Page 7 of 20 14.5 ADR391/ADR392/ADR395 25 180 20 LINE REGULATION (ppm/V) 160 VIN = 5V VIN = 3V 140 120 15 10 100 80 –40 –10 20 50 TEMPERATURE (°C) 80 110 125 0 –40 00419-016 5 00419-012 LOAD REGULATION (ppm/mA) IL = 0mA TO 5mA –10 20 50 TEMPERATURE (°C) 80 110 125 Figure 11. ADR391 Line Regulation vs. Temperature Figure 8. ADR391 Load Regulation vs. Temperature 14 90 IL = 0mA TO 5mA LINE REGULATION (ppm/V) LOAD REGULATION (ppm/mA) 12 80 70 VIN = 7.5V 60 VIN = 5V 10 8 VIN = 4.4V TO 15V 6 4 50 –5 100 30 65 TEMPERATURE (°C) 0 –40 00419-013 40 –40 125 –5 30 65 TEMPERATURE (°C) 100 125 00419-017 2 Figure 12. ADR392 Line Regulation vs. Temperature Figure 9. ADR392 Load Regulation vs. Temperature 14 80 IL = 0mA TO 5mA LINE REGULATION (ppm/V) VIN = 7.5V VIN = 5V 60 50 10 VIN = 5.3V TO 15V 8 6 4 40 30 –40 –5 30 65 TEMPERATURE (°C) 100 125 0 –40 –5 30 65 TEMPERATURE (°C) 100 Figure 13. ADR395 Line Regulation vs. Temperature Figure 10. ADR395 Load Regulation vs. Temperature Rev. H | Page 8 of 20 125 00419-018 2 00419-014 LOAD REGULATION (ppm/mA) 12 70 ADR391/ADR392/ADR395 70 3.6 +125°C 60 +85°C 50 TEMPERATURE: +25°C –40°C +125°C +25°C 3.2 FREQUENCY VIN MIN (V) 3.4 +25°C 3.0 –40°C 40 30 20 2.8 0 1 2 3 LOAD CURRENT (mA) 4 5 0 –0.56 00419-020 2.6 Figure 14. ADR391 Minimum Input Voltage (VIN) vs. Load Current 00419-024 10 –0.41 –0.26 –0.11 0.04 VOUT DEVIATION (mV) 0.19 0.34 Figure 17. ADR391 VOUT Hysteresis Distribution 4.8 VOLTAGE NOISE DENSITY (nV/√Hz) VIN MIN (V) +25°C 4.4 –40°C 4.2 3.8 0 1 2 3 LOAD CURRENT (mA) 4 5 00419-021 4.0 VIN = 5V 600 500 400 ADR391 300 200 100 10 Figure 15. ADR392 Minimum Input Voltage (VIN) vs. Load Current 100 1k FREQUENCY (Hz) 10k Figure 18. Voltage Noise Density vs. Frequency 0 6.0 0 5.8 0 VOLTAGE (2µV/DIV) –40 °C 5.2 0 0 0 5.0 0 4.8 0 0 4.6 0 1 2 3 LOAD CURRENT (mA) 4 5 00419-022 VIN MIN (V) +25°C 5.4 Figure 16. ADR395 Minimum Input Voltage (VIN) vs. Load Current TIME (1s/DIV) Figure 19. ADR391 Typical Voltage Noise 0.1 Hz to 10 Hz Rev. H | Page 9 of 20 00419-026 +125 °C 5.6 00419-025 +125°C 4.6 1k 900 800 700 ADR391/ADR392/ADR395 CL = 0nF VLOAD ON LOAD OFF 00419-027 00419-030 VOLTAGE (1V/DIV) VOLTAGE (100µV/DIV) VOUT TIME (10µs/DIV) TIME (200µs/DIV) Figure 20. ADR391 Voltage Noise 10 Hz to 10 kHz Figure 23. ADR391 Load Transient Response CBYPASS = 0µF CL = 1nF VOUT LINE INTERRUPTION VOLTAGE VOLTAGE (1V/DIV) 0.5V/DIV VOUT VLOAD ON 00419-028 00419-031 1V/DIV LOAD OFF TIME (10µs/DIV) TIME (200µs/DIV) Figure 21. ADR391 Line Transient Response Figure 24. ADR391 Load Transient Response CBYPASS = 0.1µF CL = 100nF VOUT 0.5V/DIV VOLTAGE VOLTAGE (1V/DIV) LINE INTERRUPTION VOUT VLOAD ON 00419-032 00419-029 1V/DIV LOAD OFF TIME (10µs/DIV) TIME (200µs/DIV) Figure 25. ADR391 Load Transient Response Figure 22. ADR391 Line Transient Response Rev. H | Page 10 of 20 ADR391/ADR392/ADR395 VIN = 15V RL = 500Ω 5V/DIV 2V/DIV VOLTAGE VIN 2V/DIV VOUT 5V/DIV VIN 00419-033 00419-036 VOLTAGE VOUT TIME (200µs/DIV) TIME (20µs/DIV) Figure 26. ADR391 Turn-On Response Time at 15 V Figure 29. ADR391 Turn-On/Turn-Off Response at 5 V with Resistor Load RL = 500Ω CL = 100nF VIN = 15V VIN 5V/DIV 2V/DIV VOLTAGE VOLTAGE VOUT VOUT 2V/DIV 5V/DIV 00419-034 00419-037 VIN TIME (200µs/DIV) TIME (40µs/DIV) Figure 27. ADR391 Turn-Off Response at 15 V Figure 30. ADR391 Turn-On/Turn-Off Response at 5 V CBYPASS = 0.1µF 2V/DIV VOLTAGE VOUT 5V/DIV 00419-035 VIN TIME (200µs/DIV) Figure 28. ADR391 Turn-On/Turn-Off Response at 5 V with Capacitance Rev. H | Page 11 of 20 100 60 90 40 80 20 0 –20 –40 –60 60 CL = 0µF 50 40 30 20 –80 –100 –120 10 70 CL = 1µF 100 1k 10k FREQUENCY (Hz) 100k CL = 0.1µF 10 0 10 1M 100 1k 10k FREQUENCY (Hz) 100k Figure 32. Output Impedance vs. Frequency Figure 31. Ripple Rejection vs. Frequency Rev. H | Page 12 of 20 1M 00419-039 OUTPUT IMPEDANCE (Ω) 80 00419-038 RIPPLE REJECTION (dB) ADR391/ADR392/ADR395 ADR391/ADR392/ADR395 TERMINOLOGY Temperature Coefficient The change of output voltage with respect to operating temperature changes normalized by the output voltage at 25°C. This parameter is expressed in ppm/°C and can be determined by TCVO [ppm/°C ] = VO (T2 ) – VO (T1 ) VO (25°C ) × (T2 – T1 ) × 10 6 Long-Term Stability Typical shift of output voltage at 25°C on a sample of parts subjected to a test of 1000 hours at 25°C. ΔVO = VO(t0) − VO(t1) ⎞ ⎛ V (t ) − VO (t1 ) ΔVO [ppm] = ⎜⎜ O 0 × 106 ⎟⎟ VO (t 0 ) ⎠ ⎝ (1) where: VO (25°C) is VO at 25°C. VO (T1) is VO at Temperature 1. VO (T2) is VO at Temperature 2. (2) where: VO (t0) is VO at 25°C at Time 0. VO (t1) is VO at 25°C after 1000 hours operation at 25°C. Line Regulation The change in output voltage due to a specified change in input voltage. This parameter accounts for the effects of self-heating. Line regulation is expressed in either percent per volt, parts-permillion per volt, or microvolts per volt change in input voltage. Load Regulation The change in output voltage due to a specified change in load current. This parameter accounts for the effects of self-heating. Load regulation is expressed in either microvolts per milliampere, parts-per-million per milliampere, or ohms of dc output resistance. Thermally Induced Output Voltage Hysteresis The change of output voltage after the device cycles through the temperatures from +25°C to –40°C to +125°C and back to +25°C. This is a typical value from a sample of parts put through such a cycle. VO_HYS = VO(25°C) − VO_TC VO _ HYS [ppm] = VO (25 C ) − VO _ TC o VO (25 o C ) (3) × 10 6 where: VO (25°C) is VO at 25°C. VO_TC is VO at 25°C after a temperature cycle from +25°C to −40°C to +125°C and back to +25°C. Rev. H | Page 13 of 20 (4) ADR391/ADR392/ADR395 THEORY OF OPERATION Band gap references are the high performance solution for low supply voltage and low power voltage reference applications, and the ADR391/ADR392/ADR395 are no exception. The uniqueness of these devices lies in the architecture. As shown in Figure 33, the ideal zero TC band gap voltage is referenced to the output, not to ground. Therefore, if noise exists on the ground line, it is greatly attenuated on VOUT. The band gap cell consists of the PNP pair, Q51 and Q52, running at unequal current densities. The difference in VBE results in a voltage with a positive TC, which is amplified by a ratio of 2× DEVICE POWER DISSIPATION CONSIDERATIONS The ADR391/ADR392/ADR395 are capable of delivering load currents to 5 mA, with an input voltage that ranges from 2.8 V (ADR391 only) to 15 V. When these devices are used in applications with large input voltages, care should be taken to avoid exceeding the specified maximum power dissipation or junction temperature because it could result in premature device failure. The following formula should be used to calculate the maximum junction temperature or dissipation of the device: R58 R54 PD = This PTAT voltage, combined with VBEs of Q51 and Q52, produces a stable band gap voltage. Reduction in the band gap curvature is performed by the ratio of Resistors R44 and R59, one of which is linearly temperature dependent. Precision laser trimming and other patented circuit techniques are used to further enhance the drift performance. Q1 VOUT (FORCE) VOUT (SENSE) R44 R58 R49 Q51 SHUTDOWN MODE OPERATION R53 R48 R61 GND 00419-040 Q52 R60 (5) where: TJ and TA are, respectively, the junction and ambient temperatures. PD is the device power dissipation. θJA is the device package thermal resistance. R54 SHDN θ JA The ADR391/ADR392/ADR395 include a shutdown feature that is TTL/CMOS level compatible. A logic low or a zero volt condition on the SHDN pin is required to turn the devices off. During shutdown, the output of the reference becomes a high impedance state, where its potential would then be determined by external circuitry. If the shutdown feature is not used, the SHDN pin should be connected to VIN (Pin 2). VIN R59 TJ – TA Figure 33. Simplified Schematic Rev. H | Page 14 of 20 ADR391/ADR392/ADR395 APPLICATIONS INFORMATION BASIC VOLTAGE REFERENCE CONNECTION The circuit shown in Figure 34 illustrates the basic configuration for the ADR39x family. Decoupling capacitors are not required for circuit stability. The ADR39x family is capable of driving capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic output capacitor is recommended to absorb and deliver the charge, as required by a dynamic load. SHUTDOWN GND SHDN ADR39x CB * VIN VOUT (FORCE) VOUT (SENSE) 0.1µF OUTPUT * CB *NOT REQUIRED 00419-041 INPUT 0.1µF Figure 34. Basic Configuration for the ADR39x Family Stacking Reference ICs for Arbitrary Outputs Some applications may require two reference voltage sources, which are a combined sum of standard outputs. Figure 35 shows how this stacked output reference can be implemented. ADR391/ADR391 ADR392/ADR392 ADR395/ADR395 VOUT1 (V) VOUT2 (V) 2.5 4.096 5 A negative reference can be easily generated by adding an A1 op amp and is configured as shown in Figure 36. VOUT (FORCE) and VOUT (SENSE) are at virtual ground and, therefore, the negative reference can be taken directly from the output of the op amp. The op amp must be dual-supply, low offset, and rail-to-rail if the negative supply voltage is close to the reference output. 5.0 8.192 10 VIN U2 VIN C2 0.1µF While this concept is simple, a precaution is required. Because the lower reference circuit must sink a small bias current from U2 plus the base current from the series PNP output transistor in U2, either the external load of U1 or an external resistor must provide a path for this current. If the U1 minimum load is not well defined, the external resistor should be used and set to a value that conservatively passes 600 μA of current with the applicable VOUT1 across it. Note that the two U1 and U2 reference circuits are treated locally as macrocells; each has its own bypasses at input and output for best stability. Both U1 and U2 in this circuit can source dc currents up to their full rating. The minimum input voltage, VIN, is determined by the sum of the outputs, VOUT2, plus the dropout voltage of U2. A Negative Precision Reference without Precision Resistors OUTPUT TABLE U1/U2 Two reference ICs are used, fed from an unregulated input, VIN. The outputs of the individual ICs are connected in series, which provide two output voltages, VOUT1 and VOUT2. VOUT1 is the terminal voltage of U1, while VOUT2 is the sum of this voltage and the terminal voltage of U2. U1 and U2 are chosen for the two voltages that supply the required outputs (see the Output Table in Figure 35). For example, if both U1 and U2 are ADR391s, VOUT1 is 2.5 V and VOUT2 is 5.0 V. SHDN VOUT (FORCE) +VDD VOUT2 VOUT (SENSE) GND VIN VOUT (FORCE) SHDN VOUT (SENSE) U1 GND VOUT1 VOUT (SENSE) –VREF A1 00419-042 GND –VDD Figure 35. Stacking Voltage References with the ADR391/ADR392/ADR395 Rev. H | Page 15 of 20 Figure 36. Negative Reference 00419-043 C2 0.1µF VIN SHDN VOUT (FORCE) ADR391/ADR392/ADR395 General-Purpose Current Source High Power Performance with Current Limit Many times in low power applications, the need arises for a precision current source that can operate on low supply voltages. The ADR391/ADR392/ADR395 can be configured as a precision current source. As shown in Figure 37, the circuit configuration is a floating current source with a grounded load. The reference output voltage is bootstrapped across RSET, which sets the output current into the load. With this configuration, circuit precision is maintained for load currents in the range from the reference supply current, typically 90 μA to approximately 5 mA. In some cases, the user may want higher output current delivered to a load and still achieve better than 0.5% accuracy out of the ADR39x. The accuracy for a reference is normally specified on the data sheet with no load. However, the output voltage changes with load current. VIN The circuit shown in Figure 38 provides high current without compromising the accuracy of the ADR39x. The series pass transistor, Q1, provides up to 1 A load current. The ADR39x delivers only the base drive to Q1 through the force pin. The sense pin of the ADR39x is a regulated output and is connected to the load. The Transistor Q2 protects Q1 during short-circuit limit faults by robbing its base drive. The maximum current is SHDN VOUT (SENSE) ADR39x ILMAX ≈ 0.6 V/RS VIN ISET GND R1 R1 VIN R1 4.7kΩ RSET ISY ADJUST SHDN GND VIN P1 Q1 Q2N4921 VOUT (FORCE) IOUT = ISET + ISY (ISET ) VOUT (SENSE) 00419-044 RL U1 Q2 Q2N2222 RS ADR39x Figure 37. A General-Purpose Current Source RL IL 00419-045 0.1µF Figure 38. ADR39x for High Power Performance with Current Limit A similar circuit function can also be achieved with the Darlington transistor configuration, as shown in Figure 39. VIN R1 4.7kΩ U1 SHDN GND VIN Q1 Q2N2222 VOUT (FORCE) VOUT (SENSE) ADR39x Q2 Q2N4921 RS RL Figure 39. ADR39x for High Output Current with Darlington Drive Configuration Rev. H | Page 16 of 20 00419-D-046 VOUT (FORCE) ISY (ISET) (6) ADR391/ADR392/ADR395 150 CAPACITORS Input Capacitor Output Capacitor 100 50 DRIFT (ppm) Input capacitors are not required on the ADR39x. There is no limit for the value of the capacitor used on the input, but a 1 μF to 10 μF capacitor on the input improves transient response in applications where the supply suddenly changes. An additional 0.1 μF in parallel also helps reduce noise from the supply. 0 –50 Rev. H | Page 17 of 20 –100 –150 00419-002 The ADR39x does not require output capacitors for stability under any load condition. An output capacitor, typically 0.1 μF, filters out any low level noise voltage and does not affect the operation of the part. On the other hand, the load transient response can improve with the addition of a 1 μF to 10 μF output capacitor in parallel. A capacitor here acts as a source of stored energy for a sudden increase in load current. The only parameter that degrades by adding an output capacitor is the turn-on time, and it depends on the size of the capacitor chosen. 0 100 200 300 400 500 600 TIME (Hours) 700 800 900 1000 Figure 40. ADR391 Typical Long-Term Drift over 1000 Hours ADR391/ADR392/ADR395 OUTLINE DIMENSIONS 2.90 BSC 5 4 2.80 BSC 1.60 BSC 1 2 3 PIN 1 0.95 BSC 1.90 BSC *0.90 0.87 0.84 *1.00 MAX 0.10 MAX 0.50 0.30 0.20 0.08 SEATING PLANE 8° 4° 0° 0.60 0.45 0.30 *COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. Figure 41. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions shown in millimeters ORDERING GUIDE Model ADR391AUJZ-REEL7 1 ADR391AUJZ-R21 ADR391BUJZ-REEL71 ADR391BUJZ-R21 ADR392AUJZ-REEL71 ADR392AUJZ-R21 ADR392BUJZ-REEL71 ADR392BUJZ-R21 ADR392WBUJZ-R71, 2 ADR395AUJZ-REEL71 ADR395AUJZ-R21 ADR395BUJZ-REEL71 ADR395BUJZ-R21 1 2 Output Voltage (VO) 2.5 2.5 2.5 2.5 4.096 4.096 4.096 4.096 4.096 5.0 5.0 5.0 5.0 Initial Accuracy (mV) (%) ±6 0.24 ±6 0.24 ±4 0.16 ±4 0.16 ±6 0.15 ±6 0.15 ±5 0.12 ±5 0.12 ±5 0.12 ±6 0.12 ±6 0.12 ±5 0.10 ±5 0.10 Temperature Coefficient (ppm/°C) 25 25 9 9 25 25 9 9 9 25 25 9 9 Package Description 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT Z = RoHS Compliant Part. Automotive grade. Rev. H | Page 18 of 20 Package Option UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 UJ-5 Branding R1A R1A R1B R1B RCA RCA RCB RCB RCB RDA RDA RDB RDB Ordering Quantity 3,000 250 3,000 250 3,000 250 3,000 250 3,000 3,000 250 3,000 250 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C ADR391/ADR392/ADR395 NOTES Rev. H | Page 19 of 20 ADR391/ADR392/ADR395 NOTES ©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00419-0-10/09(H) Rev. H | Page 20 of 20