±1°C Accurate, 12-Bit Digital Temperature Sensor ADT75 FEATURES PRODUCT HIGHLIGHTS 12-bit temperature-to-digital converter B grade accuracy ±1.0°C from 0°C to 70°C A grade accuracy ±2.0°C from –25°C to +100°C SMBus/I2C-compatible interface Operation from −55°C to +125°C Operation from 3 V to 5.5 V Overtemperature indicator Shutdown mode for low power consumption Power consumption 79 μW typically at 3.3 V Small, low cost 8-pin MSOP in Pb-Sn and Pb-free packages Standard 8-pin SOIC Pb-free package 1. On-chip temperature sensor allows an accurate measurement of the ambient temperature. The measurable temperature range is −55°C to +125°C. 2. Supply voltage is 3.0 V to 5.5 V. 3. Space-saving, 8-lead MSOP and 8-lead SOIC. 4. Temperature accuracy is ±1°C maximum. 5. Temperature resolution is 0.0625°C. 6. Shutdown mode reduces the current consumption to 3 μA typical. 7. Connect up to eight ADT75s to a single SMBus/I2C bus. APPLICATIONS Isolated sensors Environmental control systems Computer thermal monitoring Thermal protection Industrial process control Power-system monitors Hand-held applications FUNCTIONAL BLOCK DIAGRAM VDD 8 DIGITAL COMPARATOR 12-BIT 3 OS/ALERT 1 SDA 2 SCL DECIMATOR LPF TEMPERATURE SENSOR 1-BIT TEMPERATURE SENSOR REGISTER + – REFERENCE CONFIGURATION REGISTER Σ-Δ 1-BIT DAC CLK AND TIMING GENERATION THYST SETPOINT REGISTER TOS SETPOINT REGISTER POINTER REGISTER A0 7 SMBus/I2C INTERFACE A2 5 8 GND 05326-001 A1 6 Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADT75 TABLE OF CONTENTS Features .............................................................................................. 1 Temperature Data Format......................................................... 11 Applications....................................................................................... 1 One-Shot Mode .......................................................................... 12 Product Highlights ........................................................................... 1 Fault Queue ................................................................................. 12 Functional Block Diagram .............................................................. 1 Registers....................................................................................... 13 General Description ......................................................................... 3 Serial Interface ............................................................................ 16 Specifications..................................................................................... 4 Writing data ................................................................................ 17 A Grade.......................................................................................... 4 Reading Data............................................................................... 18 B Grade .......................................................................................... 5 OS/ALERT Output Overtemperature Modes ........................ 19 Timing Specifications and Diagram .......................................... 6 SMBus Alert ................................................................................ 20 Absolute Maximum Ratings............................................................ 7 Application Information................................................................ 21 ESD Caution.................................................................................. 7 Thermal Response Time ........................................................... 21 Pin Configuration and Function Descriptions............................. 8 Self-Heating Effects.................................................................... 21 Typical Performance Characteristics ............................................. 9 Supply Decoupling ..................................................................... 21 Theory of Operation ...................................................................... 10 Temperature Monitoring........................................................... 22 Circuit Information.................................................................... 10 Outline Dimensions ....................................................................... 23 Converter Details........................................................................ 10 Ordering Guide .......................................................................... 23 Functional Description.............................................................. 10 REVISION HISTORY 10/05—Revision O: Initial Version Rev. 0 | Page 2 of 24 ADT75 GENERAL DESCRIPTION The ADT75 is a complete temperature monitoring system in 8-lead MSOP and SOIC packages. It contains a bandgap temperature sensor and 12-bit ADC to monitor and digitize the temperature to a resolution of 0.0625°C. The ADT75 is pin and register compatible with the LM75 and AD7416. The ADT75 is guaranteed to operate at supply voltages from 3 V to 5.5 V. Operating at 3.3 V, the average supply current is typically 200 μA. The ADT75 offers a shutdown mode that powers down the device and gives a shutdown current of typically 3 μA. The ADT75 is rated for operation over the –55°C to +125°C temperature range. Pin A0, Pin A1, and Pin A2 are available for address selection. The OS/ALERT pin is an open-drain output that becomes active when temperature exceeds a programmable limit. The OS/ALERT pin can operate in either comparator or interrupt mode. Rev. 0 | Page 3 of 24 ADT75 SPECIFICATIONS A GRADE TA = TMIN to TMAX, VDD = 3.0 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted. Table 1. Parameter TEMPERATURE SENSOR AND ADC Accuracy at VDD = 3.0 V to 5.5 V Accuracy at VDD = 3.0 V to 3.6 V Accuracy at VDD = 4.5 V to 5.5 V ADC Resolution Temperature Resolution Temperature Conversion Time Update Rate Long Term Drift Temperature Hysteresis OS/ALERT OUTPUT (OPEN DRAIN) Output Low Voltage, VOL Pin Capacitance High Output Leakage Current, IOH RON Resistance (Low Output) DIGITAL INPUTS Input Current Input Low Voltage, VIL Input High Voltage, VIH SCL, SDA Glitch Rejection Min Typ Max Unit Test Conditions/Comments ±2 ±3 ±3 °C °C °C °C Bits °C ms ms °C °C TA = −25°C to +100°C TA = −55°C to +100°C TA = +100°C to +125°C TA = +100°C to +125°C V pF μA Ω IOL = 3 mA ±2 12 0.0625 60 100 0.08 +0.03 0.4 10 0.1 15 5 50 μA V V ns 10 pF 1 0.4 10 mA V V pF 350 5.5 500 V μA Supply Current at 5.0 V 380 525 μA Average Current at 3.3 V Average Current at 5.0 V Shutdown Mode at 3.3 V Shutdown Mode at 5.0 V Average Power Dissipation 1 SPS 200 225 3 5.5 798.6 78.6 8 12 μA μA μA μA μW μW Pin Capacitance DIGITAL OUTPUT (OPEN DRAIN) Output High Current, IOH Output Low Voltage, VOL Output High Voltage, VOH Output Capacitance, COUT POWER REQUIREMENTS Supply Voltage Supply Current at 3.3 V ±1 0.3 × VDD 0.7 × VDD 3 0.7 × VDD 3 3 140 μW Rev. 0 | Page 4 of 24 Conversion started every 100 ms Drift over 10 years, if part is operated at 55°C Temperature cycle = 25°C to 125°C to 25°C OS/ALERT pin pulled up to 5.5 V Supply and temperature dependent VIN = 0 V to VDD Input filtering suppresses noise spikes of less than 50 ns VOH = 5 V IOL = 3 mA Peak current while converting and I2C interface inactive Peak current while converting and I2C interface inactive Part converting and I2C interface inactive Part converting and I2C interface inactive Supply current in shutdown mode Supply current in shutdown mode VDD = 3.3 V, normal mode at 25°C Average power dissipated for VDD = 3.3 V, shutdown mode at 25°C Average power dissipated for VDD = 5.0 V, shutdown mode at 25°C ADT75 B GRADE TA = TMIN to TMAX, VDD = 3.0 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted. Table 2. Parameter TEMPERATURE SENSOR AND ADC Accuracy at VDD = 3.0 V to 5.5 V Accuracy at VDD = 3.0 V to 3.6 V Accuracy at VDD = 4.5 V to 5.5 V ADC Resolution Temperature Resolution Temperature Conversion Time Update Rate Long Term Drift Temperature Hysteresis OS/ALERT OUTPUT (OPEN DRAIN) Output Low Voltage, VOL Pin Capacitance High Output Leakage Current, IOH RON Resistance (Low Output) DIGITAL INPUTS Input Current Input Low Voltage, VIL Input High Voltage, VIH SCL, SDA Glitch Rejection Min Typ Max Unit Test Conditions/Comments ±1 ±2 ±3 ±3 °C °C °C °C °C bits °C ms ms °C °C TA = 0°C to +70°C TA = −25°C to +100°C TA = −55°C to +100°C TA = +100°C to +125°C TA = +100°C to +125°C V pF μA Ω IOL = 3 mA ±2 12 0.0625 60 100 0.08 +0.03 0.4 10 0.1 15 5 50 μA V V ns 10 pF 1 0.4 10 mA V V pF 350 5.5 500 V μA Supply Current at 5.0 V 380 525 μA Average Current at 3.3 V Average Current at 5.0 V Shutdown Mode at 3.3 V Shutdown Mode at 5.0 V Average Power Dissipation 1 SPS 200 225 3 5.5 798.6 78.6 8 12 μA μA μA μA μW μW Pin Capacitance DIGITAL OUTPUT (OPEN DRAIN) Output High Current, IOH Output Low Voltage, VOL Output High Voltage, VOH Output Capacitance, COUT POWER REQUIREMENTS Supply Voltage Supply Current at 3.3 V ±1 0.3 × VDD 0.7 × VDD 3 0.7 × VDD 3 3 140 μW Rev. 0 | Page 5 of 24 Conversion started every 100 ms Drift over 10 years, if part is operated at 55°C Temperature cycle = 25°C to 125°C to 25°C OS/ALERT pin pulled up to 5.5 V Supply and temperature dependent VIN = 0 V to VDD Input filtering suppresses noise spikes of less than 50 ns VOH = 5 V IOL = 3 mA Peak current while converting and I2C interface inactive Peak current while converting and I2C interface inactive Part converting and I2C interface inactive Part converting and I2C interface inactive Supply current in shutdown mode Supply current in shutdown mode VDD = 3.3 V, normal mode at 25°C Average power dissipated for VDD = 3.3 V, shutdown mode at 25°C Average power dissipated for VDD = 5.0 V, shutdown mode at 25°C ADT75 TIMING SPECIFICATIONS AND DIAGRAM Measure the SDA and SCL timing with the input filters turned on to meet the fast mode I2C specification. Switching off the input filters improves the transfer rate but has a negative affect on the EMC behavior of the part. TA = TMIN to TMAX, VDD = +2.7 V to +5.5 V, unless otherwise noted. Table 3. Parameter 1 Serial Clock Period, t1 Data In Setup Time to SCL High, t2 Data Out Stable After SCL Low, t3 Data Out Stable After SCL Low, t3 SDA Low Setup Time to SCL Low (Start Condition), t4 SDA High Hold Time After SCL High (Stop Condition), t5 SDA and SCL Rise Time, t6 SDA and SCL Rise Time, t6 SDA and SCL Fall Time, t7 Capacitive Load for each Bus Line, CB 2 TYP MAX Units μs ns ns μs ns ns ns ns ns pF 0.9 2 3.452 300 1000 300 400 Comments Fast mode I2C. See Figure 2 See Figure 2 Fast mode I2C. See Figure 2 Standard mode I2C. See Figure 2 See Figure 2 See Figure 2 Fast mode I2C. See Figure 2 Standard mode I2C. See Figure 2 See Figure 2 Guaranteed by design and characterization; not production tested. This time has to be met only if the master does not stretch the low period of the SCL signal. t1 SCL t4 t5 t2 SDA DATA IN t3 SDA DATA OUT t7 Figure 2. SMBus/I2C Timing Diagram Rev. 0 | Page 6 of 24 t6 05326-002 1 MIN 2.5 50 0 0 50 50 ADT75 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1.2 WMAX = (TJMAX − TA)/θJA 205.9°C/W 43.74°C/W WMAX = (TJMAX − TA)/θJA 157°C/W 56°C/W 1.0 0.8 0.6 0.4 0.2 MAX PD = 3.4mW AT 150°C 0 05326-003 Rating –0.3 V to +7 V –0.3 V to VDD + 0.3 V –0.3 V to VDD + 0.3 V –0.3 V to VDD + 0.3 V –0.3 V to VDD + 0.3 V –55°C to +150°C –65°C to +160°C 150.7°C –55 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Parameter VDD to GND SDA Input Voltage to GND SDA Output Voltage to GND SCL Input Voltage to GND OS/ALERT Output Voltage to GND Operating Temperature Range Storage Temperature Range Maximum Junction Temperature, TJMAX 8-Lead MSOP (RM-8) Power Dissipation 1, 2 Thermal Impedance 3 θJA, Junction-to-Ambient (Still Air) θJC, Junction-to-Case 8-Lead SOIC (R-8) Power Dissipation1, 2 Thermal Impedance3 θJA, Junction-to-Ambient (Still Air) θJC, Junction-to-Case IR Reflow Soldering Peak Temperature Time at Peak Temperature Ramp-Up Rate Ramp-Down Rate Time 25°C to Peak Temperature IR Reflow Soldering (Pb-Free Package) Peak Temperature Time at Peak Temperature Ramp-Up Rate Ramp-Down Rate Time 25°C to Peak Temperature MAXIMUM POWER DISSIPATION (Watts) Table 4. 220°C (0°C/5°C) 10 sec to 20 sec 3°C/sec maximum –6°C/sec maximum 6 minutes maximum TEMPERATURE (°C) Figure 3. MSOP Maximum Power Dissipation vs. Ambient Temperature 260°C (+0°C) 20 sec to 40 sec 3°C/sec maximum –6°C/sec maximum 8 minutes maximum 1 Values relate to package being used on a standard 2-layer PCB. This gives a worst case θJA and θJC. Refer to Figure 3 for a plot of maximum power dissipation vs. ambient temperature (TA). 2 TA = ambient temperature. 3 Junction-to-case resistance is applicable to components featuring a preferential flow direction, for example, components mounted on a heat sink. Junction-to-ambient resistance is more useful for air-cooled, PCBmounted components. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 7 of 24 ADT75 SDA 1 SCL 2 OS/ALERT 3 GND 4 ADT75 TOP VIEW (Not to Scale) 8 VDD 7 A0 6 A1 5 A2 05326-004 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1 Mnemonic SDA 2 SCL 3 OS/ALERT 4 5 6 7 8 GND A2 A1 A0 VDD Description SMBus/I2C Serial Data Input/Output. Serial data that is loaded into and read from the ADT75 registers is provided on this pin. Open-drain configuration; needs a pull-up resistor. Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock in and clock out data to and from any register of the ADT75. Open-drain configuration; needs a pull-up resistor. Over- and Undertemperature Indicator. Default power as an OS pin. Open-drain configuration; needs a pullup resistor. Analog and Digital Ground. SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or VDD. SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or VDD. SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or VDD. Positive Supply Voltage, 3 V to 5.5 V. The supply should be decoupled to ground. Rev. 0 | Page 8 of 24 ADT75 TYPICAL PERFORMANCE CHARACTERISTICS 7 1.0 TA = 30°C 0.8 0.6 0.4 SHUTDOWN CURRENT (μA) TEMPERATURE ERROR (°C) 6 VDD = 3.3V 0.2 0 –0.2 VDD = 5V –0.4 5 4 3 2 –0.6 –35 –15 5 25 45 65 85 105 05326-026 –1.0 –55 1 05326-023 –0.8 0 3.0 125 3.5 4.0 Figure 5. Temperature Accuracy at 3.3 V and 5 V 5.0 5.5 Figure 8. Shutdown Current vs. Supply Voltage at 30°C 0.05 TA = 25°C A 0.1μF CAPACITOR IS CONNECTED AT THE VDD PIN. CONVERTING @ 5.5V 450 0.04 CONVERTING @ 3.3V TEMPERATURE ERROR (°C) 400 350 300 250 200 AVERAGE @ 5.5V 150 AVERAGE @ 3.3V 0.03 VDD = 5V ± 10% 0.02 0.01 0 –0.01 –0.02 –0.03 05326-024 100 50 0 –55 –35 –15 5 25 45 65 85 105 VDD = 3.3V ± 10% 05326-027 500 SUPPLY CURRENT (μA) 4.5 SUPPLY VOLTAGE (V) TEMPERATURE (°C) –0.04 –0.05 0 125 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY RIPPLE FREQUENCY (MHz) TEMPERATURE (°C) Figure 9. Temperature Accuracy vs. Supply Ripple Frequency Figure 6. Operating Supply Current vs. Temperature 260 0.025 TA = 30°C 0.020 TEMPERATURE ERROR (°C) 220 200 180 160 140 0.015 0.010 MSOP PACKAGE 0.005 0 –0.005 SOIC PACKAGE –0.010 –0.015 100 3.0 05326-025 120 3.5 4.0 4.5 5.0 05326-028 AVERAGE SUPPLY CURRENT (μA) 240 –0.020 –0.025 0 5.5 SUPPLY VOLTAGE (V) 2 4 6 8 10 RECOVERY TIME AT 25°C (Hours) Figure 7. Average Operating Supply Current vs. Supply Voltage at 30°C Rev. 0 | Page 9 of 24 Figure 10. Response to Thermal Shock 12 14 ADT75 THEORY OF OPERATION CIRCUIT INFORMATION FUNCTIONAL DESCRIPTION The ADT75 is a 12-bit digital temperature sensor with the 12th bit acting as the sign bit. An on-board temperature sensor generates a voltage precisely proportional to absolute temperature that is compared to an internal voltage reference and input to a precision digital modulator. Overall accuracy for the ADT75 A Grade is ±2°C from −25°C to +100°C and accuracy for the ADT75 B Grade is ±1°C from 0°C to +70°C. Both grades have excellent transducer linearity. The serial interface is SMBus /I2C- compatible and the open-drain output of the ADT75 is capable of sinking 3 mA. The conversion clock for the part is generated internally. No external clock is required except when reading from and writing to the serial port. In normal mode, the internal clock oscillator runs an automatic conversion sequence. During this automatic conversion sequence, a conversion is initiated every 100 ms. At this time, the part powers up its analog circuitry and performs a temperature conversion. The on-board temperature sensor has excellent accuracy and linearity over the entire rated temperature range without needing correction or calibration by the user. The sensor output is digitized by a first-order ∑-Δ modulator, also known as the charge balance type analog-to-digital converter. This type of converter utilizes time-domain oversampling and a high accuracy comparator to deliver 12 bits of effective accuracy in an extremely compact circuit. CONVERTER DETAILS The ∑-Δ modulator consists of an input sampler, a summing network, an integrator, a comparator, and a 1-bit DAC. Similar to the voltage-to-frequency converter, this architecture creates a negative feedback loop and minimizes the integrator output by changing the duty cycle of the comparator output in response to input voltage changes. The comparator samples the output of the integrator at a much higher rate than the input sampling frequency; this is called oversampling. Oversampling spreads the quantization noise over a much wider band than that of the input signal, improving overall noise performance and increasing accuracy. INTEGRATOR COMPARATOR + – 1-BIT DAC 1-BIT LPF DIGITAL FILTER TEMPERATURE VALUE 12-BIT REGISTER 05326-011 CLOCK GENERATOR The ADT75 can be placed in shutdown mode via the configuration register, in which case the on-chip oscillator is shut down and no further conversions are initiated until the ADT75 is taken out of shutdown mode. The ADT75 can be taken out of shutdown mode by writing 0 to Bit D0 in the configuration register. The ADT75 typically takes 1.7 ms to come out of shutdown mode. The conversion result from the last conversion prior to shutdown can still be read from the ADT75 even when it is in shutdown mode. In normal conversion mode, the internal clock oscillator is reset after every read or write operation. This causes the device to start a temperature conversion, the result of which is typically available 60 ms later. Similarly, when the part is taken out of shutdown mode, the internal clock oscillator is started and a conversion is initiated. The conversion result is typically available 60 ms later. Reading from the device before a conversion is complete causes the ADT75 to stop converting; the part starts again when serial communication is finished. This read operation provides the previous conversion result. Σ-Δ MODULATOR VOLTAGE REF AND VPTAT This temperature conversion typically takes 60 ms, after which time the analog circuitry of the part automatically shuts down. The analog circuitry powers up again 40 ms later, when the 100 ms timer times out and the next conversion begins. The result of the most recent temperature conversion is always available in the temperature value register because the SMBus/I2C circuitry never shuts down. Figure 11. First-Order ∑-Δ Modulator The modulated output of the comparator is encoded using a circuit technique that results in SMBus/I2C temperature data. The measured temperature value is compared with a high temperature limit, stored in the 16-bit TOS read/write register and the hysteresis temperature limit, stored in the 16-bit THYST read/write register. If the measured value exceeds these limits then the OS/ALERT pin is activated. This OS/ALERT pin is programmable for mode and polarity via the configuration register. Rev. 0 | Page 10 of 24 ADT75 Configuration register functions consist of Table 6. 12-Bit Temperature Data Format • Switching between normal operation and full power-down. • Switching between comparator and interrupt event modes. • Setting the OS/ALERT pin active polarity. • Setting the number of faults that activate the OS/ALERT pin. • Enabling the one-shot mode. • Enabling the SMBus alert function mode on the OS/ALERT pin. Temperature −55°C −50°C −25°C −0.0625°C 0°C +0.0625°C +10°C +25°C +50°C +75°C +100°C +125°C TEMPERATURE DATA FORMAT One LSB of the ADC corresponds to 0.0625°C. The ADC can theoretically measure a temperature range of 255°C (−128°C to +127°C ), but the ADT75 is guaranteed to measure a low value temperature limit of −55°C to a high value temperature limit of +125°C. The temperature measurement result is stored in the 16-bit temperature value register and is compared with the high temperature limit stored in the TOS setpoint register and the hysteresis limit in the THYST setpoint register. Temperature data in the temperature value register, the TOS setpoint register and the THYST setpoint register, is represented by a 12-bit twos complement word. The MSB is the temperature sign bit. The four LSBs, Bit DB0 to Bit DB3, are not part of the temperature conversion result and are always 0s. Table 6 shows the temperature data format without Bit DB0 to Bit DB3. Digital Output (Binary) DB15 to DB4 1100 1001 0000 1100 1110 0000 1110 0111 0000 1111 1111 1111 0000 0000 0000 0000 0000 0001 0000 1010 0000 0001 1001 0000 0011 0010 0000 0100 1011 0000 0110 0100 0000 0111 1101 0000 Digital Output (Hex) 0xC90 0xCE0 0xE70 0xFFF 0x000 0x001 0x0A0 0x190 0x320 0x4B0 0x640 0x7D0 Temperature Conversion Formulas 12-Bit Temperature Data Format • Positive Temperature = ADC Code(d)/16 • Negative Temperature = (ADC Code(d)1− 4096)/16, or Negative Temperature = (ADC Code(d)2 – 2048)/16 9-Bit Temperature Data Format • Positive Temperature = ADC Code(d)/2 • Negative Temperature = (ADC Code(d)3 – 512)/2, or Negative Temperature = (ADC Code(d)4 – 256)/2 8-Bit Temperature Data Format Reading back the temperature from the temperature value register requires a 2-byte read unless only a 1°C (8-bit) resolution is required, then a 1-byte read is required. Designers that use a 9-bit temperature data format can still use the ADT75 by ignoring the last three LSBs of the 12-bit temperature value. These three LSBs are Bit D4 to Bit D6 in Table 6. 1 • Positive Temperature = ADC Code(d) • Negative Temperature = ADC Code(d)5 – 256, or Negative Temperature = ADC Code(d)6 – 128 Bit DB7 (sign bit) is removed from the ADC code. For ADC code, use all 12 bits of the data byte, including the sign bit. For ADC code, Bit DB11 (sign bit) is removed from the ADC code. 3 For ADC code, use all 9 bits of the data byte, including the sign bit. 4 Bit DB8 (sign bit) is removed from the ADC code. 5 For the ADC code, use all 8 bits of the data byte, including the sign bit. 6 Bit DB7 (sign bit) is removed from the ADC code. 2 Rev. 0 | Page 11 of 24 ADT75 TEMPERATURE ONE-SHOT MODE 82°C Setting Bit D5 of the configuration register enables the one-shot mode. When this mode is enabled, the ADT75 goes immediately into shutdown mode and the current consumption is reduced to typically 3 μA when VDD is 3.3 V and 5.5 μA when VDD is 5 V. A one-shot temperature measurement is initiated when Address 0x04 is written to the address pointer register, which is writing to the one-shot register. The ADT75 powers up, does a temperature conversion, and powers down again. When either of the overtemperature detection modes is selected, a write to the one-shot register, Address 0x04, causes the OS/ALERT pin to go active if the temperature exceeds the overtemperature limits. Refer to Figure 12 for more information on one-shot OS/ALERT pin operation. TOS 80°C 79°C 78°C 77°C 76°C THYST 75°C 74°C 73°C OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE HIGH OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE HIGH TIME READ1 Note: In the interrupt mode, a read from any register resets the OS/ALERT pin after it is activated by a write to the one-shot register. In the comparator mode, once the temperature drops below the value in the THYST register, a write to the one-shot register resets the OS/ALERT pin. The one-shot mode is useful when one of the circuit design priorities is to reduce power consumption. WRITE TO 0x04 REG.2 READ1 WRITE TO 0x04 REG.2 READ1 WRITE TO 0x04 REG.2 1READ FROM ANY 2THERE IS A 60ms REGISTER. DELAY BETWEEN WRITING TO THE ONE-SHOT REGISTER AND THE OS/ALERT PIN GOING ACTIVE. THIS IS DUE TO THE CONVERSION TIME. 05326-022 Wait for a minimum of 60 ms after writing to the one-shot register before reading back the temperature. This time ensures the ADT75 has time to power up and do a conversion. Reading back from the one-shot register, Address 0x04, gives the resultant temperature conversion. Reading from the temperature value register also gives the same temperature value. 81°C Figure 12. One-Shot OS/ALERT Pin Operation FAULT QUEUE Bit D3 and Bit D4 of the configuration register are used to set up a fault queue. Up to six faults are provided to prevent false tripping of the OS/ALERT pin when the ADT75 is used in a noisy temperature environment. The number of faults set in the queue must occur consecutively to set the OS/ALERT output. Rev. 0 | Page 12 of 24 ADT75 REGISTERS Address Pointer Register The ADT75 contains six registers: four are data registers, one is the address pointer register, and the final register is the one-shot register. The configuration register is the only data register that is 8 bits wide while the rest are 16 bits wide. The temperature value register is the only data register that is read only. Both a read and write can be performed on the rest of the data registers and on the one-shot register. On power-up, the address pointer register is loaded with 0x00 and points to the temperature value register. This 8-bit write only register stores an address that points to one of the four data registers and selects the one-shot mode. P0 and P1 select the data register to which subsequent data bytes are written to or read from. P0, P1, and P2 are used to select the one-shot mode by writing 04h to this register. A zero should be written to the rest of the bits. Table 7. ADT75 Registers Default Settings at Power-Up Pointer Address 0x00 0x01 0x02 0x03 0x04 Name Temperature value Configuration THYST setpoint TOS setpoint One-shot Power-On Default 0x00 0x00 0x4B00 (75°C) 0x5000 (80°C) 0xXX Table 8. Address Pointer Register P7 0 P6 0 P5 0 P4 0 P3 0 Table 9. Register Addresses P2 0 0 0 0 1 Rev. 0 | Page 13 of 24 P1 0 0 1 1 0 P0 0 1 0 1 0 Register Selected Temperature value Configuration THYST setpoint TOS setpoint One-shot mode P2 0 P1 0 P0 0 ADT75 Temperature Value Register This 16-bit read only register stores the temperature measured by the internal temperature sensor. The temperature is stored in twos complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs (Bit D15 to Bit D8) are read first and then the eight LSBs (Bit D7 to Bit D0) are read. The control register settings are the default settings on power up. MSB D15 0 D14 0 D13 0 D12 0 D11 0 D10 0 D9 0 D8 0 D7 0 D6 0 D5 0 D4 0 D3 N/A D2 N/A D1 N/A LSB D0 N/A Configuration Register This 8-bit read/write register stores various configuration modes for the ADT75. These modes are shutdown, overtemperature interrupt, one-shot, SMBus alert function enable, OS/ALERT pin polarity, and overtemperature fault queues. Table 10. Bit D7 D6 D5 D4 D3 D2 D1 D0 Configuration Mode OS/SMBus alert Reserved One-shot Fault queue Fault queue OS/ALERT pin polarity Cmp/Int Shutdown Default Setting at Power-Up 0 0 0 0 0 0 0 0 Rev. 0 | Page 14 of 24 ADT75 Table 11. Bit D0 Shutdown D1 Cmp/Int D2 OS/ALERT D4:D3 Fault Queue D5 One-Shot D6 Reserved D7 OS/SMBus Alert Mode Function Shutdown Bit. Setting this bit to 1 puts the ADT75 into shutdown mode. All circuitry except the SMBus/I2C interface is powered down. To power up the part again, write 0 to this bit. This bit selects between comparator and interrupt mode. D1 0 Over Temperature Interrupt Modes Comparator mode 1 Interrupt mode This bit selects the output polarity of the OS/ALERT pin. D2 OS/ALERT Pin Polarity 0 Active low 1 Active high These two bits set the number of overtemperature faults that occur before setting the OS/ALERT pin. This helps to avoid false triggering due to temperature noise. D [4:3] Overtemperature Fault Queue 00 1 fault (Default) 01 2 faults 10 4 faults 11 6 faults One-shot Mode. Setting this bit puts the part into one-shot mode. In this mode, the part is normally powered down until a 0x04 is written to the address pointer register; then a conversion is performed, and the part returns to power down. D5 One-Shot Mode 0 Normal mode; powered up and converting every 100 ms 1 One-shot mode Reserved. Write 0 to this bit. Interrupt Mode Only. Enable SMBus alert function mode. This bit can enable the ADT75 to support the SMBus alert function when the interrupt mode is selected (D1 = 1). D7 OS/SMBus Alert Mode 0 Disable SMBus alert function. The OS/ALERT pin behaves as an OS pin when this bit status is selected. 1 Enable SMBus alert function. THYST Setpoint Register This 16-bit read/write register stores the temperature hysteresis limit for the two interrupt modes. The temperature limit is stored in twos complement format with the MSB being the temperature sign bit. When reading from this register the eight MSBs are read first and then the eight LSBs are read. The default setting has the THYST limit at +75°C. The control register settings are the default settings on power up. MSB D15 0 D14 1 D13 0 D12 0 D11 1 D10 0 D9 1 D8 1 D7 0 D6 0 D5 0 D4 0 D3 N/A D2 N/A D1 N/A LSB D0 N/A TOS Setpoint Register This 16-bit read/write register stores the overtemperature limit value for the two interrupt modes. The temperature limit is stored in twos complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs are read first and then the eight LSBs are read. The default setting has the TOS limit at +80°C. The control register settings are the default settings on power up. MSB D15 0 D14 1 D13 0 D12 1 D11 0 D10 0 D9 0 D8 0 D7 0 Rev. 0 | Page 15 of 24 D6 0 D5 0 D4 0 D3 N/A D2 N/A D1 N/A LSB D0 N/A ADT75 SERIAL INTERFACE The serial bus protocol operates as follows: 2 Control of the ADT75 is carried out via the SMBus/I Ccompatible serial interface. The ADT75 is connected to this bus as a slave and is under the control of a master device. 1. The master initiates data transfer by establishing a start condition, defined as a high to low transition on the serial data line SDA, while the serial clock line SCL remains high. This indicates that an address/data stream is going to follow. All slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7-bit address (MSB first) plus a read/write (R/W) bit. The R/W bit determines whether data is written to, or read from, the slave device. 2. The peripheral with the address corresponding to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. All other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. If the R/W bit is a zero then the master writes to the slave device. If the R/W bit is a one then the master reads from the slave device. 3. Data is sent over the serial bus in sequences of nine clock pulses, eight bits of data followed by an acknowledge bit from the receiver of data. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, as a low to high transition when the clock is high can be interpreted as a stop signal. 4. When all data bytes have been read or written, stop conditions are established. In write mode, the master pulls the data line high during the 10th clock pulse to assert a stop condition. In read mode, the master device pulls the data line high during the low period before the ninth clock pulse. This is known as no acknowledge. The master takes the data line low during the low period before the 10th clock pulse, then high during the 10th clock pulse to assert a stop condition. Figure 13 shows a typical SMBus/I2C interface connection. PULL-UP VDD PULL-UP VDD VDD 10kΩ ADT75 OS/ALERT A0 A1 A2 10kΩ 0.1μF SCL SDA SMBus/I2C ADDRESS = 1001 000 05326-012 10kΩ GND Figure 13. Typical SMBus/I2C Interface Connection Serial Bus Address Like all SMBus/I2C-compatible devices, the ADT75 has a 7-bit serial address. The four MSBs of this address for the ADT75 are set to 1001. Pin A2, Pin A1, and Pin A0 set the three LSBs. These pins can be configured two ways, low and high, to give eight different address options. Table 12 shows the different bus address options available. Recommended pull-up resistor value on the SDA and SCL lines is 10 kΩ . Table 12. SMBus/I2C Bus Address Options Binary A6 A5 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 A4 0 0 0 0 0 0 0 0 A3 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 Hex 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F The ADT75 is designed with a SMBus/I2C timeout. The SMBus/I2C interface times out after 75 ms to 325 ms of no activity on the SDA line. After this timeout, the ADT75 resets the SDA line back to its idle state (SDA set to high impedance) and wait for the next start condition. Any number of bytes of data can be transferred over the serial bus in one operation. However, it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. The I2C address set up by the three address pins is not latched by the device until after this address has been sent twice. On the eighth SCL cycle of the second valid communication, the serial bus address is latched in. This is the SCL cycle directly after the device has seen its own I2C serial bus address. Any subsequent changes on this pin has no effect on the I2C serial bus address. Rev. 0 | Page 16 of 24 ADT75 WRITING DATA Writing Data to a Register Depending on the register being written to, there are two different writes for the ADT75. The configuration register is 8-bits wide so only one byte of data can be written to this register. Writing a single byte of data to the configuration register consists of the serial bus address, the data register address written to the address pointer register, followed by the data byte written to the selected data register. This is shown in Figure 15. The THYST register and the TOS register are each 16-bits wide, so two data bytes can be written into these registers. Writing two bytes of data to either one of these registers consists of the serial bus address, the data register address written to the address pointer register, followed by the two data bytes written to the selected data register. This is shown in Figure 16. If more than the required number of data bytes is written to a register then the register ignores these extra data bytes. To write to a different register, another start or repeated start is required. Writing to the Address Pointer Register for a Subsequent Read In order to read data from a particular register, the address pointer register must contain the address of that register. If it does not, the correct address must be written to the address pointer register by performing a single-byte write operation, as shown in Figure 14. The write operation consists of the serial bus address followed by the address pointer byte. No data is written to any of the data registers. A read operation is then performed to read the register. 9 1 1 9 SCL 0 0 1 A1 A2 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0 ACK. BY ADT75 START BY MASTER ACK. BY ADT75 STOP BY MASTER FRAME 2 ADDRESS POINTER REGISTER BYTE FRAME 1 SERIAL BUS ADDRESS BYTE Figure 14. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation 1 9 1 9 SCL 1 0 0 1 A2 A1 A0 START BY MASTER P7 R/W P6 P5 P4 P3 P2 P1 P0 ACK. BY ADT75 ACK. BY ADT75 FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 ADDRESS POINTER REGISTER BYTE 1 9 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADT75 FRAME 3 DATA BYTE Figure 15. Writing to the Address Pointer Register Followed by a Single Byte of Data to the Configuration Register Rev. 0 | Page 17 of 24 STOP BY MASTER 05326-014 SDA 05326-013 1 SDA ADT75 1 9 1 9 SCL 1 SDA 0 0 1 A2 A1 A0 P7 R/W START BY MASTER P6 P5 P4 P3 P2 P1 P0 ACK. BY ADT75 ACK. BY ADT75 FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 ADDRESS POINTER REGISTER BYTE 1 1 9 9 SCL (CONTINUED) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADT75 ACK. BY ADT75 STOP BY MASTER FRAME 4 DATA BYTE FRAME 3 DATA BYTE 05326-015 SDA (CONTINUED) Figure 16. Writing to the Address Pointer Register Followed by Two Bytes of Data to Either THYST or TOS Registers 9 1 1 9 SCL 0 0 1 A1 A2 R/W A0 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADT75 START BY MASTER NO ACK. BY STOP BY MASTER MASTER FRAME 2 DATA BYTE FROM CONFIGURATION REGISTER FRAME 1 SERIAL BUS ADDRESS BYTE 05326-016 1 SDA Figure 17. Reading Back Data from the Configuration Register 1 9 1 9 SCL SDA 1 0 0 1 A2 A1 A0 START BY MASTER D15 R/W D14 D13 D12 D11 D10 D9 D8 ACK. BY ADT75 ACK. BY MASTER FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 MSB DATA BYTE FROM TEMPERATURE VALUE REGISTER 9 1 SCL (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 NO ACK. BY MASTER FRAME 3 LSB DATA BYTE FROM TEMPERATURE VALUE REGISTER STOP BY MASTER 05326-017 SDA (CONTINUED) Figure 18. Reading Back Data from the Temperature Value Register READING DATA Reading data from the ADT75 is done in a one data byte operation for the configuration register and a two data byte operation for the temperature value register, THYST register, and the TOS setpoint register. Reading back the contents of the configuration register is shown in Figure 17. Reading back the contents of the temperature value register is shown in Figure 18. Reading back from any register first requires a single-byte write operation to the address pointer register to set up the register address of the register that is going to be read from. To read from another register, execute another write to the address pointer register to set up the relevant register address. Thus, block reads are not possible, that is, there is no I2C auto-increment. If the address pointer register has previously been set up with the address of the register that is going to receive a read command then there is no need to repeat a write operation to set up the register address again. Rev. 0 | Page 18 of 24 ADT75 OS/ALERT OUTPUT OVERTEMPERATURE MODES Interrupt Mode The ADT75 has two overtemperature modes, comparator mode and interrupt mode. The OS/ALERT pin defaults on power up as an OS pin; the comparator mode is the default power up overtemperature mode. The OS/ALERT output pin becomes active when the temperature measured exceeds the temperature limit stored in the TOS setpoint register. How this pin reacts after this event depends on the overtemperature mode selected. In the interrupt mode, the OS/ALERT pin goes inactive when any ADT75 register is read. The OS/ALERT pin can only return to active status if the temperature measured is below the limit stored in the THYST setpoint register. Once the OS/ALERT pin is reset, it goes active again only when the temperature has gone above the TOS limit. The OS/ALERT pin can also be reset by a SMBus alert response address (ARA) when this pin has been selected as a SMBus alert pin. More information is given in the SMBus Alert section. Comparator Mode In the comparator mode, the OS/ALERT pin returns to its inactive status when the temperature measured drops below the limit stored in the THYST setpoint register. Putting the ADT75 into shutdown mode does not reset the OS/ALERT state in comparator mode. Figure 19 illustrates the comparator and interrupt modes with both pin polarity settings. Placing the ADT75 into shutdown mode resets the OS/ALERT pin in the interrupt mode. TEMPERATURE 82°C 81°C TOS 80°C 79°C 78°C 77°C 76°C THYST 75°C 74°C 73°C OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE HIGH TIME READ READ READ Figure 19. OS/ALERT Output Temperature Response Diagram Rev. 0 | Page 19 of 24 05326-018 OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE HIGH ADT75 SMBus ALERT 1. SMBALERT is pulled low. The OS/ALERT pin can behave as a SMBus alert pin when the SMBus alert function is enabled by setting Bit D7 in the configuration register. The interrupt mode must also be selected (Bit D1 in the configuration register). The OS/ALERT pin is an open-drain output and requires a pull-up to VDD. Several SMBus alert outputs can be wire-AND’ed together, so that the common line goes low if one or more of the SMBus alert outputs goes low. The polarity of the OS/ALERT pin must be set for active low for a number of outputs to be wire-AND’ed together. 2. Master initiates a read operation and sends the SMBus alert response address (ARA = 0001 100). This reserved SMBus/I2C address must not be used as a specific device address. 3. The OS/ALERT output can operate as a SMBALERT function. Slave devices on the SMBus normally cannot signal to the master that they want to talk, but the SMBALERT function allows them to do so. SMBALERT is used in conjunction with the SMBus general call address. The device whose SMBus alert output is low responds to the SMBus alert response address and the master reads its device address. As the device address is seven bits long, the ADT75’s LSB is free to be used as an indicator as to which temperature limit was exceeded. The LSB is high if the temperature is greater than or equal to TOS, and the LSB is low if the temperature is less than THYST. The address of the device is now known and it can be interrogated in the usual way. 4. If more than one devices’ SMBus alert output is low, the one with the lowest device address has priority, which is in accordance with normal SMBus specifications. One or more SMBus alert outputs can be connected to a common SMBALERT line connected to the master. When the SMBALERT line is pulled low by one of the devices, the following procedure occurs as shown in Figure 20. Once the ADT75 has responded to the SMBus alert response address, it resets its SMBus alert output. If the SMBALERT line remains low, the master sends the ARA again. It continues to do this until all devices whose SMBALERT outputs were low have responded. ALERT RESPONSE ADDRESS MASTER SENDS ARA AND READ COMMAND RD ACK DEVICE ADDRESS NO ACK STOP DEVICE SENDS ITS ADDRESS MASTER ACK RESPONSE RD ACK DEVICE START ALERT ADDRESS ADDRESS ACK 05326-019 START DEVICE ACK MASTER RECEIVES SMBALERT Figure 20. ADT75 Responds to SMBALERT ARA MASTER SENDS ARA AND READ COMMAND MASTER NACK PEC DEVICE SENDS DEVICE SENDS ITS ADDRESS ITS PEC DATA Figure 21. ADT75 Responds to SMBALERT ARA with Packet Error Checking (PEC) Rev. 0 | Page 20 of 24 NO ACK STOP 05326-020 MASTER RECEIVES SMBALERT ADT75 APPLICATION INFORMATION THERMAL RESPONSE TIME SUPPLY DECOUPLING The time required for a temperature sensor to settle to a specified accuracy is a function of the thermal mass of the sensor and the thermal conductivity between the sensor and the object being sensed. Thermal mass is often considered equivalent to capacitance. Thermal conductivity is commonly specified using the symbol Q, and can be thought of as thermal resistance. It is commonly specified in units of degrees per watt of power transferred across the thermal joint. Thus, the time required for the ADT75 to settle to the desired accuracy is dependent on the package selected, the thermal contact established in that particular application, and the equivalent power of the heat source. In most applications, it is best to determine empirically the settling time. The ADT75 should be decoupled with a 0.1 μF ceramic capacitor between VDD and GND. This is particularly important when the ADT75 is mounted remotely from the power supply. Precision analog products, such as the ADT75, require a wellfiltered power source. Because the ADT75 operates from a single supply, it might seem convenient to tap into the digital logic power supply. However, the logic supply is often a switchmode design, which generates noise in the 20 kHz to 1 MHz range. In addition, fast logic gates can generate glitches hundreds of mV in amplitude due to wiring resistance and inductance. SELF-HEATING EFFECTS The temperature measurement accuracy of the ADT75 might be degraded in some applications due to self-heating. Errors can be introduced from the quiescent dissipation and power dissipated when converting. The magnitude of these temperature errors is dependent on the thermal conductivity of the ADT75 package, the mounting technique, and the effects of airflow. At 25°C, static dissipation in the ADT75 is typically 798.6 μW operating at 3.3 V. In the 8-lead MSOP package mounted in free air, this accounts for a temperature increase due to self-heating of If possible, the ADT75 should be powered directly from the system power supply. This arrangement, shown in Figure 22, isolates the analog section from the logic switching transients. Even if a separate power supply trace is not available, generous supply bypassing reduces supply-line induced errors. Local supply bypassing consisting of a 0.1 μF ceramic capacitor is critical for the temperature accuracy specifications to be achieved. This decoupling capacitor must be placed as close as possible to the ADT75 VDD pin. TTL/CMOS LOGIC CIRCUITS 0.1μF ADT75 It is recommended that current dissipated through the device be kept to a minimum, because it has a proportional effect on the temperature error. Using the power-down mode can reduce the current dissipated through the ADT75 subsequently reducing the self-heating affect. When the ADT75 is in power-down mode and operating at 25°C, static dissipation in the ADT75 is typically 78.6 μW with VDD = 3.3 V and the power-up/conversion rate is 1 SPS (sample per second). In the 8-lead MSOP package mounted in free air, this accounts for a temperature increase due to selfheating of ΔT = PDISS × θJA = 78.6 μW × 205.9°C/W = 0.016°C Rev. 0 | Page 21 of 24 POWER SUPPLY Figure 22. Use Separate Traces to Reduce Power Supply Noise 05326-021 ΔT = PDISS × θJA = 798.6 μW × 205.9°C/W = 0.16°C ADT75 TEMPERATURE MONITORING The ADT75 is ideal for monitoring the thermal environment within electronic equipment. For example, the surface-mounted package accurately reflects the exact thermal conditions that affect nearby integrated circuits. The ADT75 measures and converts the temperature at the surface of its own semiconductor chip. When the ADT75 is used to measure the temperature of a nearby heat source, the thermal impedance between the heat source and the ADT75 must be considered. Often, a thermocouple or other temperature sensor is used to measure the temperature of the source, while the temperature is monitored by reading back from the ADT75 temperature value register. Once the thermal impedance is determined, the temperature of the heat source can be inferred from the ADT75 output. As much as 60% of the heat transferred from the heat source to the thermal sensor on the ADT75 die is discharged via the copper tracks, the package pins, and the bond pads. Of the pins on the ADT75, the GND pin transfers most of the heat. Therefore, to measure the temperature of a heat source it is recommended that the thermal resistance between the ADT75 GND pin and the GND of the heat source is reduced as much as possible. For example, use the ADT75’s unique properties to monitor a high-power dissipation microprocessor. The ADT75 device, in a surface-mounted package, is mounted directly beneath the microprocessor’s pin grid array (PGA) package. The ADT75 produces a linear temperature output while needing only two I/O pins and requiring no external characterization. Rev. 0 | Page 22 of 24 ADT75 OUTLINE DIMENSIONS 3.20 3.00 2.80 5.00 (0.1968) 4.80 (0.1890) 8 8 3.20 3.00 2.80 1 5 4.00 (0.1574) 3.80 (0.1497) 1 5.15 4.90 4.65 4 0.25 (0.0098) 0.10 (0.0040) 0.65 BSC 0.38 0.22 COPLANARITY 0.10 0.23 0.08 0.80 0.60 0.40 8° 0° 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 1.10 MAX 0.15 0.00 6.20 (0.2440) 4 5.80 (0.2284) 1.27 (0.0500) BSC PIN 1 0.95 0.85 0.75 5 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 23. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions Shown in Millimeters Figure 24. 8-Lead Standard Small Outline Package [SOIC_N] (R-8) Dimensions Shown in Millimeters ORDERING GUIDE Model ADT75ARM ADT75ARM-REEL7 ADT75ARM-REEL ADT75ARMZ 1 ADT75ARMZ-REEL71 ADT75ARMZ-REEL1 ADT75ARZ1 ADT75ARZ-REEL71 ADT75ARZ-REEL1 ADT75BRMZ1 ADT75BRMZ-REEL71 ADT75BRMZ-REEL1 Temperature Range –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C Temperature Accuracy ±2°C2 ±2°C2 ±2°C2 ±2°C 2 ±2°C2 ±2°C2 ±2°C2 ±2°C2 ±2°C2 ±1°C 3 ±1°C3 ±1°C3 Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 1 Z = Pb-free part. A grade temperature accuracy is over the −25°C to +100°C temperature range. 3 B grade temperature accuracy is over the 0°C to +70°C temperature range. 2 Rev. 0 | Page 23 of 24 Package Option RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 Branding T5A T5A T5A T5B T5B T5B T5C T5C T5C ADT75 NOTES Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05326-0-10/05(0) Rev. 0 | Page 24 of 24