ALD ALD1701A Micropower rail-to-rail cmos operational amplifier Datasheet

ADVANCED
LINEAR
DEVICES, INC.
ALD1701A/ALD1701B
ALD1701/ALD1701G
MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
FEATURES
The ALD1701A/ALD1701B/ALD1701/ALD1701G is a monolithic CMOS
micropower high slew rate operational amplifier intended for a broad
range of analog applications using ±1V to ±5V dual power supply
systems, as well as +2V to +10V battery operated systems. All device
characteristics are specified for +5V single supply or ±2.5V dual supply
systems. Supply current is 250µA maximum at 5V supply voltage. It is
manufactured with Advanced Linear Devices' enhanced ACMOS silicon
gate CMOS process.
• All parameters specified for +5V single
supply or ±2.5V dual supply systems
• Rail to rail input and output voltage ranges
• No frequency compensation required -unity gain stable
• Extremely low input bias currents -1.0pA typical (30pA max.)
• Ideal for high source impedance applications
• Dual power supply ±1.0V to ±5.0V operation
• Single power supply +2.0V to +10.0V
operation
• High voltage gain -- typically 100V/mV
@ ±2.5V(100dB)
• Drive as low as 10KΩ load
• Output short circuit protected
• Unity gain bandwidth of 0.7MHz
• Slew rate of 0.7V/µs
• Low power dissipation
• Suitable for rugged, temperature-extreme
environments
The ALD1701A/ALD1701B/ALD1701/ALD1701G is designed to offer a
trade-off of performance parameters providing a wide range of desired
specifications. It has been developed specifically for the +5V single
supply or ±1V to ±5V dual supply user and offers the popular industry
standard pin configuration of µA741 and ICL7611 types.
Several important characteristics of the device make application easier to
implement at those voltages. First, the operational amplifier can operate
with rail to rail input and output voltages. This means the signal input
voltage and output voltage can be equal to the positive and negative
supply voltages. This feature allows numerous analog serial stages and
flexibility in input signal bias levels. Second, the device was designed to
accommodate mixed applications where digital and analog circuits may
operate off the same power supply or battery. Third, the output stage can
typically drive up to 50pF capacitive and 10KΩ resistive loads.
These features, combined with extremely low input currents, high open
loop voltage gain of 100V/mV, useful bandwidth of 700KHz, a slew rate
of 0.7V/µs, low power dissipation of 0.5mW, low offset voltage and
temperature drift, make the ALD1701 a versatile, micropower operational
amplifier.
The ALD1701A/ALD1701B/ALD1701/ALD1701G, designed and fabricated with silicon gate CMOS technology, offers 1pA typical input bias
current. On chip offset voltage trimming allows the device to be used
without nulling in most applications. Additionally, robust design and
rigorous screening make this device especially suitable for operation in
temperature-extreme environments and rugged conditions.
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
Voltage amplifier
Voltage follower/buffer
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range
0°C to +70°C
0°C to +70°C
-55°C to 125°C
8-Pin
Small Outline
Package (SOIC)
8-Pin
Plastic Dip
Package
8-Pin
CERDIP
Package
ALD1701ASAL
ALD1701BSAL
ALD1701SAL
ALD1701GSAL
ALD1701APAL
ALD1701BPAL
ALD1701PAL
ALD1701GPAL
ALD1701ADA
ALD1701BDA
ALD1701DA
ALD1701GDA
8
N/C
7
V+
3
6
OUT
4
5
N/C
N/C
1
-IN
2
+IN
V-
2
TOP VIEW
SAL, PAL, DA PACKAGES
* N/C pins are internally connected. Do not connect externally.
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.1 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
Differential input voltage range
Power dissipation
Operating temperature range SAL, PAL packages
DA package
Storage temperature range
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
10.6V
-0.3V to V+ +0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25°C VS = ±2.5V unless otherwise specified
Parameter
Symbol Min
1701A
Typ
Max
Min
1701B
Typ
Max
Min
±5.0
10.0
±1.0
2.0
±5.0
10.0
±1.0
2.0
1701
Typ Max
Min
Supply
Voltage
VS
V+
Input Offset
Voltage
VOS
Input Offset
Current
IOS
1.0
25
240
1.0
25
240
1.0
25
240
Input Bias
Current
IB
1.0
30
300
1.0
30
300
1.0
30
300
Input Voltage
Range
VIR
Input
Resistance
RIN
Input Offset
Voltage Drift
TCVOS
Power Supply
Rejection Ratio
PSRR
70
70
80
80
65
65
80
80
65
65
80
80
60
60
Common Mode
Rejection Ratio
CMRR
70
70
83
83
65
65
83
83
65
65
83
83
Large Signal
Voltage Gain
AV
40
100
1000
32
100
1000
32
100
1000
±1.0
2.0
0.9
1.7
-0.3
-2.8
5.3
2.8
20
-2.48
ALD1701A/ALD1701B
ALD1701/ALD1701G
30
450
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
1.0
50
600
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
-0.3
-2.8
5.3
2.8
5.3
2.8
V
V
V+ = +5V
VS = ±2.5V
-0.3
-2.8
7
4.999
PD
1.0
7
VO high 4.99
Power
Dissipation
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
7
VO low
IS
mV
mV
7
Range
Supply Current
10.0
11.0
4.5
5.3
1012
Voltage
ISC
5.3
2.8
Dual Supply
Single Supply
1012
0.001
Output Short
Circuit Current
-0.3
-2.8
0.01
4.99
0.01
4.999
-2.48
2.40
1
120
0.001
-2.40
2.48
20
4.99
-2.40
2.48
1.25
120
80
80
dB
dB
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
60
60
83
83
dB
dB
RS ≤ 100KΩ
0°C ≤ TA ≤ +70°C
20
80
1000
V/ mV
V/ mV
V/ mV
RL = 100KΩ
RL ≥ 1MΩ
RL = 100KΩ
0°C ≤ TA ≤ +70°C
0.01
V
RL =1MΩ V+ = +5V
V
-2.40
V
0°C ≤ TA ≤ +70°C
RL =100KΩ
V
0°C ≤ TA ≤ +70°C
120
1.25
Advanced Linear Devices
0.001
4.99 4.999
-2.48
2.40
1
250
RS ≤ 100KΩ
-2.40
2.48
1
250
µV/°C
0.01
4.999
-2.48
2.40
Ω
10
0.001
2.48
1
250
1.25
Test
Conditions
V
1012
VO low
VO high 2.40
2.0
2.8
Unit
±5.0
10.0
±1.0
2.0
1012
20
Output
±5.0
10.0
1701G
Typ
Max
120
mA
300
µA
VIN = 0V
No Load
1.50
mW
VS = ±2.5V
2 of 9
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
TA = 25°C VS = ±2.5V unless otherwise specified
Parameter
Symbol
Min
1701A
Typ
Max
1701B
Typ
Min
Input
Capacitance
CIN
1
Bandwidth
BW
400
700
400
700
Slew Rate
SR
0.33
0.7
0.33
0.7
Rise time
tr
Overshoot
Factor
Settling Time
ts
Max
Min
1701
Typ
1
Max
Min
1701G
Typ Max
Unit
Test
Conditions
1
1
pF
400
700
700
KHz
0.33
0.7
0.7
V/µs
AV = +1
RL = 100KΩ
0.2
0.2
0.2
0.2
µs
RL = 100KΩ
20
20
20
20
%
RL =100KΩ
CL = 50pF
10.0
10.0
10.0
10.0
µs
0.1%
AV = -RL=100KΩ
CL = 50pF
TA = 25°C VS = ±5.0V unless otherwise specified
Parameter
Symbol
Min
1701A
Typ
Max
1701B
Typ
Min
Max
Min
1701
Typ
Max
Min
1701G
Typ Max
Unit
Test
Conditions
Power Supply
Rejection Ratio
PSRR
83
83
83
83
dB
RS ≤ 100KΩ
Common Mode
Rejection Ratio
CMRR
83
83
83
83
dB
RS ≤ 100KΩ
Large Signal
Voltage Gain
AV
250
250
250
250
V/mV
RL =100KΩ
Output Voltage
Range
VO low
-4.98
VO high 4.90 4.98
-4.98 -4.90
4.98
V
V
RL =100KΩ
Bandwidth
BW
1.0
1.0
1.0
1.0
MHz
Slew Rate
SR
1.0
1.0
1.0
1.0
V/µs
-4.90
4.90
-4.98
4.98
-4.90
4.90
-4.98
4.98
-4.90
4.90
AV = +1
CL = 50pF
VS = ±2.5V -55°C ≤ TA ≤ +125°C unless otherwise specified
1701BDA
Min
Typ
1701DA
Max
Min
Typ
Test
Parameter
Symbol
Max
Unit
3.0
6.5
mV
8.0
8.0
nA
10.0
10.0
nA
Conditions
Input Offset
VOS
Input Offset
Current
IOS
Input Bias
Current
IB
Power Supply
Rejection Ratio
PSRR
60
75
60
75
dB
RS ≤ 100KΩ
Common Mode
Rejection Ratio
CMRR
60
83
60
83
dB
RS ≤ 100KΩ
Large Signal
Voltage Gain
AV
15
50
15
50
V/ mV
RL = 100KΩ
Output Voltage
Range
VO low
VO high
2.35
-2.47
2.45
2.35
-2.47
2.45
V
V
RL = 100KΩ
RS ≤ 100KΩ
Voltage
ALD1701A/ALD1701B
ALD1701/ALD1701G
-2.40
Advanced Linear Devices
-2.40
3 of 9
Design & Operating Notes:
1. The ALD1701A/ALD1701B/ALD1701/ALD1701G CMOS operational
amplifier uses a 3 gain stage architecture and an improved frequency
compensation scheme to achieve large voltage gain, high output
driving capability, and better frequency stability. In a conventional
CMOS operational amplifier design, compensation is achieved with
a pole splitting capacitor together with a nulling resistor. This method
is, however, very bias dependent and thus cannot accommodate the
large range of supply voltage operation as is required from a stand
alone CMOS operational amplifier. The ALD1701A/ALD1701B/
ALD1701/ALD1701G is internally compensated for unity gain stability
using a novel scheme that does not use a nulling resistor. This
scheme produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the
unity gain frequency.
2. The ALD1701A/ALD1701B/ALD1701/ALD1701G has complementary p-channel and n-channel input differential stages connected in
parallel to accomplish rail to rail input common mode voltage range.
This means that with the ranges of common mode input voltage close
to the power supplies, one of the two differential stages is switched
off internally. To maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5V below
the positive supply voltage. Since offset voltage trimming on the
ALD1701A/ALD1701B/ALD1701/ALD1701G is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excursions above this switching point. The user should however, be aware
that this switching does take place if the operational amplifier is
connected as a unity gain buffer, and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 1012Ω would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors
as determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output
feature, makes an effective analog signal buffer for medium to high
source impedance sensors, transducers, and other circuit networks.
5. The ALD1701A/ALD1701B/ALD1701/ALD1701G operational amplifier has been designed to provide full static discharge protection.
Internally, the design has been carefully implemented to minimize
latch up. However, care must be exercised when handling the device
to avoid strong static fields that may degrade a diode junction, causing
increased input leakage currents. In using the operational amplifier,
the user is advised to power up the circuit before, or simultaneously
with any input voltages applied, and to limit input voltages not to
exceed 0.3V of the power supply voltage levels.
6. The ALD1701A/ALD1701B/ALD1701/ALD1701G, with its
micropower operation, offers numerous benefits in reduced power
supply requirements, less noise coupling and current spikes, less
thermally induced drift, better overall reliability due to lower self
heating, and lower input bias current. It requires practically no warm
up time as the chip junction heats up to only 0.1°C above ambient
temperature under most operating conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
±7
INPUTS GROUNDED
OUTPUT UNLOADED
400
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
+25°C
COMMON MODE INPUT
VOLTAGE RANGE (V)
SUPPLY CURRENT (µA)
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
-25°C
300
TA = -55°C
200
+125°C
100
+70°C
±6
TA = 25°C
±5
±4
±3
±2
±1
0
0
0
±1
±2
±3
±4
±5
0
±6
±1
±4
±5
±6
±7
10000
100
10
VS = ±2.5V
TA = 25°C
INPUT BIAS CURRENT (pA)
OPEN LOOP VOLTAGE
GAIN (V/mV)
1000
VS = ±2.5V
1000
100
10
1.0
0.1
100K
1M
10M
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
LOAD RESISTANCE (Ω)
ALD1701A/ALD1701B
ALD1701/ALD1701G
±3
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
1
10K
±2
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
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TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
±6
OUTPUT VOLTAGE SWING (V)
OPEN LOOP VOLTAGE
GAIN (V/mV)
1000
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
100
10
-55°C ≤ TA ≤ +125°C
RL = 100KΩ
±4
±3
±2
±1
1
0
±2
±4
±6
0
±8
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF FREQUENCY
120
OPEN LOOP VOLTAGE
GAIN (dB)
+5
+4
VS = ±2.5V
+3
+2
+1
0
-1
-2
VS = ±2.5V
TA = 25°C
100
-3
-4
80
60
0
40
45
20
90
0
135
180
-20
1
-5
-50
-25
0
+25
+50
+75
10
+100 +125
100
1K
10K 100K
FREQUENCY (Hz)
1M
PHASE SHIFT IN DEGREES
INPUT OFFSET VOLTAGE (mV)
-55°C ≤ TA ≤ +125°C
RL = 100KΩ
±5
10M
AMBIENT TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
LARGE - SIGNAL TRANSIENT
RESPONSE
15
VS = ±2.5V
TA = 25°C
10
2V/div
VS = ±1.0V
TA = 25°C
RL = 100KΩ
CL = 50pF
500mV/div
5µs/div
5
0
-5
-10
-15
-2
-1
0
+1
+2
+3
COMMON MODE INPUT VOLTAGE (V)
LARGE - SIGNAL TRANSIENT
RESPONSE
SMALL - SIGNAL TRANSIENT
RESPONSE
5V/div
VS = ±2.5V
TA = 25°C
RL = 100KΩ
CL = 50pF
100mV/div
VS = ±2.5V
TA = 25°C
RL = 100KΩ
CL = 50pF
2V/div
5µs/div
20mV/div
2µs/div
ALD1701A/ALD1701B
ALD1701/ALD1701G
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5 of 9
TYPICAL APPLICATIONS
RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER
RAIL-TO-RAIL VOLTAGE COMPARATOR
+5V
5V
~ 1012Ω
ZIN =
VIN
0.1µF
-
0.1µF
-
+5V
OUTPUT
+
VIN
10M
0≤ VIN ≤ 5V
* See Rail to Rail Waveform
HIGH INPUT IMPEDANCE RAIL-TO-RAIL
PRECISION DC SUMMING AMPLIFIER
+
V2
RAIL-TO-RAIL WAVEFORM
+2.5V
10M
V1
OUTPUT
+
50K
10M
INPUT
-
0V
0.1µF
+5V
OUTPUT
0V
VOUT
10M
10M
+5V
0.1µF
V3
V- ≤ VIN ≤ V+
- 2.5V
V4
V- ≤ VOUT ≤ V+
10M
VOUT = V1 + V2 - V3 - V4
Performance waveforms.
Upper trace is the output of a
Wien Bridge Oscillator. Lower
trace is the output of Rail-to-rail
voltage follower.
10M
RIN = 10MΩ Accuracy limited by resistor tolerances and input offset voltage
WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL)
SINE WAVE GENERATOR
PHOTO DETECTOR CURRENT TO
VOLTAGE CONVERTER
RF = 5M
+2.5V
-
I
OUTPUT
+
+
-2.5V
10K
R = 10K
f =~
VOUT = I x RF
PHOTODIODE
10K
.01µF
C = .01µF
+2.5V
-
10K
-2.5V
1
2πRC
RL = 10K
~ 1.6KHz
* See Rail to Rail Waveform
LOW VOLTAGE INSTRUMENTATION AMPLIFIER
V+
0.1µF
1M
+
100K
-
500K
V+
100K
V-
0.1µF
0.1µF
-
f max = 20KHz
-40mV ≤ VIN ≤ 40mV
VOUT
50K
+
V+
0.1µF
1M
V-
0.1µF
V-
100K
+
V-
ALD1701A/ALD1701B
ALD1701/ALD1701G
V+ 1M
100K
0.1µF
1M
GAIN = 25 V- ≤ VOUT ≤ V+. All resistors are 1%.
V+ = +1.0V, V- = -1.0V. Short circuit input current 1µA.
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SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Dim
S (45°)
D
A
Min
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-8
4.69
5.00
0.185
0.196
E
3.50
4.05
0.140
0.160
1.27 BSC
e
A
A1
e
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
b
S (45°)
H
L
ALD1701A/ALD1701B
ALD1701/ALD1701G
C
ø
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PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
Millimeters
E
E1
D
S
A2
A1
e
b
A
L
Dim
Min
Max
Min
Max
A
3.81
5.08
0.105
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-8
9.40
11.68
0.370
0.460
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
7.37
7.87
0.290
0.310
L
2.79
3.81
0.110
0.150
S-8
1.02
2.03
0.040
0.080
0°
15°
0°
15°
ø
b1
Inches
c
e1
ALD1701A/ALD1701B
ALD1701/ALD1701G
ø
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CERDIP-8 PACKAGE DRAWING
8 Pin CERDIP Package
E E1
Millimeters
D
A1
s
A
L
L2
b
b1
e
L1
Inches
Dim
A
Min
Max
3.55
5.08
Min
0.140
Max
0.200
A1
1.27
2.16
0.050
0.085
b
0.97
1.65
0.038
0.065
b1
0.36
0.58
0.014
0.023
C
0.20
0.38
0.008
0.015
D-8
--
10.29
--
0.405
E
5.59
7.87
0.220
0.310
E1
7.73
8.26
0.290
0.325
e
2.54 BSC
0.100 BSC
e1
7.62 BSC
0.300 BSC
L
3.81
5.08
0.150
0.200
L1
3.18
--
0.125
--
L2
0.38
1.78
0.015
0.070
S
--
2.49
--
0.098
Ø
0°
15°
0°
15°
C
e1
ALD1701A/ALD1701B
ALD1701/ALD1701G
ø
Advanced Linear Devices
9 of 9
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