plerowTM ALN1750T2 Internally Matched LNA Module Features Description · S21 = 22.4 dB @ 1700 MHz = 21.6 dB @ 1800 MHz · NF of 0.6 dB over Frequency · Unconditionally Stable · Single 5V Supply · High OIP3 @ Low Current The plerowTM ALN-series is the compactly designed surface-mount module for the use of the LNA with or without the following gain blocks in the infrastructure equipment of the mobile wireless (CDMA, GSM, PCS, PHS, WCDMA, DMB, WLAN, WiBro, WiMAX), GPS, satellite communication terminals, CATV and so on. It has an exceptional performance of low noise figure, high gain, high OIP3, and low bias current. The stability factor is always kept more than unity over the application band in order to ensure its unconditionally stable implementation to the application system environment. The surface-mount module package including the completed matching circuit and other components necessary just in case allows very simple and convenient implementation onto the system board in mass production level. Specifications (in Production) Typ. @ T = 25C, Vs = 5 V, Freq. = 1750 MHz, Zo.sys = 50 ohm Parameter Unit Frequency Range Min MHz 1700 Gain dB 21 Gain Flatness dB Noise Figure dB Output IP3 (1) dBm S11 / S22 (2) dB Output P1dB dBm Typ Max 1800 22 34 0.4 0.5 0.60 0.65 Website: www.asb.co.kr E-mail: [email protected] Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 -18 / -10 20 21 sec - mA 100 Supply Voltage V 5 Impedance 50 mm Surface Mount Type, 10Wx10Lx3.8H Package Type & Size More Information 35 Supply Current Switching Time (3) 2-stage Single Type Specifications 120 Operating temperature is -40C to +85C. 1) OIP3 is measured with two tones at an output power of 5 dBm / tone separated by 1 MHz. 2) S11/S22 (max) is the worst value within the frequency band. 3) Switching time means the time that takes for output power to get stabilized to its final level after switching DC voltage from 0 V to VS. Outline Drawing (Unit: mm) Pin Number plerow ALN1750T2 ASB Inc. (Top View) (Bottom View) Function 2 RF In 5 RF Out 6 Vs Others Ground Note: 1. The number and size of ground via holes in a circuit board is critical for thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins for better RF and thermal performance, as shown in the drawing at the left side. Solder Stencil Area (Side View) Ø 0.4 plated thru holes to ground plane (Recommended Footprint) 1/3 www.asb.co.kr August 2017 plerowTM ALN1750T2 Internally Matched LNA Module S-parameters Typical Performance (Measured) 1700~1800 MHz +5 V Noise Figure S-parameters & K Factor OIP3 2/3 P1dB www.asb.co.kr August 2017 plerowTM ALN1750T2 Internally Matched LNA Module Application Circuit VS + - Tantal or MLC (Multi Layer Ceramic) Capacitor C1 C2 ALN IN OUT 1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. The capacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for the best electrical performance. 2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are included inside the ALN module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application frequency. Recommended Soldering Reflow Process Evaluation Board Layout Vs 20~40 sec 260C Ramp-up (3˚C/sec) 200C Ramp-down (6C/sec) IN OUT 150C 60~180 sec Size 25x25mm (for ALN-AT, BT, T Series – 10x10mm) Copyright 2009-2017 ASB Inc. All rights reserved. Datasheet subject to change without notice. ASB assumes no responsibility for any errors which may appear in this datasheet. No part of the datasheet may be copied or reproduced in any form or by any means without the prior written consent of ASB. 3/3 www.asb.co.kr August 2017