Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 General Description Features The AP2302 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 3A current continuously, offers enough current for most DDR applications. Output voltage is designed to track the reference voltage within a 2% (DDR I) and 3% (DDR II) tolerance for load regulation while preventing shooting through on the output stage. On-chip thermal limiting provides protection against a combination of high current and ambient temperature which would create an excessive junction temperature. · Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements · · · Source and Sink Current up to 3A High Accuracy Output Voltage at Full-load Adjustable VOUT by External Resistors · Shutdown for Standby or Suspend Operation with High-impedance Output Mode Applications The AP2302, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. · · · DDR-SDRAM Termination DDR-II Termination SSTL-2 Termination The AP2302 is available in SOIC-8, TO-252-5L and TO-263-5L packages. SOIC-8 TO-252-5L TO-263-5L Figure 1. Package Types of AP2302 Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 1 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Pin Configuration M Package (SOIC-8) D Package (TO-252-5L) VIN 1 8 VCNTL GND 2 7 VCNTL REFEN 3 6 VCNTL VOUT 4 5 VCNTL VOUT 5 4 3 REFEN VCNTL (TAB) 2 1 GND VIN S5 Package (TO-263-5L) VOUT REFEN VCNTL (TAB) GND VIN 5 4 3 2 1 Figure 2. Pin Configuration of AP2302 (Top View) Pin Description Pin Number SOIC-8 TO-252-5L TO-263-5L Pin Name 1 1 1 VIN Power Input 2 2 2 GND Ground 3 4 4 REFEN 4 5 5 VOUT Output Voltage 5, 6, 7, 8 3 3 VCNTL Supply Voltage for Internal Circuit (Internally Connected for SOIC8), (TAB for TO-252-5L and TO-263-5L) Function Reference Voltage Input and Chip Enable Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 2 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Functional Block Diagram VCNTL VIN 1 3 (5, 6, 7, 8) CURRENT LIMIT A(B) A for 5-pin B for 8-pin BANDGAP REFEN OUTPUT CONTROL 4 (3) 5 (4) VOUT START UP 2 THERMAL PROTECT GND Figure 3. Functional Block Diagram of AP2302 Ordering Information AP2302 E1: Lead Free Blank: Tin Lead Circuit Type Package M: SOIC-8 D: TO-252-5L S5: TO-263-5L Package SOIC-8 Temperature Range TR: Tape and Reel Blank: Tube Part Number Marking ID Packing Type Tin Lead Lead Free Tin Lead Lead Free AP2302M AP2302M-E1 2302M 2302M-E1 Tube AP2302MTR AP2302MTR-E1 2302M 2302M-E1 Tape & Reel AP2302D AP2302D-E1 AP2302D AP2302D-E1 Tube AP2302DTR AP2302DTR-E1 AP2302D AP2302D-E1 Tape & Reel AP2302S5 AP2302S5-E1 AP2302S5 AP2302S5-E1 Tube AP2302S5TR AP2302S5TR-E1 AP2302S5 AP2302S5-E1 Tape & Reel 0 to 125oC TO-2525L 0 to 125oC TO-2635L 0 to 125oC BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 3 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Absolute Maximum Ratings (Note 1) Parameter Symbol Value Unit Supply Voltage for Internal Circuit VCNTL 7 V PD Internally Limited W ESD 2 KV TJ 150 oC TSTG -65 to 150 oC TLEAD 260 oC Power Dissipation ESD (Human Body Model) Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10sec) θJA Package Thermal Resistance (Free Air) SOIC-8 160 TO-252-5L 130 TO-263-5L 90 oC/W Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device reliability. Recommended Operating Conditions Parameter Symbol Min VCNTL (Note 2, 3) Supply Voltage for Internal Circuit Typ Max Unit 3.3 6 V VCNTL V 125 oC 2.5 DDR I VIN Power Input 1.6 DDR II 1.8 TJ Junction Temperature 0 Note 2: Keep VCNTL ≥ VIN in power on and power off sequences. Note 3: For safe operation, VCNTL MUST be tied to 3.3V rather than 5V. Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 4 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Electrical Characteristics (TJ=25oC, VIN=2.5V, VCNTL=3.3V, VREFEN=1.25V, COUT=10µF (Ceramic), unless otherwise specified.) Parameter Symbol Output Offset Voltage VOS DDR I Load Regulation DDR II Quiescent Current of VCNTL Leakage Current in Shutdown Mode ∆VOUT/ VOUT IQ ISHDN Conditions Min Typ Max Unit -20 0 20 mV IL=0 to 1.5A 0.8 2 IL=0 to -1.5A 0.8 2 IL=0 to 1.5A 1.2 3 IL=0 to -1.5A 1.2 3 IL=0A (Note 4) % No Load 3 5 mA VREFEN<0.2V, RL=180Ω 3 6 µA Protection Current Limit ILIMIT Thermal Shutdown Temperature TSHDN 3 3.3V≤VCNTL≤5V Thermal Shutdown Hysteresis A 150 oC 50 oC Shutdown Function Shutdown Threshold Trigger Output=High 0.8 Output=Low 0.2 V Note 4: VOS is the voltage measurement defined as VOUT subtracted from VREFEN. Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 5 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Typical Performance Characteristics 6 Sinking Current (A) Sourcing Current (A) 6 4 VCNTL=3.3V 2 -40 -20 0 20 40 60 4 VCNTL=3.3V VIN=2.5V VIN=2.5V VOUT=1.25V VOUT=1.25V 80 100 2 -40 120 -20 0 o 60 80 100 120 Figure 5. Sinking Current vs. Junction Temperature 650 Threshold Voltage (mV) 650 Threshold Voltage (mV) 40 Junction Temperature ( C) Figure 4. Sourcing Current vs. Junction Temperature 600 550 VCNTL=3.3V VIN=2.5V 500 -40 20 o Junction Temperature ( C) -20 0 20 40 60 80 100 600 550 VCNTL=5.0V VIN=2.5V 500 120 -40 o Junction Temperature ( C) -20 0 20 40 60 80 100 120 o Junction Temperature ( C) Figure 6. Threshold Voltage vs. Junction Temperature Figure 7. Threshold Voltage vs. Junction Temperature Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 6 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 40 20 20 Output Transient Voltage (mV) 40 0 -20 0 -20 3 3 1 1 Output Current (A) Output Current (A) Output Transient Voltage (mV) Typical Performance Characteristics (Continued) -1 -3 -5 -1 -3 -5 Time (µs) Time (µs) Figure 9. 1.25VTT at 3A Transient Response (Conditions: VIN=2.5V, VCNTL=3.3V, COUT=10µF) Figure 8. 0.9VTT at 3A Transient Response (Conditions: VIN=2.5V, VCNTL=3.3V, COUT=10µF) 0.30 0.30 VIN=0.9V VIN=0.85V 0.28 VIN=0.85V VIN=0.8V VIN=0.8V 0.26 RDS(ON) (Ω) 0.26 RDS(ON)(Ω) VIN=0.9V 0.28 0.24 0.22 0.24 0.22 0.20 0.20 VCNTL=3.3V 0.18 VREFEN=1.0V 0.16 0.16 25 50 75 100 VCNTL=5.0V 0.18 VREFEN=1.0V 25 125 o Junction Temperature ( C) 50 75 100 125 o Junction Temperature ( C) Figure 10. RDS(on) vs. Junction Temperature Figure 11. RDS(on) vs. Junction Temperature Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 7 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Typical Performance Characteristics (Continued) 350 350 300 2 2 Copper Area (mm ) 300 Copper Area (mm ) Package: TO-252-5L No Heatsink Package: SOIC-8 No Heatsink 250 200 o TC=25 C o o TC=50 C o TC=65 C 200 150 TC=50 C 150 o TC=25 C 250 o TC=65 C 100 100 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 6.0 8.0 7.0 7.5 8.0 8.5 9.0 9.5 10.0 Power Dissipation (W) Power Dissipation (W) Figure 13. Copper Area vs. Power Dissipation Figure 12. Copper Area vs. Power Dissipation 350 6.5 Package: TO-263-5L No Heatsink 2 Copper Area (mm ) 300 o TC=25 C 250 o TC=50 C o TC=65 C 200 150 100 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 Power Dissipation (W) Figure 14. Copper Area vs. Power Dissipation Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 8 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Typical Application VCNTL = 3.3V VIN = 2.5V VIN R1 REFEN EN RTT CCNTL VCNTL AP2302 CIN VOUT GND R2 CSS COUT RDUMMY Figure 15. Typical Application of AP2302 R1=R2=100KΩ, RTT=50Ω / 33Ω / 25Ω RDUMMY=1KΩ, as for VOUT discharge when VIN is not present but VCNTL is present CSS=1µF, CIN=470µF, CCNTL=47µF, COUT=470µF Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 9 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Mechanical Dimensions SOIC-8 Unit: mm(inch) 4.800(0.189) 5.000(0.197) 7° 0.320(0.013) 1.350(0.053) 1.750(0.069) 8° 8° 7° 0.675(0.027) 0.725(0.029) D 5.800(0.228) 1.270(0.050) 6.200(0.244) TYP D 20:1 0.300(0.012) R0.150(0.006) 0.100(0.004) φ 0.800(0.031) 0.200(0.008) 0° 8° 1.000(0.039) 3.800(0.150) 4.000(0.157) 1° 5° 0.330(0.013) 0.510(0.020) 0.900(0.035) R0.150(0.006) 0.190(0.007) 0.250(0.010) Jul. 2006 Rev. 1. 2 BCD Semiconductor Manufacturing Limited 10 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Mechanical Dimensions (Continued) TO-252-5L 0.900(0.035) 1.250(0.049) 6.350(0.250) 6.700(0.264) 4.300(0.169) 5.500(0.217) Unit: mm(inch) 2.180(0.086) 2.400(0.094) 4.800(0.189) MIN 0.430(0.017) 0.600(0.023) 5.970(0.235) 6.220(0.245) 9.500(0.374) 10.400(0.410) 4.300(0.169) 5.400(0.213) 0.000(0.000) 0.250(0.010) 2.540(0.100)BSC 5.080(0.200) BSC 0.450(0.018) 0.700(0.028) 0.430(0.017) 0.600(0.023) 1.400(0.055) 1.780(0.070) Jul. 2006 Rev. 1. 2 2.550(0.100) 3.200(0.126) BCD Semiconductor Manufacturing Limited 11 Preliminary Datasheet 3A DDR TERMINATION REGULATOR AP2302 Mechanical Dimensions (Continued) TO-263-5L 4.470 (0.176) 4.670 (0.184) 9.880 (0.389) 10.180 (0.401) 1.170 (0.046) 1.370 (0.054) 5.600 (0.220) REF 15.140 (0.596) 15.540 (0.612) 1.560 (0.061) 1.760 (0.069) Unit: mm(inch) 8.200 (0.323) 8.600 (0.339) 0.020(0.001) 0.250(0.010) 5.080 (0.200) 5.480 (0.216) 1.700 (0.067) TYP 6.700 (0.264) 6.900 (0.272) 0.710 (0.028) 0.910 (0.036) Jul. 2006 Rev. 1. 2 0.310 (0.012) 0.530 (0.021) 2.340 (0.092) 2.740 (0.108) BCD Semiconductor Manufacturing Limited 12 http://www.bcdsemi.com IMPORTANT NOTICE BCD Semiconductor Manufacturing Limited reserves the right to make changes without further notice to any products or specifications herein. BCD Semiconductor Manufacturing Limited does not assume any responsibility for use of any its products for any particular purpose, nor does BCD Semiconductor Manufacturing Limited assume any liability arising out of the application or use of any its products or circuits. BCD Semiconductor Manufacturing Limited does not convey any license under its patent rights or other rights nor the rights of others. MAIN SITE BCD Semiconductor Manufacturing Limited BCD Semiconductor Manufacturing Limited - Wafer Fab Shanghai SIM-BCD Semiconductor Manufacturing Limited 800, Yi Shan Road, Shanghai 200233, China Tel: +86-21-6485 1491, Fax: +86-21-5450 0008 - IC Design Group Advanced Analog Circuits (Shanghai) Corporation 8F, Zone B, 900, Yi Shan Road, Shanghai 200233, China Tel: +86-21-6495 9539, Fax: +86-21-6485 9673 REGIONAL SALES OFFICE Shenzhen Office Shanghai SIM-BCD Semiconductor Manufacturing Co., Ltd. Shenzhen Office Advanced Analog Circuits (Shanghai) Corporation Shenzhen Office 27B, Tower C, 2070, Middle Shen Nan Road, Shenzhen 518031, China Tel: +86-755-8368 3987, Fax: +86-755-8368 3166 Taiwan Office BCD Semiconductor (Taiwan) Company Limited 4F, 298-1, Rui Guang Road, Nei-Hu District, Taipei, Taiwan Tel: +886-2-2656 2808, Fax: +886-2-2656 2806 USA Office BCD Semiconductor Corporation 3170 De La Cruz Blvd., Suite 105, Santa Clara, CA 95054-2411, U.S.A Tel: +1-408-988 6388, Fax: +1-408-988 6386