APL5320 Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator Features General Description • Wide Operating Voltage: 2.5~6V • Low Dropout Voltage: 290mV @ 3V/300mA The APL5320 is a P-channel low dropout linear regulator which needs only one input voltage from 2.5 to 6V, and • Fixed Output Voltages: 1.2~3.7V with Step 100mV, delivers current up to 300mA to set output voltage. It also can work with low ESR ceramic capacitors and is ideal for and 2.85V, 4.75V using in the battery-powered applications such as notebook computers and cellular phones. Typical dropout volt- • Guaranteed 300mA Output Current • High PSRR: 70dB • Current-Limit Protection • Controlled Short-Circuit Current: 50mA • Over-Temperature Protection • Stable with 1µF Capacitor for Any Load • Excellent Load/Line Transient • SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5, age is only 290mV at 300mA loading. The APL5320 provides several versions of fixed output voltages ranging from 1.2 to 3.7V with step 100mV and 2.85V, 4.75V. Current-limit with current foldback and thermal shutdown functions protects the device against current over-loads and over-temperature. The APL5320 is available in SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5, VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages. VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages • Lead Free and Green Devices Available Pin Configuration (RoHS Compliant) Applications VIN 1 GND 2 SHDN 3 • Cellular Phones • Portable and Battery-Powered Equipments • Laptops, Palmtops, Notebook Computers • Wireless LANs • Portable Information Appliances • GPSes 5 VOUT 4 NC SOT23-5/TSOT-23-5/SC-70-5 (Top View) GND 1 3 VIN VOUT 2 SOT-23-3 (Top View) Simplified Application Circuit VOUT 1 VIN VIN VOUT VOUT GND 2 SHDN GND 4 VIN 3 SHDN VTDFN1.2x1.6-4 (Top View) Enable SHDN 1 NC 2 VIN 3 6 GND 5 NC 4 VOUT TDFN1.6x1.6-6 (Top View) = Exposed Pad (connected to ground plane for better heat dissipation) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 1 www.anpec.com.tw APL5320 Ordering and Marking Information APL5320 Package Code B : SOT-23-5 BT : TSOT-23-5 A : SOT-23-3 S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Voltage Code 12 : 1.2V 36 : 3.6V Assembly Material G : Halogen and Lead Free Device Assembly Material Handling Code Temperature Range Package Code Voltage Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). SOT-23-5 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL5320-12B APL5320-16B APL5320-20B APL5320-24B APL5320-28B APL5320-32B APL5320-36B 205X 20AX 20EX 20IX 20MX 20QX 20gX APL5320-13B APL5320-17B APL5320-21B APL5320-25B APL5320-29B APL5320-33B APL5320-285B 207X 20BX 20FX 20JX 20NX 20RX 20dX APL5320-14B APL5320-18B APL5320-22B APL5320-26B APL5320-30B APL5320-34B APL5320-37B 208X 20CX 20GX 20KX 20OX 20SX 206X APL5320-15B APL5320-19B APL5320-23B APL5320-27B APL5320-31B APL5320-35B APL5320-475B 209X 20DX 20HX 20LX 20PX 20TX 204X Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL5320-12BT APL5320-16BT APL5320-20BT APL5320-24BT APL5320-28BT APL5320-32BT APL5320-36BT 205X 20AX 20EX 20IX 20MX 20QX 20gX APL5320-13BT APL5320-17BT APL5320-21BT APL5320-25BT APL5320-29BT APL5320-33BT APL5320-285BT 207X 20BX 20FX 20JX 20NX 20RX 20dX APL5320-14BT APL5320-18BT APL5320-22BT APL5320-26BT APL5320-30BT APL5320-34BT APL5320-37BT 208X 20CX 20GX 20KX 20OX 20SX 206X APL5320-15BT APL5320-19BT APL5320-23BT APL5320-27BT APL5320-31BT APL5320-35BT APL5320-475BT 209X 20DX 20HX 20LX 20PX 20TX 204X Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL5320-12A APL5320-16A APL5320-20A APL5320-24A APL5320-28A APL5320-32A APL5320-36A 205X 20AX 20EX 20IX 20MX 20QX 20gX APL5320-13A APL5320-17A APL5320-21A APL5320-25A APL5320-29A APL5320-33A APL5320-285A 207X 20BX 20FX 20JX 20NX 20RX 20dX APL5320-14A APL5320-18A APL5320-22A APL5320-26A APL5320-30A APL5320-34A APL5320-37A 208X 20CX 20GX 20KX 20OX 20SX 206X APL5320-15A APL5320-19A APL5320-23A APL5320-27A APL5320-31A APL5320-35A APL5320-475A 209X 20DX 20HX 20LX 20PX 20TX 204X Note: X - Code. TSOT-23-5 Note: X - Code. SOT-23-3 Note: X - Code. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 2 www.anpec.com.tw APL5320 Ordering and Marking Information (Cont.) TDFN1.6x1.6-6 Product Name APL5320-12QB APL5320-16QB APL5320-20QB APL5320-24QB APL5320-28QB APL5320-32QB APL5320-36QB Marking 205 X 20A X 20E X 20I X 20M X 20Q X 20g X Product Name APL5320-13QB APL5320-17QB APL5320-21QB APL5320-25QB APL5320-29QB APL5320-33QB APL5320-285QB Marking Product Name 207 X 20B X 20F X 20J X 20N X 20R X 20d X APL5320-14QB APL5320-18QB APL5320-22QB APL5320-26QB APL5320-30QB APL5320-34QB APL5320-37QB Marking 208 X 20C X 20G X 20K X 20O X 20S X 206 X Product Name APL5320-15QB APL5320-19QB APL5320-23QB APL5320-27QB APL5320-31QB APL5320-35QB APL5320-475QB Marking 209 X 20D X 20H X 20L X 20P X 20T X 204 X Note: X - Code. SC-70-5 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL5320-12S5 205 AP5320-13S5 207 APL5320-14S5 208 APL5320-15S5 209 APL5320-16S5 20A APL5320-17S5 20B APL5320-18S5 20C APL5320-19S5 20D APL5320-20S5 20E APL5320-21S5 20F APL5320-22S5 20G APL5320-23S5 20H APL5320-24S5 20I APL5320-25S5 20J APL5320-26S5 20K APL5320-27S5 20L APL5320-28S5 20M APL5320-29S5 20N APL5320-30S5 20O APL5320-31S5 20P APL5320-32S5 20Q APL5320-33S5 20R APL5320-34S5 20S APL5320-35S5 20T APL5320-36S5 20g APL5320-285S5 20d APL5320-37S5 206 APL5320-475S5 204 Marking Product Name Marking Product Name Marking Product Name Marking VTDFN1.2x1.6-4 Product Name APL5320-12QF APL5320-16QF APL5320-20QF APL5320-24QF APL5320-28QF APL5320-32QF APL5320-36QF 05 X 0A X 0E X 0I X 0M X 0Q X 0g X APL5320-13QF APL5320-17QF APL5320-21QF APL5320-25QF APL5320-29QF APL5320-33QF APL5320-285QF 07 X 0B X 0F X 0J X 0N X 0R X 0d X APL5320-14QF APL5320-18QF APL5320-22QF APL5320-26QF APL5320-30QF APL5320-34QF APL5320-37QF 08 X 0C X 0G X 0K X 0O X 0S X 06 X APL5320-15QF APL5320-19QF APL5320-23QF APL5320-27QF APL5320-31QF APL5320-35QF APL5320-475QF 09 X 0D X 0H X 0L X 0P X 0T X 04 X Note : X - Code. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 3 www.anpec.com.tw APL5320 Absolute Maximum Ratings Rating Unit VIN to GND Voltage Parameter -0.3 ~ 6.5 V VOUT to GND Voltage -0.3 ~ 6.5 V SHDN to GND Voltage -0.3 ~ 6.5 Maximum Junction Temperature -40 ~ 150 o -65 ~ 150 o 260 o Symbol VIN VOUT VSHDN TJ TSTG TSDR (Note 1) Storage Temperature Maximum Lead Soldering Temperature, 10 Seconds V C C C Note 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Parameter Junction-to-Ambient Resistance in Free Air Typical Value Unit (Note 2) SOT-23-5 240 TSOT-23-5 250 SOT-23-3 240 SC-70-5 325 TDFN1.6x1.6-6 165 VTDFN1.2x1.6-4 100 θJA o C/W Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 3) Symbol VIN VSHDN IOUT Parameter Range Unit VIN Input Voltage 2.5 ~ 6 V SHDN Input Voltage 2.5 ~ 6 V VOUT Output Current 0 ~300 mA VOUT Output Voltage COUT Output Capacitor TA TJ Fixed Voltage µF 1~22 Ambient Temperature Junction Temperature -40 ~ 85 o C -40 ~ 125 o C Note 3 : Refer to the typical application circuit. Electrical Characteristics Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1µF and TA=-40~85 oC. Typical values are at TA=25oC. Symbol Parameter APL5320 Test Conditions Unit Min. Typ. Max. 1.9 2.2 2.4 V UNDER-VOLTAGE LOCKAGE (UVLO) AND SUPPLY CURRENT VIN UVLO Threshold Voltage VIN rising, TA=-40~85oC VIN UVLO Hysteresis IQ IQSHDN Quiescent Current Shut Down Supply Current Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 - 0.1 - V IOUT=0mA, VSHDN=5V - 40 60 µA IOUT=300mA VSHDN=5V - 40 60 µA VSHDN=0V, VIN= VOUT+1V - - 1 µA 4 www.anpec.com.tw APL5320 Electrical Characteristics (Cont.) Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1µF and TA=-40~85 oC. Typical values are at TA=25oC. Symbol Parameter APL5320 Test Conditions Unit Min. Typ. Max. IOUT=1mA, TA=25 oC -2 - 2 % IOUT=1mA to 300mA, TA=-40~85oC -3 - 3 % REGLINE Line Regulation ΔVOUT%/ΔVIN, VOUT+0.3V<VIN<6V, IOUT=1mA - - 0.2 %/V REGLOAD Load Regulation ΔVOUT%, VIN= VOUT+1V, 0mA<IOUT<300mA - - 0.6 % VOUT=1.5V, IOUT=300mA - 0.52 0.68 V VOUT=2V, IOUT=300mA - 0.43 0.56 V VOUT=3V, IOUT=300mA - 0.29 0.38 V f=1kHz - 70 - dB f=10kHz - 63 - dB f=100kHz OUTPUT VOLTAGE Output Voltage Accuracy VDROP Dropout Voltage OUTPUT VOLTAGE PSRR Ripple Rejection COUT=1µF, IOUT=50mA - 35 - dB Output Noise f=10Hz to 100kHz, COUT=10µF, IOUT = 1mA - 100 - µVRMS VOUT Discharge Resistance VSHDN=0V - 0.7 - kΩ SHUT DOWN VSHDN ISHDN High Threshold Voltage VIN=2.5 to 6V 1.5 - - V Low Threshold Voltage VIN=2.5 to 6V - - 0.4 V SHDN Input Current VSHDN=5V - 0.2 - µA 330 450 750 mA PROTECTIONS ILIMIT ISHORT tSS TOTP Current-Limit Threshold Short-Circuit Current VOUT =0V - 50 - mA Soft-Start VOUT rising from 0 to 90%, RLOAD=50Ω - 60 - µs Over-Temperature Threshold TJ rising - 160 - o - o Over-Temperature Hysteresis Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 - 5 40 C C www.anpec.com.tw APL5320 Typical Operating Characteristics Quiescent Current vs. Temperature 350 42 300 41 Quiescent Current (µA) Quiescent Current (µA) Quiescent Current vs. Supply Voltage 250 200 150 100 50 0 APL5320-12, VIN=VEN=4.2V 40 39 38 37 36 35 0 1 2 3 4 Supply Voltage (V) 5 34 -40 -25 6 PSRR vs. Frequency 0 25 50 75 Temperature (oC) 100 125 Dropout Voltage vs. Output Current 0 400 APL5320-12, VIN=4V, COUT=1µF, IOUT=50mA APL5320-30, COUT=1µF 350 Dropout Voltage (mV) PSRR (dB) -20 -40 -60 -80 300 TJ=125oC 250 TJ=25oC 200 150 TJ=-40oC 100 50 -100 100 1k 10k 100k Frequency (Hz) 0 1M 100 300 200 Output Current (mA) Output Noise Current-Limit Threshold vs. Input Voltage 700 200 APL5320-12, IOUT=50mA, VIN=VEN=4.2V(Battery) 650 100 Current-Limit (mA) Output Noise (µV) 0 0 -100 600 550 500 450 -200 0 20 40 60 80 400 2.5 100 Time (ms) Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 6 3 3.5 4 4.5 5 Input Voltage (V) 5.5 6 www.anpec.com.tw APL5320 Typical Operating Characteristics (Cont.) Current-Limit Threshold vs. Temperature Quiescent Current vs. Output Current 700 45 Quiescent Current (µA) Current-Limit (mA) 650 600 550 500 450 400 APL5320-12, COUT=1µF, VIN=VEN=4.2V 44.5 44 43.5 43 42.5 350 300 -40 -25 0 25 50 75 Temperature (oC) 100 42 125 0 50 100 150 200 250 300 Output Current (mA) SHDN Pin Threshold Voltage vs. Supply Voltage 1.5 1.4 SHDN Rising Threshold EN Pin Threshold (V) 1.3 1.2 1.1 1.0 0.9 SHDN Falling Threshold 0.8 0.7 0.6 0.5 0.4 2.5 3 3.5 4 4.5 5 Supply Voltage (V) Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 5.5 6 7 www.anpec.com.tw APL5320 Operating Waveforms The test condition is VIN=4.2V, TA= 25oC unless otherwise specified. Load Transient Response Load Transient Response VOUT VOUT 1 1 I OUT IOUT 2 2 VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA to 300mA to 10mA (Rise/Fall time=1µs) VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA to 150mA to 10mA (Rise/Fall time=1µs) CH1: VOUT, 50mV/Div, DC, Offset=1.2V CH2: IOUT, 200mA/Div, DC CH1: VOUT, 50mV/Div, DC, Offset=1.2V CH2: IOUT, 100mA/Div, DC TIME: 20µs/Div TIME: 20µs/Div Line Transient Response Load Transient Response 1 VIN VOUT 1 V OUT 2 IOUT 2 VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA to 50mA to 10mA (Rise/Fall time=1µs) VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs), VOUT=1.2V, CIN =COUT =1µF, IOUT =100mA CH1: VOUT, 20mV/Div, DC, Offset=1.2V CH2: IOUT, 50mA/Div, DC CH1: VIN, 500mV/Div, DC, Offset=3.8V CH2: VOUT, 20mV/Div, DC, Offset=1.2V TIME: 20µs/Div TIME: 20µs/Div Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 8 www.anpec.com.tw APL5320 Operating Waveforms (Cont.) The test condition is VIN=4.2V, TA= 25oC unless otherwise specified. Line Transient Response Line Transient Response VIN VIN 1 1 VOUT VOUT 2 2 VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs), VOUT=1.2V, CIN =COUT =1µF, IOUT =50mA VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs), VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA CH1: VIN, 500mV/Div, DC, Offset=3.8V CH2: VOUT, 20mV/Div, DC, Offset=1.2V CH1: VIN, 500mV/Div, DC, Offset=3.8V CH2: VOUT, 20mV/Div, DC, Offset=1.2V TIME: 20µs/Div TIME: 20µs/Div Exiting Shutdown Entering Shutdown VSHDN VSHDN 1 1 V OUT VOUT 2 2 VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA CH1: VSHDN, 2V/Div, DC CH2: VOUT, 500mV/Div, DC CH1: VSHDN, 2V/Div, DC CH2: VOUT, 500mV/Div, DC TIME: 20µs/Div TIME: 10µs/Div Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 9 www.anpec.com.tw APL5320 Pin Description PIN NO. SOT-23-5/ TSOT-23-5/ SOT-23-3 SC-70-5 TDFN 1.6x1.6-6 VTDFN 1.2x1.6-4 FUNCTION NAME 1 3 3 4 VIN Voltage Supply Input Pin. 2 1 6 2 GND Ground. 3 - 1 3 SHDN 4 - 2, 5 - NC 5 2 4 1 VOUT Shut Down Control Pin. Logic high: enable; logic low: shutdown. This pin can not be left floating. NC Pin. Regulator Output Pin. Block Diagram UVLO & Shutdown Logic SHDN VIN + CurrentLimit Thermal Shutdown Foldback Current-Limit VOUT VREF GND Typical Application Circuit APL5320 VIN VIN CIN 1µF VOUT VOUT SHDN GND COUT 1µF Enable Shutdown Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 10 www.anpec.com.tw APL5320 Function Description Internal Soft-Start An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 60µs. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of APL5320. When the junction temperature exceeds +160oC, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 40oC.The thermal shutdown is designed with a 40oC hysteresis to lower the average junction temperature during continuous thermal overload conditions, extending lifetime of the device. For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 125oC. Current-Limit with Current Foldback The APL5320 monitors the current via the output PMOS and limits the maximum current. When the output current reaches the current-limit threshold, current-limit with current foldback circuit starts to work to prevent load and APL5320 from damages during overload or short-circuit conditions. Typical foldback current is about 50mA. Shutdown Control The APL5320 has an active-low shutdown function. Forcing SHDN high (>1.5V) enables the VOUT; forcing SHDN low (<0.4V) disables the VOUT. The SHDN can not be left floating. If it is not used, connect it to VIN for normal operation. Under-Voltage Lock Out (UVLO) The APL5320 monitors the input voltage to prevent wrong logic control. The UVLO function initiates a soft-start process after input voltage exceeds its rising UVLO threshold during power on. The UVLO function also shuts off the output when the input voltage falls below it’s falling threshold. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 11 www.anpec.com.tw APL5320 Application Information Input capacitor Operation Region and Power Dissipation The APL5320 requires proper input capacitors to supply surge current during stepping load transients to prevent The APL5320 maximum power dissipation depends on the thermal resistance and temperature difference be- the input rail from dropping. Because the parasitic inductor from the voltage sources or other bulk capacitors to tween the die junction and ambient air. The TDFN1.6x1.6-6 package power dissipation PD across the device is: the VIN limit the slew rate of the surge current, place the Input capacitors near VIN as close as possible. Input PD = (TJ - TA) / θJA where (TJ - TA) is the temperature difference between the capacitors should be larger than 1µF and a minimum ceramic capacitor of 1µF is necessary. junction and ambient air. θJA is the thermal resistance between Junction and ambient air. Assuming the TA=25oC Output Capacitor and maximum TJ=160oC (typical thermal limit threshold), the maximum power dissipation is calculated as: The APL5320 needs a proper output capacitor to maintain circuit stability and improve transient response over- PD(max)=(160-25)/165=0.81(W) For normal operation, do not exceed the maximum junc- temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger tion temperature rating of TJ=125oC. The calculated power dissipation should be less than: than 1µF. With X5R and X7R dielectrics, 1µF is sufficient at all operating temperatures. Large output capacitor PD=(125-25)/165=0.6(W) The GND provides an electrical connection to the ground value can reduce noise and improve load-transient response and PSRR, Figure 1 shows the curves of allow- and channels heat away. Connect the GND to the ground by using a large pad or a ground plane. able ESR range as the function of load current for various output capacitor values. Layout Consideration Figure 2 illustrates the layout. Below is a checklist for Region of Stable COUT ESR vs. Output Current your layout: 1. Please place the input capacitors close to the VIN. Region of Stable COUT ESR (Ω) 10 APL5320-12 VIN=VEN=4.2V CIN=COUT=1µF/X7R 2. Ceramic capacitors for load must be placed near the load as close as possible. 1 3. To place APL5320 and output capacitors near the load is good for performance. Unstable Range 0.1 4. Large current paths, the bold lines in figure 2, must have wide tracks. Stable Range VIN VIN ON SHDN VOUT GND 0.01 Simulation Verify 0.001 0 50 100 150 200 250 VOUT OFF 300 Output Current (mA) Figure2. Large Current Paths Shown as Bold Lines Figure1. Stable COUT ESR Range Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 12 www.anpec.com.tw APL5320 Application Information(Cont.) Recommended Minimum Footprint 1.30 0.95 1.17 1.27 2.54 2.06 1.90 0.65 0.5 0.3 Unit: mm Unit: mm SOT-23-5/TSOT-23-5 SC-70-5 Thermal Via Φ0.30mm Thermal Via Φ0.30mm 0.6 2.0 0.45 1.0 0.5 0.8 0.45 1.6 0.7 2.1 0.25 0.35 0.6 Unit: mm Unit:mm VTDFN1.2x1.6-4 TDFN1.6x1.6-6 Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 13 www.anpec.com.tw APL5320 Package Information SOT-23-5 D e E E1 SEE VIEW A b c 0.25 A L 0 GAUGE PLANE SEATING PLANE A1 A2 e1 VIEW A S Y M B O L SOT-23-5 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 1.45 0.057 A1 0.00 0.15 0.000 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 0.118 0.071 E 2.60 3.00 0.102 E1 1.40 1.80 0.055 e 0.95 BSC 0.037 BSC e1 1.90 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.006 0.024 8° Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 14 www.anpec.com.tw APL5320 Package Information TSOT-23-5 D e E E1 SEE VIEW A c b 0.25 A GAUGE PLANE SEATING PLANE A1 A2 e1 L VIEW A S Y M B O L TSOT-23-5 MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 1.00 0.028 0.039 A1 0.01 0.10 0.000 0.004 A2 0.70 0.90 0.028 0.035 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 e 0.95 BSC e1 0.071 0.037 BSC 1.90BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : 1. Followed from JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 15 www.anpec.com.tw APL5320 Package Information SC-70-5 D e E E1 SEE VIEW A c b 0.15 A GAUGE PLANE SEATING PLANE A1 A2 e1 L VIEW A S Y M B O L SC-70-5 INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.80 1.10 0.031 0.043 A1 0.00 0.10 0.000 0.004 A2 0.80 1.00 0.031 0.040 b 0.15 0.30 0.006 0.012 c 0.08 0.25 0.003 0.010 D 1.90 2.20 0.075 0.087 E 2.00 2.40 0.079 0.095 E1 1.15 1.35 0.045 0.053 e e1 L 0 0.026 BSC 0.65 BSC 1.30 BSC 0.15 0o 0.051 BSC 0.006 0.45 8o 0o 0.018 8o Note : 1. Followed from JEDEC MO-223 AB. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 16 www.anpec.com.tw APL5320 Package Information SOT-23-3 D e E E1 SEE VIEW A c b 0.25 A L GAUGE PLANE SEATING PLANE 0 A1 A2 e1 VIEW A S Y M B O L SOT-23-3 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 1.45 0.057 A1 0.00 0.15 0.000 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC e1 1.90 BSC 0.006 0.037 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 17 www.anpec.com.tw APL5320 Package Information TDFN1.6x1.6-6 D E A b Pin 1 A1 D2 E2 A3 L K Pin 1 Corner e S Y M B O L MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 0.20 0.30 0.008 0.012 D 1.55 1.65 0.061 0.065 D2 0.95 1.05 0.037 0.041 TDFN1.6x1.6-6 MILLIMETERS A3 b INCHES 0.20 REF 0.008 REF E 1.55 1.65 0.061 0.065 E2 0.55 0.65 0.022 0.026 e 0.50 BSC 0.020 BSC K 0.20 - 0.008 - L 0.19 0.29 0.007 0.011 Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 18 www.anpec.com.tw APL5320 Package Information VTDFN1.2x1.6-4 A E2 e b E D Pin 1 Cirner D2 S Y M B O L K L VTDFN1.2x1.6-4 MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.50 0.60 0.020 0.024 b 0.25 0.35 0.010 0.014 D 1.55 1.65 0.061 0.065 D2 0.65 0.75 0.026 0.030 E 1.15 1.25 0.045 0.049 E2 0.95 1.05 0.037 0.041 0.30 0.004 e 0.60 BSC L 0.10 K 0.20 Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 0.024 BSC 0.012 0.008 19 www.anpec.com.tw APL5320 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application SOT-23-5 Application TSOT-23-5 Application SOT-23-3 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 4.0±0.10 4.0±0.10 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 4.0±0.10 4.0±0.10 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 4.0±0.10 4.0±0.10 (mm) Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 20 www.anpec.com.tw APL5320 Carrier Tape & Reel Dimensions (Cont.) Application A H 178.0± 2.00 50 MIN. P0 P1 SC-70-5 T1 C 8.4+2.00 13.0+0.50 -0.00 -0.20 d D W E1 F 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.50±0.05 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.00 MIN. 0.6+0.00 -0.40 2.40±0.20 2.40±0.20 1.20±0.20 4.0±0.10 4.0±0.10 A H T1 C d D W E1 F 178.0± 2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 1.70±0.20 1.70±0.20 0.90±0.20 Application TDFN1.6x1.6-6 4.0±0.10 4.0±0.10 A H T1 C d D W E1 F 178.0± 2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.20 1.75±0.10 3.50±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.4 1.4 MIN 1.8 MIN 0.75±0.20 Application VTDFN1.2x1.6-4 (mm) Devices Per Unit Package Type Unit Quantity SOT-23-5 Tape & Reel 3000 TSOT-23-5 Tape & Reel 3000 SOT-23-3 Tape & Reel 3000 SC-70-5 Tape & Reel 3000 TDFN1.6x1.6-6 Tape & Reel 3000 VTDFN1.2x1.6-4 Tape & Reel 3000 Taping Direction Information (T)SOT-23-5 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 21 www.anpec.com.tw APL5320 Taping Direction Information (Cont.) SOT-23-3 USER DIRECTION OF FEED SC-70-5 USER DIRECTION OF FEED TDFN1.6x1.6-6 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 22 www.anpec.com.tw APL5320 Taping Direction Information (Cont.) VTDFN1.2x1.6-4 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 23 www.anpec.com.tw APL5320 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3 °C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 24 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APL5320 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.9 - Mar., 2012 25 www.anpec.com.tw