Microsemi APT7F100B N-channel fredfet Datasheet

APT7F100B
APT7F100S
1000V, 7A, 2.0Ω Max
N-Channel FREDFET
POWER MOS 8® is a high speed, high voltage N-channel switch-mode power
MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced
trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a
greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching
loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control di/dt during switching, resulting in low EMI and reliable paralleling, even
when switching at very high frequency.
TO
-2
47
D3PAK
APT7F100B
APT7F100S
Single die FREDFET
D
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
7
Continuous Drain Current @ TC = 100°C
5
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
415
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
4
A
1
27
Thermal and Mechanical Characteristics
Min
Characteristic
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
290
RθJC
Junction to Case Thermal Resistance
0.43
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
Mounting Torque ( TO-247 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
0.15
-55
150
300
°C/W
°C
0.22
oz
6.2
g
10
in·lbf
1.1
N·m
050-8166 Rev B 05-2009
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Test Conditions
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
∆VBR(DSS)/∆TJ
RDS(on)
VGS(th)
∆VGS(th)/∆TJ
Gate-Source Threshold Voltage
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
gfs
VGS = VDS, ID = 0.5mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
VGS = 10V, ID = 4A
3
Parameter
VDS = 1000V
Ciss
TJ = 25°C unless otherwise specified
Coss
Output Capacitance
f = 1MHz
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Total Gate Charge
VGS = 0 to 10V, ID = 4A,
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 670V, ID = 4A
td(off)
tf
Typ
Max
2.0
5
mV/°C
250
1000
±100
Max
7.5
1800
25
158
65
33
58
10
27
24
26
77
22
Unit
V
V/°C
Ω
V
µA
nA
Unit
S
pF
VGS = 0V, VDS = 0V to 670V
Qgs
tr
VGS = 0V, VDS = 25V
Co(cr)
Qg
Min
Test Conditions
VDS = 50V, ID = 4A
Input Capacitance
Reverse Transfer Capacitance
TJ = 125°C
VGS = ±30V
Forward Transconductance
Crss
TJ = 25°C
VGS = 0V
Typ
1000
1.15
1.76
2.5
4
-10
Reference to 25°C, ID = 250µA
Breakdown Voltage Temperature Coefficient
Drain-Source On Resistance
Min
VGS = 0V, ID = 250µA
APT7F100B_S
Turn-Off Delay Time
VDS = 500V
RG = 10Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
Min
D
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
S
TJ = 25°C
TJ = 125°C
diSD/dt = 100A/µs
VDD = 100V
Max
7
27
133
209
.56
1.2
7
9
1.3
152
251
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
ISD ≤ 4A, di/dt ≤1000A/µs, VDD = 500V, TJ = 125°C
Unit
A
G
ISD = 4A, TJ = 25°C, VGS = 0V
ISD = 4A 3
Typ
V
ns
µC
A
25
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 53mH, RG = 25Ω, IAS = 4A.
050-8166 Rev B 05-2009
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
20
V
GS
= 10V
J
V
16
TJ = -55°C
14
12
10
TJ = 25°C
8
6
4
TJ = 125°C
2
5
4
5V
3
2
1
TJ = 150°C
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
4.5V
0
NORMALIZED TO
VGS = 10V @ 4A
2.5
1.5
1.0
20
15
TJ = -55°C
TJ = 25°C
10
TJ = 125°C
0
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
C, CAPACITANCE (pF)
TJ = 25°C
6
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
Ciss
1,000
TJ = -55°C
8
0
3,000
TJ = 125°C
4
100
Coss
10
2
0
Crss
0
16
1
2
3
4
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
200
400
600
800
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
12
VDS = 200V
10
VDS = 500V
8
6
VDS = 800V
4
2
0
0
30
ID = 4A
14
0
1
5
10 20
30 40 50 60
70 80
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
5
0.5
10
VGS, GATE-TO-SOURCE VOLTAGE (V)
VDS> ID(ON) x RDS(ON) MAX.
25
2.0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
30
ID, DRAIN CURRENT (A)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
= 6, 7, 8 & 9V
GS
6
25
20
TJ = 25°C
15
TJ = 150°C
10
5
0
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
050-8166 Rev B 05-2009
0
T = 125°C
7
ID, DRIAN CURRENT (A)
ID, DRAIN CURRENT (A)
18
APT7F100B_S
8
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
10
13µs
100µs
1
0.1
APT7F100B_S
50
50
1ms
Rds(on)
10ms
Rds(on)
13µs
100µs
1
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
DC line
0.1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
1ms
10ms
100ms
DC line
TJ = 150°C
TC = 25°C
100ms
TJ = 125°C
TC = 75°C
1
IDM
10
C
1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
0.40
D = 0.9
0.7
0.30
Note:
0.5
0.20
PDM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.50
t1
0.3
t2
0.10
0
t1 = Pulse Duration
SINGLE PULSE
t
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
0.1
0.05
10-5
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
D3PAK Package Outline
TO-247 (B) Package Outline
15.49 (.610)
16.26 (.640)
6.15 (.242) BSC
5.38 (.212)
6.20 (.244)
Drain
(Heat Sink)
e1 100% Sn Plated
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05(.632)
Revised
4/18/95
Drain
20.80 (.819)
21.46 (.845)
1.04 (.041)
1.15(.045)
13.79 (.543)
13.99(.551)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
3.50 (.138)
3.81 (.150)
0.46 (.018)
0.56 (.022) {3 Plcs}
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
050-8166 Rev B 05-2009
13.41 (.528)
13.51(.532)
19.81 (.780)
20.32 (.800)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
Gate
Drain
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
1.27 (.050)
1.40 (.055)
1.22 (.048)
1.32 (.052)
1.98 (.078)
2.08 (.082)
5.45 (.215) BSC
{2 Plcs.}
3.81 (.150)
4.06 (.160)
(Base of Lead)
Heat Sink (Drain)
and Leads
are Plated
Source
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
Source
Drain
Gate
Dimensions in Millimeters (Inches)
Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583
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and foreign patents. US and Foreign patents pending. All Rights Reserved.
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