Microsemi APT7F80K N-channel fredfet Datasheet

APT7F80K
800V, 7A, 1.50Ω MAX,TRR ≤ 160nS
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
This 'FREDFET' version has a drain-source (body) diode that has been optimized for
high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft
recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly
reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The
intrinsic gate resistance and capacitance of the poly-silicon gate structure help control
di/dt during switching, resulting in low EMI and reliable paralleling, even when switching
at very high frequency.
D
APT7F80K
Single die FREDFET
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
7
Continuous Drain Current @ TC = 100°C
4.5
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
285
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
4
A
1
25
Thermal and Mechanical Characteristics
Min
Characteristic
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
225
RθJC
Junction to Case Thermal Resistance
0.56
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
Operating and Storage Junction Temperature Range
150
°C
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
300
0.07
oz
1.2
g
10
in·lbf
1.1
N·m
Mounting Torque ( TO-220 Package), 4-40 or M3 screw
MicrosemiWebsite-http://www.microsemi.com
05-2009
TL
Torque
-55
Rev C
TJ,TSTG
°C/W
0.11
050-8139
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
ΔVBR(DSS)/ΔTJ
Breakdown Voltage Temperature Coefficient
RDS(on)
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
ΔVGS(th)/ΔTJ
Min
800
VGS = 10V, ID = 4A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
VDS = 800V
TJ = 25°C
VGS = 0V
TJ = 125°C
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Typ
Max
0.87
1.39
4
-10
1.50
5
250
1000
±100
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
µA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
2.5
VGS = VDS, ID = 0.5mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Test Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 250µA
APT7F80K
Min
Test Conditions
VDS = 50V, ID = 4A
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Typ
6
1335
23
135
Max
Unit
S
pF
65
VGS = 0V, VDS = 0V to 533V
31
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 533V, ID = 4A
tr
td(off)
tf
Turn-Off Delay Time
43
7
22
8
11
33
10
VGS = 0 to 10V, ID = 4A,
VDS = 400V
RG = 10Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
Min
Typ
D
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
A
25
S
TJ = 25°C
TJ = 125°C
TJ = 25°C
VDD = 100V
TJ = 125°C
diSD/dt = 100A/µs
TJ = 25°C
Unit
7
G
ISD = 4A, TJ = 25°C, VGS = 0V
ISD = 4A 3
Max
TJ = 125°C
ISD ≤ 4A, di/dt ≤1000A/µs, VDD = 533V,
TJ = 125°C
140
220
0.45
0.94
7.03
9.82
1.3
160
260
V
ns
µC
A
25
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 35.63mH, RG = 25Ω, IAS = 4A.
050-8139
Rev C
05-2009
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = 4.24E-9/VDS^2 + 5.44E-9/VDS + 2.10E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT7F80K
7
14
V
GS
= 10V
T = 125°C
J
12
TJ = -55°C
= 10, & 15V
GS
V
ID, DRIAN CURRENT (A)
10
TJ = 25°C
8
6
4
TJ = 125°C
2
= 6, & 6.5V
5.5V
GS
5
4
3
5V
2
4.5V
1
TJ = 150°C
0
4V
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
0
Figure 2, Output Characteristics
25
NORMALIZED TO
VDS> ID(ON) x RDS(ON) MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
VGS = 10V @ 4A
2.5
20
ID, DRAIN CURRENT (A)
2.0
1.5
1.0
TJ = 25°C
TJ = 125°C
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
2,000
1,000
TJ = -55°C
Ciss
8
C, CAPACITANCE (pF)
TJ = 25°C
TJ = 125°C
6
4
100
Coss
10
Crss
2
0
1
2
3
4
5
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
0
100 200 300 400 500 600 700 800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
25
16
ID = 4A
14
12
VDS = 160V
10
VDS = 400V
8
6
VDS = 640V
4
2
0
1
6
20
15
TJ = 25°C
TJ = 150°C
10
05-2009
0
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
TJ = -55°C
10
5
0.5
10
VGS, GATE-TO-SOURCE VOLTAGE (V)
15
5
0
0
10
20
30
40
50
60
70
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev C
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
050-8139
ID, DRAIN CURRENT (A)
V
6
APT7F80K
50
IDM
10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
50
13µs
100µs
1
1ms
Rds(on)
10ms
IDM
10
Rds(on)
13µs
100µs
1
100ms
0.1
TJ = 125°C
TC = 75°C
1
1ms
10ms
100ms
DC line
TJ = 150°C
TC = 25°C
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
DC line
0.1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
C
1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
D = 0.9
0.50
0.40
0.7
0.30
0.5
0.20
0.3
Note:
PDM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.60
t2
t1 = Pulse Duration
SINGLE PULSE
0.10
t
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
0.1
0.05
0
10-5
t1
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
TO-220 (K) Package Outline
e3 100% Sn Plated
Gate
Drain
Source
050-8139
Rev C
05-2009
Drain
Dimensions in Inches and (Millimeters)
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