SRAM AS8S128K32 Austin Semiconductor, Inc. 128K x 32 SRAM PIN ASSIGNMENT SRAM MEMORY ARRAY (Top View) 68 Lead CQFP (Q) AVAILABLE AS MILITARY SPECIFICATIONS • SMD 5962-95595: -Q • SMD 5962-93187: -P or -PN • MIL-STD-883 FEATURES • Access times of 15, 17, 20, 25, 35, and 45 ns • Built in decoupling caps for low noise operation • Organized as 128K x32; User configured as 256Kx16 or 512K x8 • Operation with single 5 volt supply • Low power CMOS • TTL Compatible Inputs and Outputs • 2V Data Retention, Low power standby OPTIONS • • 66 Lead PGA- Pins 8, 21, 28, 39 are grounds (P) MARKINGS Timing 15ns 17ns 20ns 25ns 35ns 45ns -15 -17 -20 -25 -35 -45 Package Ceramic Quad Flatpack Pin Grid Array -8 Series Pin Grid Array -8 Series Q P PN No. 702 No. 802 No. 802 66 Lead PGA- Pins 8, 21, 28, 39 are no connects (PN) NOTE: PN indicates a no connect on pins 8, 21, 28, 39 GENERAL DESCRIPTION Powered by ICminer.com Electronic-Library Service CopyRight 2003 CE2 WE2 CE1 WE1 A0 - 16 M1 M0 128K x 8 M2 128K x 8 CE3 WE3 128K x 8 M3 WE4 OE For more products and information please visit our web site at www.austinsemiconductor.com AS8S128K32 Rev. 3.5 7/00 CE4 128K x 8 The Austin Semiconductor, Inc. AS8S128K32 is a 4 Megabit CMOS SRAM Module organized as 128Kx32-bits and user configurable to 256Kx16 or 512Kx8. The AS8S128K32 achieves high speed access, low power consumption and high reliability by employing advanced CMOS memory technology. The military temperature grade product is suited for military applications. The AS8S128K32 is offered in a ceramic quad flatpack module per SMD-5962-95595 with a maximum height of 0.140 inches. This module makes use of a low profile, mutlichip module design. This device is also offered in a 1.075 inch square ceramic pin grid array per SMD 5692-93187, which has a maximum height of 0.195 inches. This package is also a low profile, multi-chip module design reducing height requirements to a minimum. I/O 24 - I/O 31 I/O 16 - I/O 23 I/O 8 - I/O 23 I/O 0 - I/O 7 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 SRAM AS8S128K32 Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* This is a stress rating only and functional operation on the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. **Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow. See the Application Information section at the end of this datasheet for more information. Voltage of Vcc Supply Relative to Vss.....................-1V to +7V Storage Temperature..........................................-65°C to +150°C Short Circuit Output Current(per I/O)...............................20mA Voltage on Any Pin Relative to Vss..................-.5V to Vcc+1V Maximum Junction Temperature**.................................+175°C *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55°C<TA<125°C; Vcc = 5v ±10%) ! "#$#%" & ''"! ( ) ) µΑ ! "#$#%" & ''"! ( ) ) µΑ µΑ / / / ( ! ! "#$#%" & ''"! (** +*,( ) ) . /0# ( ( . 0# 12 PARAMETER Power Supply Current: Operating Power Supply Current: Standby SYM -15 -17 MAX -20 -25 -35 -45 CE\<VIL; VCC=MAX f = MAX = 1/tRC (MIN) Outputs Open Icc 700 650 600 560 520 500 mA 3, 13 CE\>VIH; VCC=MAX f = MAX = 1/tRC (MIN) Outputs Open ISBT1 280 220 200 180 160 150 mA (1) CE\ = OE\ = VIH; CMOS Compatible; VCC = MAX f = 5 MHz ISBT2 100 80 80 60 60 60 mA (1) CE\ > Vcc -0.2V; Vcc = MAX VIL < Vss +0.2V; VIH > VCC -0.2V; f = 0 Hz ISBC1 40 40 40 40 40 40 mA (2) ISBC2 24 24 24 24 24 24 mA (2) CONDITIONS CE\ > Vcc -0.2V; Vcc = MAX VIL < Vss +0.2V; VIH > Vcc -0.2V; f = 0 Hz "L" Version Only UNITS NOTES (1) NOTE: 1) Address switching sequence A, A+1, A+2, etc. 2) 1/2 input at HIGH, 1/2 input at LOW. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 SRAM AS8S128K32 Austin Semiconductor, Inc. CAPACITANCE TABLE (VIN = 0V, f = 1 MHz, TA = 25oC) SYMBOL CADD PARAMETER A0 - A18 Capacitance COE OE\ Capacitance 40 pF 4 CWE, CCE WE\ and CE\ Capacitance 20 pF 4 CIO I/O 0- I/O 31 Capacitance 20 pF 4 TRUTH TABLE MODE Read Write Standby Not Selected OE\ L X X H CE\ L L H L MAX 40 UNITS pF NOTES 4 WE\ H L X H I/O Q D HIGH Z HIGH Z POWER ACTIVE ACTIVE STANDBY ACTIVE AC TEST CONDITIONS TEST SPECIFICATIONS Input pulse levels........................................VSS to 3V Input rise and fall times..........................................5ns Input timing reference levels.................................1.5V Output reference levels........................................1.5V Output load.............................................See Figures 1 IOL Current Source Device Under Test - + Vz = 1.5V (Bipolar Supply) + Ceff = 50pf Current Source NOTES: IOH Vz is programable from -2V to + 7V. IOL and IOH programmable from 0 to 16 mA. Vz is typically the midpoint of VOH and VOL. IOL and IOH are adjusted to simulate a typical resistive load circuit. Figure 1 AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 SRAM AS8S128K32 Austin Semiconductor, Inc. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55°C≤TA≤125°C; Vcc = 5v ±10%) DESCRIPTION READ CYCLE READ cycle time Address access time Chip enable access time Output hold from address change Chip enable to output in Low-Z Chip disable to output in High-Z Chip enable to power-up time Chip disable to power-down time Output enable access time Output enable to output in Low-Z Output disable to output in High-Z WRITE CYCLE WRITE cycle time Chip enable to end of write Address valid to end of write Address setup time Address hold from end of write -15 -17 -20 -25 -35 -45 SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES t RC AA t ACE t OH t LZCE t HZCE t PU t PD t AOE t LZOE t HZOE 15 t t WC CW t AW t AS t AH t WRITE pulse width t WRITE pulse width Data setup time Data hold time Write disable to output in Low-z Write enable to output in High-Z t WP1 WP2 t DS t DH t LZWE t HZWE 17 15 15 2 2 2 2 0 8 0 0 12 8 1 2 7 17 12 12 0 1 1 12 1 12 9 1 2 7 1 1 9 2 2 0 2 2 0 0 45 45 14 25 8 7 45 35 35 10 20 7 0 6 15 12 12 0 1 9 17 7 35 25 25 2 2 0 15 6 0 25 20 20 2 2 7 12 20 17 17 15 0 35 12 0 9 ns ns ns ns ns ns 45 12 0 12 12 ns ns ns 20 15 15 0 1 25 17 17 0 1 35 20 20 0 1 45 22 22 0 1 ns ns ns ns ns 15 17 20 20 ns 15 10 1 2 17 12 1 2 20 15 1 2 20 15 1 2 ns ns ns ns ns 10 11 14 15 4, 6, 7 4, 6, 7 4 4 4, 6 4, 6, 7 4, 6, 7 4, 6, 7 NOTES: 1) For OE\ = HIGH condition. For OE\ = LOW condition tWP1 = tWP2 = 15 ns MIN. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 SRAM AS8S128K32 Austin Semiconductor, Inc. NOTES 7. At any given temperature and voltage condition, tHZCE, is less than tLZCE, and tHZWE is less than tLZWE. 8. ?W/E is HIGH for READ cycle. 9. Device is continuously selected. Chip enables and output enable are held in their active state. 10. Address valid prior to or coincident with latest occurring chip enable. 11. tRC= READ cycle time. 12. Chip enable (?C/E) and write enable (?W/E) can initiate and terminate a WRITE cycle. 13. 32 bit operation 1. All voltages referenced to VSS (GND). 2. -3v for pulse width <20ns. 3. ICC is dependent on output loading and cycle rates. The specified value applies with the outputs 1 open, and f= HZ. t RC(MIN) 4. This parameter is sampled. 5. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted. 6. tHZCE, tHZOE and tHZWE are specified with CL= 5pF as in Fig. 2. Transition is measured +/- 200 mV typical from steady state coltage, allowing for actual tester RC time constant. DATA RETENTION ELECTRICAL CHARACTERISTICS DESCRIPTION VCC for Retention Data CONDITIONS Data Retention Current SYMBOL VDR MIN 2 MAX -- UNITS V NOTES CE\ > VCC - 0.2V VCC = 2.0V ICCDR -- 6 mA VIN > VCC - 0.2V VCC = 3V ICCDR -- 11.6 mA tCDR 0 -- ns 4 tR tRC ns 4, 11 Chip Deselect to Data Retention Time Operation Recovery Time LOW VCC DATA RETENTION WAVEFORM DATA RETENTION MODE VDR >2V 4.5V Vcc 4.5V tCDR tR VIH VDR CE\ VIL AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 SRAM AS8S128K32 Austin Semiconductor, Inc. READ CYCLE NO. 1(8,9) tRC ADDRESS VALID tAA tOH DQ PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2(7,8,10) tRC CE\ tAOE tHZOE tLZOE OE\ tLZCE tACE tHZCE DQ DATA VALID tPU tPD Icc AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 SRAM AS8S128K32 Austin Semiconductor, Inc. WRITE CYCLE NO. 1 (Chip Enable Controlled) tWC ADDRESS tAW tAH tAS tCW CE\ tWP1 WE\ tDS D tDH DATA VAILD Q HIGH Z WRITE CYCLE NO. 2 (Write Enable Controlled) tWC ADDRESS ADDRESS VALID tAW tAH tCW CE\ tAS tWP2 WE\ tDS D tDH DATA VALID tLZWE tHZWE Q AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7 SRAM AS8S128K32 Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #702 (Package Designator Q) SMD 5962-95595, Case Outline M D2 D1 DETAIL A D R 1o - 7o B b L1 e SEE DETAIL A A A2 E3 SMD SPECIFICATIONS SYMBOL A A1 A2 B b D D1 D2 E e R L1 MIN 0.123 0.118 0.005 MAX 0.200 0.186 0.015 0.010 REF 0.013 0.017 0.800 BSC 0.870 0.980 0.936 0.890 1.000 0.956 0.050 BSC 0.010 TYP 0.035 0.045 *All measurements are in inches. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 SRAM AS8S128K32 Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #904 (Package Designator P & PN) SMD 5962-93187, Case Outline 4 and 5 4xD D1 A D2 Pin 56 A1 Pin 1 φb1 (identified by 0.060 square pad) E1 e φb Pin 66 e φb2 Pin 11 L SMD SPECIFICATIONS SYMBOL A A1 φb φb1 φb2 D D1/E1 D2 e L MIN 0.135 0.025 0.016 0.045 0.065 1.064 MAX 0.195 0.035 0.020 0.055 0.075 1.086 1.000 BSC 0.600 BSC 0.100 BSC 0.145 0.155 *All measurements are in inches. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 SRAM AS8S128K32 Austin Semiconductor, Inc. ORDERING INFORMATION EXAMPLE: AS8S128K32Q-25/XT Device Number AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 Package Type Q Q Q Q Q Q Speed ns -15 -17 -20 -25 -35 -45 Process /* /* /* /* /* /* EXAMPLE: AS8S128K32PN-20/883C Device Number AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 AS8S128K32 Package Type P PN P PN P PN P PN P PN P PN Speed ns -15 -15 -17 -17 -20 -20 -25 -25 -35 -35 -45 -45 *AVAILABLE PROCESSES IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing Process /* /* /* /* /* /* /* /* /* /* /* /* -40oC to +85oC -55oC to +125oC -55oC to +125oC PACKAGE NOTES P = Pins 8, 21, 28, and 39 are grounds. PN = Pins 8, 21, 28, and 39 are no connects. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 SRAM Austin Semiconductor, Inc. AS8S128K32 ASI TO DSCC PART NUMBER CROSS REFERENCE ASI Package Designator Q ASI Part # SMD Part # AS8S128K32Q-55/883C AS8S128K32Q-55/883C AS8S128K32Q-45/883C AS8S128K32Q-45/883C AS8S128K32Q-35/883C AS8S128K32Q-35/883C AS8S128K32Q-25/883C AS8S128K32Q-25/883C AS8S128K32Q-20/883C AS8S128K32Q-20/883C AS8S128K32Q-17/883C AS8S128K32Q-17/883C 5962-9559505HMA 5962-9559505HMC 5962-9559506HMA 5962-9559506HMC 5962-9559507HMA 5962-9559507HMC 5962-9559508HMA 5962-9559508HMC 5962-9559509HMA 5962-9559509HMC 5962-9559510HMA 5962-9559510HMC ASI Package Designator P & PN ASI Part # AS8S128K32P-55/883C AS8S128K32P-55/883C AS8S128K32P-45/883C AS8S128K32P-45/883C AS8S128K32P-35/883C AS8S128K32P-35/883C AS8S128K32P-25/883C AS8S128K32P-25/883C AS8S128K32P-20/883C AS8S128K32P-20/883C AS8S128K32P-17/883C AS8S128K32P-17/883C SMD Part # ASI Part # 5962-9318705H5A 5962-9318705H5C 5962-9318706H5A 5962-9318706H5C 5962-9318707H5A 5962-9318707H5C 5962-9318708H5A 5962-9318708H5C 5962-9318709H5A 5962-9318709H5C 5962-9318710H5A 5962-9318710H5C AS8S128K32PN-55/883C AS8S128K32PN-55/883C AS8S128K32PN-45/883C AS8S128K32PN-45/883C AS8S128K32PN-35/883C AS8S128K32PN-35/883C AS8S128K32PN-25/883C AS8S128K32PN-25/883C AS8S128K32PN-20/883C AS8S128K32PN-20/883C AS8S128K32PN-17/883C AS8S128K32PN-17/883C SMD Part # 5962-9318705H4A 5962-9318705H4C 5962-9318706H4A 5962-9318706H4C 5962-9318707H4A 5962-9318707H4C 5962-9318708H4A 5962-9318708H4C 5962-9318709H4A 5962-9318709H4C 5962-9318710H4A 5962-9318710H4C Please note, -15 not currently available on the SMD's. AS8S128K32 Rev. 3.5 7/00 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 11