ANSALDO Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - Ansaldo Trasporti s.p.a. Unita' Semiconduttori PHASE CONTROL THYRISTOR AT303 Repetitive voltage up to Mean on-state current Surge current 800 V 1100 A 12 kA FINAL SPECIFICATION feb 97 - ISSUE : 02 Symbol Characteristic Tj [°C] Conditions Value Unit BLOCKING V RRM Repetitive peak reverse voltage 150 800 V V V RSM Non-repetitive peak reverse voltage 150 900 V DRM Repetitive peak off-state voltage 150 800 V I RRM Repetitive peak reverse current V=VRRM 150 50 mA I DRM Repetitive peak off-state current V=VDRM 150 50 mA I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled I TSM Surge on-state current sine wave, 10 ms I² t I² t without reverse voltage V T On-state voltage On-state current = V T(TO) Threshold voltage 150 0.8 T On-state slope resistance 150 0.340 mohm CONDUCTING r 1900 A 1100 A 1085 A 150 12 kA 25 1.45 720 x1E3 A²s V V SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 1200 A, gate 10V 5ohm 150 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 75% of VDRM 150 500 V/µs td Gate controlled delay time, typical VD=200V, gate source 20V, 10 ohm , tr=.5 µs 25 1.5 µs tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 80% VDRM Q rr Reverse recovery charge di/dt=-60 A/µs, I= 1000 A I rr Peak reverse recovery current VR= 50 V I H Holding current, typical VD=5V, gate open circuit 25 I L Latching current, typical VD=12V, tp=30µs 25 µs 150 µC A 300 mA mA GATE V GT Gate trigger voltage VD=5V 25 3.5 V I GT Gate trigger current VD=5V 25 200 mA VD=VDRM 150 V GD Non-trigger gate voltage, min. 0.25 V V FGM Peak gate voltage (forward) 30 V I FGM Peak gate current 10 A V RGM Peak gate voltage (reverse) 5 V P GM Peak gate power dissipation 150 W P G Average gate power dissipation 2 W R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 50 °C/kW R th(c-h) Thermal impedance Case to heatsink, double side cooled 15 °C/kW T F j Operating junction temperature Mounting force Mass Pulse width 100 µs MOUNTING -30 / 150 8.0 / 9.0 85 ORDERING INFORMATION : AT303 S 08 standard specification VDRM&VRRM/100 °C kN g ANSALDO AT303 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 DISSIPATION CHARACTERISTICS SQUARE WAVE Th [°C] 150 140 130 120 110 100 90 30° 80 60° 70 90° 120° 180° 60 DC 50 0 200 400 600 800 1000 1200 1400 1600 IF(AV) [A] PF(AV) [W] 2000 DC 1800 180° 1600 120° 90° 1400 60° 1200 30° 1000 800 600 400 200 0 0 200 400 600 800 IF(AV) [A] 1000 1200 1400 1600 ANSALDO AT303 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 DISSIPATION CHARACTERISTICS SINE WAVE Th [°C] 150 140 130 120 110 100 30° 90 60° 80 90° 120° 70 180° 60 50 0 200 400 600 800 1000 1200 1400 1600 1200 1400 1600 IF(AV) [A] PF(AV) [W] 2000 1800 120° 1600 180° 90° 1400 60° 1200 30° 1000 800 600 400 200 0 0 200 400 600 800 IF(AV) [A] 1000 ANSALDO AT303 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 ON-STATE CHARACTERISTIC Tj = 150 °C SURGE CHARACTERISTIC Tj = 150 °C 3500 12 3000 10 8 2000 ITSM [kA] On-state Current [A] 2500 1500 6 4 1000 2 500 0 0 0.6 1.1 1.6 1 On-state Voltage [V] 10 n° cycles TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 50.0 45.0 40.0 Zth j-h [°C/kW] 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 0.001 0.01 0.1 1 t[s] 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. 100