20 MHz to 500 MHz IF Gain Blocks ADL5532 Preliminary Technical Data FEATURES Fixed gain of 15 dB Operation up to 500 MHz +39.1 dBm OIP3 at 70 MHz Noise Figure 3.0 dB at 70 MHz Input/output internally matched to 50 Ω Temperature and power supply stable Power supply: 5 V Power supply current: 95 mA 1000 V ESD (Class 1C) FUNCTIONAL BLOCK DIAGRAM FBK 1 8 FBK2 RFIN 2 7 RFOUT NC 3 NC 4 6 NC 15 dB ADL5532 5 CLIN Figure 1. Block Diagram GENERAL DESCRIPTION The ADL5532 is a broadband, fixed-gain, linear amplifier that operate at frequencies up to 500 MHz. The device can be used in a wide variety of wired and wireless devices including cellular, GSM and WCDMA, and broadband applications. coupling capacitors, a power supply decoupling capacitor and external inductor are required for operation. Gain is stable over frequency, temperature, power supply and from device to device. The ADL5532 achieves an OIP3 of 39.1 dBm with an output compression point of +19.9 dBm and a noise figure of 3.0 dB. The ADL5532 is fabricated on a GaAs HBT process and has an ESD rating of 1000 V (Class 1C). The device is packaged in a 3mm x 3mm LFCSP that uses an exposed paddle for excellent thermal impedance and operates from −40°C to +85°C. A fully populated evaluation board is available. This amplifier is single-ended and internally matched to 50 Ω with an input return loss of 10 dB. Only input/output ac- The amplifier operates with a 5 V supply consuming 95 mA of current. Rev. PrD 5/07 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. ADL5532 Preliminary Technical Data TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................4 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................5 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................6 Revision History ............................................................................... 2 Evaluation Board ...............................................................................7 Specifications..................................................................................... 3 Outline Dimensions ..........................................................................8 Absolute Maximum Ratings............................................................ 4 Ordering Guide .............................................................................8 REVISION HISTORY 5/07—Rev. PrD: Preliminary Version Rev. PrD 5/07 | Page 2 of 8 Preliminary Technical Data ADL5532 SPECIFICATIONS ADL5532 VPOS = 5 V, TA = 25°C, unless otherwise noted. Table 1. Parameter OVERALL FUNCTION Frequency Range Gain vs. Frequency Input Return Loss (S11) Output Return Loss (S22) FREQUENCY = 70 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Noise Figure FREQUENCY = 190 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Noise Figure FREQUENCY = 380 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Conditions POWER INTERFACE Supply Voltage Supply Current vs. Temp Power Dissipation Pins RFOUT,Vcc Min Typ Max Unit 500 ±0.12 -10 -10 MHz dB dB dB 16.1 ±.25 19.7 39.1 3.0 dB dB dBm dBm dB 15.8 ±.25 19.9 38.5 3.0 dB dB dBm dBm dB 15.5 ±.25 19.6 35.6 3.5 dB dB dBm dBm dB 20 ± 50 MHz. Center Frequency = 190 MHz or 380 MHz 30 MHz to 500 MHz 30 MHz to 500 MHz −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) 4.75 −40°C ≤ TA ≤ +85°C VPOS = 5V Rev. PrD 5/07 | Page 3 of 8 5 95 104 475 5.25 V mA mA mW ADL5532 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, VPOS Input Power (re: 50 Ω) Internal Power Dissipation (Paddle Soldered) θJA (Paddle Soldered) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range (Soldering 60 sec) Rating 5.5 V +12 dBm 650 mW TBD °C/W 150 °C −40°C to +85°C −65°C to +150°C 240°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. PrD 5/07 | Page 4 of 8 Preliminary Technical Data ADL5532 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS FBK 1 PIN 1 INDICATOR RFIN 2 ADL5532 NC 3 TOP VIEW (Not to Scale) NC 4 8 FBK2 7 RFOUT 6 NC 5 CLIN Figure 2. Pin Configuration Table 3. Pin Function Descriptions Single Pin No. 1,8 2 7 3, 4, 6 5 Mnemonic Description FBK1, FBK2 RFIN RFOUT For operation below 50 MHz a 100nF capacitor should be connected between these pins. RF Input: Requires a DC blocking capacitor. For normal operating conditions a 10 nF capacitor is recommended RF Output and Bias: DC bias provided to this pin through an inductor. For normal operating conditions a 470 nH inductor is recommended. RF path requires a DC blocking capacitor. For normal operating conditions a 10 nF capacitor is recommended. No Connect A 100 nF capacitor connected between pin 5 and ground provides decoupling for the on board linearizer. Internally connected to GND. Solder to a low impedance ground plane NC CLIN Exposed Paddle Rev. PrD 5/07 | Page 5 of 8 ADL5532 Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 45 0 40 -5 NF GAIN P1dB OIP3 30 25 Return Loss & Isolation (dB) NF, GAIN,P1dB, OIP3 (dB, dBm) 35 20 15 10 S11 S12 S22 -10 -15 -20 5 0 -25 0 100 200 300 400 500 600 0 Frequency( MHz) 46 44 42 40 OIP3 (dBm) 38 36 34 20 MHz 70 MHz 190 MHz 380 MHz 500 MHz 28 26 24 22 -6 -4 -2 0 2 4 6 8 10 300 400 500 600 Figure 5. ADL5532 Input / Output Return Loss and Reverse Isolation vs Frequency 48 30 200 Frequency (MHz) Figure 3 ADL5532 Gain, Noise Figure, OIP3 and P1dB vs Frequency 32 100 12 14 16 18 20 Pout (dBm) Figure 4 ADL5532 OIP3 vs Pout and Frequency Rev. PrD 5/07 | Page 6 of 8 Preliminary Technical Data ADL5532 EVALUATION BOARD Figure 6 shows the schematic for the ADL5532 evaluation board. The board is powered by a single 5V supply. The components used on the board are listed in. Table 4 Power can be applied to the board through clip-on leads (Vcc, Gnd), or through Jumper W1. Figure 6. Evaluation Board Schematic Figure 8. Evaluation Board Layout (Bottom) Figure 7. Evaluation Board Layout (Top) Table 4. Evaluation Board Configuration Options Component C1, C2 C3, C4 C5, C6 C7, C8 L1 L2, L3, L4, L5 VCC & GND W1 R1, R2 Function AC-coupling capacitors. Provides decoupling for the on board linearizer. Stabilizes the internal feedback loop for operation below 50 MHz. Power Supply decoupling capacitors capacitor. DC bias inductor. Clip-on terminals for power supply. Default Value 10 nF 0402 C3 100 nF 0603 C4 100 nF 0603 C5 10 nF 0603 C6 1 μF 0603 Open 0603 82 nH L0603 Open 0603 VCC Red GND Black 2-pin jumper for connection of ground and supply via cable. Open 0603 Rev. PrD 5/07 | Page 7 of 8 ADL5532 Preliminary Technical Data OUTLINE DIMENSIONS 3.25 3.00 SQ 2.75 0.60 MAX 0.50 BSC TOP VIEW PIN 1 INDICATOR 2.95 2.75 SQ 2.55 0.90 MAX 0.85 NOM PIN 1 INDICATOR 1 8 1.89 1.74 1.59 EXPOSED PAD (BOTTOM VIEW) 0.30 0.23 0.18 12° MAX 0.50 0.40 0.30 5 4 1.60 1.45 1.30 0.70 MAX 0.65 TYP 022107-A 0.05 MAX 0.01 NOM 0.20 REF Figure 9. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3mm × 3 mm Body, Very Thin, Dual Lead CP-8-2 Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option ADL5532ACPZ-R7 1 −40°C to +85°C 8-Lead LFCSP Tape and Reel CP-8-2 ADL5532ACPZ-WP1 −40°C to +85°C 8-Lead LFCSP Waffle Pack CP-8-2 ADL5532-EVALZ 1 Evaluation Board Z = Pb-free part. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06834-0-5/07(PrD) Rev. PrD 5/07 | Page 8 of 8 Branding Ordering Quantity