Preliminary Technical Data 400 MHz – 4 GHz Low Noise Amplifier ADL5521 FEATURES Gain of 15.3dB at 1950MHz Matched 50-Ω input and output Noise Figure of 0.8dB at 1950MHz OIP3 of 35.3dBm typ at 1950MHz Single 5V Supply Operation Operating current of 65ma at +5V LFCSP 3x3 mm Package FUNCTIONAL BLOCK DIAGRAM ADL5521 VBIAS VDD GENERAL DESCRIPTION The ADL5521 is a high performance GaAs pHEMT low-noise amplifier. It provides high gain and low noise figure for single down-conversion IF sampling receiver architectures as well as direct down conversion receivers. BIAS INP OUT GND GND Figure 1. . The ADL5521 amplifier comes in a compact, thermally enhanced 3x3mm LFCSP package and operates over the temperature range of −40°C to +85°C. Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved. Preliminary Technical Data ADL5521 SPECIFICATIONS VS = 5 V, T = 25°C , fC= 1950MHz Table 1. Parameter Conditions Min Typ Max Unit Input return loss External match 12 dB Output return loss External match 20.7 dB 15.3 dB Gain Gain Flatness In the [1920 – 1980] frequency band 0.015 dB/MHz Gain vs. Temperature In the [1920 – 1980] frequency band 0.018 dB/degC Noise Figure 0.8 dB Output IP3 35.3 dBm Output 1 dB Compression Point 22.5 dBm S12 Isolation 21.4 dB POWER-INTERFACE Supply Voltage 4.5 Current Consumption Rev. PrA | Page 2 of 6 5 5.5 V 65 TBD mA Preliminary Technical Data ADL5521 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, VPOS Max RF Input Level Internal Power Dissipation θJA (Exposed paddle soldered down) θJA (Exposed paddle not soldered down) θJC (At exposed paddle) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 60 sec) Rating 5.5 V TBD TBD mW TBD mW TBD°C/W TBD°C/W TBD°C/W TBD°C –40°C to +85°C –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. PrA | Page 3 of 6 Preliminary Technical Data ADL5521 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS 1 VBIAS 2 INP 3 NC 4 NC VDD 8 ADL5521 OUT top view NC (not to scale) Exposed pad 7 6 NC 5 Figure 2. 8-Lead LFCSP Table 3. Pin Function Descriptions- 8Lead CSP Pin No. 1 2 3,4,5,6 7 8 Mnemonic VBIAS INP NC OUT VDD Exposed pad EP Description Bias: Internal DC bias RF Input: Must be AC-coupled. NC: No internal connection RF Output: Must be AC-coupled. Supply: VDD bias needs to be bypassed to ground using low-inductance capacitors. Exposed Paddle: Connect to a low impedance ground plane Rev. PrA | Page 4 of 6 Preliminary Technical Data ADL5521 TYPICAL PERFORMANCE CHARACTERISTICS 38 OIP3 - dBm 35 34 70 69 68 33 32 +85°C (1920MHz 1950MHz 1980MHz) 31 30 +25°C (1920MHz 1950MHz 1980MHz) 29 28 67 IPOS - mA -40°C (1920MHz 1950MHz 1980MHz) 37 36 66 27 26 65 25 -8 64 -6 -4 -2 0 2 4 6 8 10 12 14 16 18 20 Pout - dBm 63 62 Figure 7. O IP3 vs. Output Power, Temperature and Frequency 61 60 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 3.5 90 Temperature - degC 3 Figure 3. ADL5521 Current vs. Temperature Noise Figure (dB) 2.5 30 25 Pout (dBm), Gain (dB) 20 2 1.5 1 15 Gain (-40°C +25°C +85°C) 10 0.5 Output Power (-40°C +25°C +85°C) 5 0 0 1920 1930 1940 1950 1960 1970 1980 Frequency (MHz) -5 Figure 8. Distribution of Noise Figure for Five Parts, 1920 to 1980 MHz -10 -25 -20 -15 -10 -5 0 5 10 3.5 Pin - dBm Figure 4. Output Power and Gain vs. Temperature 3 2.5 35 26 30 24 25 P1dB (-40°C +25°C +85°C) 22 20 20 15 18 2 1.5 1 0.5 10 Gain (-40°C +25°C +85°C) 16 14 1920 1930 0 400 900 1400 5 1940 1950 1960 0 1980 1970 Freq - MHz 1900 2400 2900 Frequency (MHz) Figure 9. Distribution of Noise Figure for Five Parts, Complete Frequency Range 20 Figure 5 Gain, P1dB, OIP3 vs. Frequency 15 S21 18 10 16 5 S-parameters - dB 14 12 Gain - dB Gain, P1dB - dB(m) 28 Noise Figure (dB) 40 OIP3 (-40°C +25°C +85°C) OIP3 - dBm 30 10 8 0 -5 S11 -10 -15 6 4 -20 2 -25 0 400 -30 900 1400 1900 2400 2900 S22 S12 1920 Frequency - MHz 1930 1940 1950 1960 1970 Freq - MHz Figure 6. Gain vs. Frequency, Complete Frequency Range, 5 Parts Figure 10. Typical S Parameters, 1920 to 1980 MHz Rev. PrA | Page 5 of 6 1980 ADL5521 Prelim Datasheet OUTLINE DIMENSIONS 3.25 3.00 SQ 2.75 0.60 MAX 2.95 2.75 SQ 2.55 TOP VIEW PIN 1 INDICATOR 0.50 BSC 8 1.89 1.74 1.59 (BOTTOM VIEW) 0.70 MAX 0.65 TYP 5 PIN 1 INDICATOR 4 1.60 1.45 1.30 0.05 MAX 0.01 NOM 0.20 REF 022107-A 0.90 MAX 0.85 NOM 1 EXPOSED PAD 0.30 0.23 0.18 12° MAX 0.50 0.40 0.30 Figure 11. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3mm × 3 mm Body, Very Thin, Dual Lead CP-8-2 Dimensions shown in millimeters ORDERING GUIDE Model ADL5521ACPZ-R71 ADL5521ACPZ-WP1 ADL5521-EVALZ 1 Temperature Range – 40 ° C to + 8 5 ° C –40°C to +85°C Package Description 7 ” T a pe a n d R e e l Waffle Pack Ev aluation Boar d Z = Pb free part ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06828-0-5/07(PrA) Rev. PrA | Page 6 of 6 Package Option C P - 8- 2 CP-8-2