Previous Datasheet Index Next Data Sheet Data Sheet No. PD-6.034G IR2151 SELF-OSCILLATING HALF-BRIDGE DRIVER Features Product Summary n Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune n Undervoltage lockout n Programmable oscillator frequency f = 1 1.4 × (R T + 75Ω) × CT n Matched propagation delay for both channels n Low side output in phase with RT VOFFSET 600V max. Duty Cycle 50% IO+/- 100 mA / 210 mA VOUT 10 - 20V Deadtime (typ.) 1.2 µs Packages Description The IR2151 is a high voltage, high speed, self-oscillating power MOSFET and IGBT driver with both high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The front end features a programmable oscillator which is similar to the 555 timer. The output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver cross-conduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration that operates off a high voltage rail up to 600 volts. Typical Connection up to 600V V CC VB RT HO CT VS COM LO To Order TO LOAD CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-187 Previous Datasheet Index Next Data Sheet IR2151 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Parameter Definition Symbol Value Min. Max. VB High Side Floating Supply Voltage -0.3 625 VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3 VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3 VLO Low Side Output Voltage -0.3 VCC + 0.3 VRT RT Voltage -0.3 VCC + 0.3 VCT CT Voltage -0.3 VCC + 0.3 ICC Supply Current (Note 1) — 25 IRT RT Output Current -5 5 dVs/dt Allowable Offset Supply Voltage Transient PD Package Power Dissipation @ TA ≤ +25°C RθJA Thermal Resistance, Junction to Ambient — 50 (8 Lead DIP) — 1.0 (8 Lead SOIC) — 0.625 (8 Lead DIP) — 125 (8 Lead SOIC) — 200 TJ Junction Temperature — 150 TS Storage Temperature -55 150 TL Lead Temperature (Soldering, 10 seconds) — 300 Units V mA V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol Parameter Definition Value Min. Max. Units VB High Side Floating Supply Absolute Voltage VS + 10 VS + 20 VS High Side Floating Supply Offset Voltage — 600 VHO High Side Floating Output Voltage VS VB VLO Low Side Output Voltage 0 VCC ICC Supply Current (Note 1) — 5 mA TA Ambient Temperature -40 125 °C Note 1: V Because of the IR2151’s application specificity toward off-line supply systems, this IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. Therefore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP. B-188 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL To Order Previous Datasheet Index Next Data Sheet IR2151 Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified. Parameter Definition Symbol Value Min. Typ. Max. Units Test Conditions tr Turn-On Rise Time — 80 120 tf Turn-Off Fall Time — 40 70 0.50 1.20 2.25 µs 48 50 52 % DT D Deadtime RT Duty Cycle ns Static Electrical Characteristics VBIAS (VCC , VBS) = 12V, CL = 1000 pF, C T = 1 nF and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The V O and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol fOSC VCLAMP Parameter Definition Value Min. Typ. Max. Units Test Conditions Oscillator Frequency 19.4 20.0 20.6 94 100 106 VCC Zener Shunt Clamp Voltage 14.4 15.6 16.8 kHz RT = 35.7 kΩ RT = 7.04 kΩ ICC = 5 mA VCT+ 2/3 VCC Threshold 7.8 8.0 8.2 VCT- 1/3 VCC Threshold 3.8 4.0 4.2 CT Undervoltage Lockout — 20 50 2.5V<VCC <VCCUV+ VRT+ RT High Level Output Voltage, V CC - RT — 0 100 I RT = -100 µA — 200 300 IRT = -1 mA VRT- RT Low Level Output Voltage — 20 50 IRT = 100 µA — 200 300 RT Undervoltage Lockout, VCC - RT — 0 100 2.5V<VCC <VCCUV+ VOH High Level Output Voltage, VBIAS - VO — — 100 IO = 0A VOL Low Level Output Voltage, VO — — 100 IO = 0A I LK Offset Supply Leakage Current — — 50 VB = VS = 600V I QBS Quiescent VBS Supply Current Quiescent VCC Supply Current — 10 50 — 400 950 CT Input Current — 0.001 1.0 VCCUV+ VCC Supply Undervoltage Positive Going Threshold 7.7 8.4 9.2 VCCUV- VCC Supply Undervoltage Negative Going Threshold 7.4 8.1 8.9 VCCUVH VCTUV VRTUV I QCC ICT VCC Supply Undervoltage Lockout Hysteresis 200 500 — I O+ Output High Short Circuit Pulsed Current 100 125 — I O- Output Low Short Circuit Pulsed Current 210 250 — To Order V mV IRT = 1 mA µA V mV mA VO = 0V VO = 15V CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-189 Previous Datasheet Index Next Data Sheet IR2151 Functional Block Diagram VB R HV LEVEL SHIFT RT + R CT R Q S Q DEAD TIME R HO S PULSE GEN VS VCC 15.6V + R Q PULSE FILTER DEAD TIME UV DETECT LO DELAY COM Lead Definitions Lead Symbol Description RT CT Oscillator timing resistor input,in phase with LO for normal IC operation Oscillator timing capacitor input, the oscillator frequency according to the following equation: f = VB HO VS VCC LO COM 1 1.4 × (R T + 75Ω) × CT where 75Ω is the effective impedance of the RT output stage High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 8 Lead DIP SO-8 IR2151 IR2151S B-190 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL To Order Previous Datasheet Index Next Data Sheet IR2151 Device Information Process & Design Rule Transistor Count Die Size Die Outline Thickness of Gate Oxide Connections First Layer Second Layer Contact Hole Dimension Insulation Layer Passivation Method of Saw Method of Die Bond Wire Bond Leadframe Package HVDCMOS 4.0 µm 231 68 X 101 X 26 (mil) Material Width Spacing Thickness Material Width Spacing Thickness Material Thickness Material Thickness Method Material Material Die Area Lead Plating Types Materials 800Å Poly Silicon 5 µm 6 µm 5000Å Al - Si - Cu (Si: 1.0%, Cu ±0.5%) 6 µm 9 µm 20,000Å 5 µm X 5 µm PSG (SiO2) 1.7 µm PSG (SiO2) 1.7 µm Full Cut Ablebond 84 - 1 Thermo Sonic Au (1.0 mil / 1.3 mil) Cu Ag Pb : Sn (37 : 63) 8 Lead PDIP / SO-8 EME6300 / MP150 / MP190 Remarks: To Order CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-191 Previous Datasheet Index Next Data Sheet IR2151 VCCUV + VCLAMP VCC RT (HO) RT 50% 50% CT RT (LO) tf tr HO 90% LO HO LO Figure 1. Input/Output Timing Diagram 10% 10% Figure 2. Switching Time Waveform Definitions RT 50% 50% 90% HO 10% DT LO 90% 90% 10% Figure 3. Deadtime Waveform Definitions B-192 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL To Order