ETC PI74ALVCH16500

PI74ALVCH16500
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18-Bit Universal Bus Transceiver
With 3-State Outputs
Product Features
Product Description
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Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced using the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
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PI74ALVCH16500 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-State
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
The 18-bit PI74ALVCH16500 univeral bus transceiver is designed
for 2.3V to 3.6V Vcc operation.
Data flow in each direction is controlled by Output Enable (OEAB
and OEBA), Latch- Enable (LEAB and LEBA), and clock (CLKAB
and CLKBA) inputs. For A- to-B data flow, the device operates in
the transparent mode when LEAB is high. When LEAB is low, the
A data is latched if CLKAB is held at a high or low logic level. If
LEAB is low, the A data is stored in the latch/flip-flop on the highto-low transition of CLKAB. Output-enable OEAB is active high.
When OEAB is high, the B-port outputs are active. When OEAB is
low, the B-port outputs are in the high-impedence state.
Data flow for B to A is similar to that of A to B but uses OEBA,
LEBA, and CLKBA. The Output Enables are complementary
(OEAB is active HIGH and OEBA is active LOW).
To ensure the high-impedance state during power up or power
down, OEBA should be tied to Vcc through a pull-up resistor and
OEAB should be tied to GND through a pulldown resistor; the
minimum value of the resistor is determined by the current-sinking/
current-sourcing capability of the driver.
Logic Block Diagram
OEAB
CLKAB
1
55
2
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
LEAB
LEBA
CLKBA
28
30
27
OEBA
A1
3
1D
C1
54
B1
CLK
C1 1D
C1
1D
CLK
TO 17 OTHER CHANNELS
1
PS8155A
11/06/00
PI74ALVCH16500
18-Bit
Universal
Bus Transceiver
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Product Pin Description
Pin Name
OE
LE
CLK
Ax
Bx
GND
VCC
Truth Table(1)†
Description
Output Enable Input (Active HIGH)
Latch Enable (Active HIGH)
Clock Input (Active LOW)
Data I/O
Data I/O
Ground
Power
Inputs
GND
1
2
56
55
3
4
5
54
53
52
51
50
49
B3
A4
6
7
8
A5
A6
9
10
48
47
B5
GND
11
12
13
46
56-Pin 45
A, V 44
14
15
16
43
42
41
B11
17
18
40
39
B12
19
20
21
38
37
36
B13
B14
22
23
24
35
34
33
VCC
A18
25
26
32
31
GND
B18
OEBA
LEBA
27
28
30
29
CLKBA
LEAB
A1
GND
A2
A3
VCC
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
LEAB
CLKAB
A
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
¯
L
L
H
L
¯
H
H
H
L
L OR H
X
B0‡
Note:
1. H = High Signal Level
L = Low Signal Level
Z = High Impedance
↓ = HIGH-to-LOW Transition
† A-to-B data flow is shown: B-to-A flow is similar but
uses OEBA, LEBA, CLKBA.
‡ Output level before the indicated steady-state input
conditions were established.
Product Pin Configuration
OEAB
Output B
OEAB
CLKAB
B1
GND
B2
VCC
B4
B6
GND
B7
B8
B9
B10
GND
B15
B16
B17
GND
2
PS8155A
11/06/00
PI74ALVCH16500
18-Bit
Universal
Bus Transceiver
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
Storage Temperature ......................................................... –65°C to +150°C
Ambient Temperature with Power Applied ........................ –40°C to +85°C
Input Voltage Range, VIN .................................................. –0.5V to VCC +0.5V
Output Voltage Range, VOUT ........................................... –0.5V to VCC +0.5V
DC Input Voltage ................................................................. –0.5V to +5.0V
DC Output Current ........................................................................... 100 mA
Power Dissipation ................................................................................ 1.0W
Recommended Operating Conditions(1)
Parame te rs
De s cription
Te s t Conditions
M in.
Typ.
VCC
Supply Voltage
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIN
Input Voltage
0
VCC
VOUT
Output Voltage
0
VCC
IOH
IOL
TA
High- level Output Current
Low- level Output Current
2.3
M ax.
VCC = 2.3V to 2.7V
1.7
VCC = 2.7V to 3.6V
2.0
3.6
VCC = 2.3V to 2.7V
0.7
VCC = 2.7V to 3.6V
0.8
VCC = 2.3V
- 12
VCC = 2.7V
- 12
VCC = 3.0V
- 24
VCC = 2.3V
12
VCC = 2.7V
12
VCC = 3.0V
24
Operating Free- Air Temperature
- 40
Units
85
V
mA
°C
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3
PS8155A
11/06/00
PI74ALVCH16500
18-Bit
Universal
Bus Transceiver
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DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ± 10%)
Parame te rs
VCC(1)
M in.
Min. to Max.
VCC - 0.2
VIH = 1.7V
2.3V
2.0
VIH = 1.7V
2.3V
1.7
VIH = 2.0V
2.7V
2.2
VIH = 2.0V
3.0V
2.4
VIH = 2.0V
3.0V
2.0
Te s t Conditions
IOH = - 100µA
IOH = - 6mA
VOH
IOH = - 12mA
IOH = - 24mA
IOL = 100µA
IOL = 6mA
VOL
IOL = 12mA
IOL = 24mA
II
V
Min. to Max.
0.2
VIL = 0.7V
2.3V
0.4
VIL = 0.7V
2.3V
0.7
VIL = 0.8V
2.7V
0.4
VIL = 0.8V
3.0V
0.55
3.6V
±5
VI = VCC or GND
VI = 0.7V
2.3V
VI = 1.7V
II (Hold)(3)
Typ.(2) M ax. Units
VI = 0.8V
3.0V
VI = 2.0V
45
- 45
75
- 75
µA
VI = 0 to 3.6V
3.6V
±500
IOZ(4)
VO = VCC or GND
3.6V
±10
ICC
VI = VCC or GND
3.6V
40
∆ICC
One input at VCC - 0.6V, Other inputs at VCC or GND
3V to 3.6V
750
IO = 0
CI Control Inputs VI = VCC or GND
3.3V
4
pF
CIO A or B ports VO = VCC or GND
3.3V
8
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device typ e.
2. Typical values are at V CC = 3.3V, +25°C ambient and maximum loading.
3. Bus Hold maximum dynamic current required to switch the input from one state to another.
4. For I/O ports, the IOZ includes the input leakage current.
4
PS8155A
11/06/00
PI74ALVCH16500
18-Bit
Universal
Bus Transceiver
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Timing Requirements over Operating Range
Parame te rs
De s cription
Conditions (1)
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
M in.
M ax.
M in.
M ax.
M in.
M ax.
0
150
0
150
0
150
fCLOCK
Clock frequency
tW Pulse
Duration
LE high
3.3
3.3
3.3
CLK high or low
3.3
3.3
3.3
Data before CLK ↓
1.7
1.4
1.3
1.1
1.0
1.0
1.9
1.6
1.4
Data after CLK ↑
1.7
1.6
1.3
Data after LE ↓ CLK high
2.0
1.8
1.5
Data after LE ↓ CLK low
1.6
1.5
1.2
Input Transition Rise or Fall
0
tSU Setup
time
tH Hold
time
∆t/∆v(2)
Data before LE ↓, CLK high
Data before LE ↓, CLK low
CL = 50pF
RL = 500Ω
10
0
10
Units
MHz
ns
0
10
ns/V
Notes:
1. See test circuit and waveforms.
2. Unused control inputs must be held HIGH or LOW to prevent them from floating.
Switching Characteristics Over Operating Range(1)
Parame te rs
VCC = 2.5V ± 0.2V
From
To
Conditions (1)
(Input) (Output)
M in.(2)
M ax.
fMAX
VCC = 2.7V
M in.(2)
150
VCC = 3.3V ± 0.V
M ax. M in.(2)
150
M ax.
150
MHz
A or B
B or A
5.1
4.7
1
3.9
LE
A or B
5.9
5.5
1.3
4.7
CLK
A or B
6.6
6.6
1.1
5.5
tEN
O EAB
B
5.7
5.4
1.0
4.6
tDIS
O EAB
B
6.1
5.7
1.5
5.0
tEN
O EBA
A
6.2
6.2
1.0
5.2
tDIS
O EBA
A
5.4
4.6
1.0
4.3
tPD
CL = 50pF
RL = 500W
1.0
Units
ns
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, TA = 25ºC
Parame te r
CPD Power Dissipation
Capacitance
Te s t Conditions
Outputs Enabled
Outputs Disabled
CL = 50pF
f = 10 MHz
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Typical
40
51
6
6
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS8155A
11/06/00