19-2962; Rev 1; 10/03 KIT ATION EVALU E L B AVAILA 5-Output Power-Management IC For Low-Cost PDAs Features ♦ Minimal External Components ♦ 3.3V, 500mA MAIN LDO ♦ 3.3V, 400mA SD Card Output ♦ 1V, 250mA Core LDO ♦ 1.8V, 30mA Second Core LDO ♦ High-Efficiency LCD Boost ♦ LCD 0V True Shutdown when Off ♦ 50µA Quiescent Current ♦ 3.1V to 5.5V Input Range Ordering Information PART TEMP RANGE PIN-PACKAGE MAX1559ETE -40°C to +85°C 16 Thin QFN Typical Operating Circuit INPUT 3.1V TO 5.5V IN ON ENSD COR2 OFF ON ENC2 SDIG Cellular and Cordless Phones MP3 Players SDIG 3.3V, 400mA COR1 1.0V, 250mA COR2 1.8V, 30mA MAX1559 REF Applications Organizers 3.3V, 500mA SWIN The MAX1559 operates from a 3.1V to 5.5V supply and consumes 50mA of no-load supply current. It is packaged in a 1.3W, 16-pin thin QFN with a power pad on the underside of the package. The MAX1559 is specified for operation from -40°C to +85°C. PDAs MAIN LCD OFF OFF ON SW ENLCD D1 Hand-Held Devices LCD 20V, 1mA LX TO MAIN LFB RESET OUT RS True Shutdown is a trademark of Maxim Integrated Products, Inc. *Protected by U.S. Patent #6,507,172. GND Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1559 General Description The MAX1559 is a complete power-management chip for low-cost personal digital assistants (PDAs) and portable devices operating from a 1-cell lithium-ion (Li+) or 3-cell NiMH battery. It includes all the regulators, outputs, and voltage monitors necessary for small PDAs while requiring a bare minimum of external components. Featured are four linear regulators, a DC-DC boost converter for LCD bias, a microprocessor reset output, and low-battery shutdown in a miniature QFN package. For a compatible Li+ charger for both USB and AC adapter inputs, refer to the MAX1551*. The four linear regulators feature PMOS pass elements for efficient low-dropout operation. A MAIN LDO supplies 3.3V at 500mA. A signal-detect (SD) card-slot output supplies 3.3V at 400mA. The COR1 LDO outputs 1V at 250mA, and the COR2 LDO supplies 1.8V at 30mA. The SD output and COR2 LDO have pin-controlled shutdown. For other output-voltage combinations, contact Maxim. The DC-DC boost converter features an on-board MOSFET and True Shutdown™ when off. This means that during shutdown, input power is disconnected from the inductor so that the boost output falls to 0V rather than remaining one diode drop below the input voltage. A µP reset output clears when the MAIN LDO achieves regulation to ensure an orderly start. Thermal shutdown protects the die from overheating. MAX1559 5-Output Power-Management IC For Low-Cost PDAs ABSOLUTE MAXIMUM RATINGS IN, SWIN, ENSD, ENC2, ENLCD, RS, SDIG to GND .........................................................-0.3V to +6V LX to GND ..............................................................-0.3V to +30V MAIN, COR1, COR2, REF, LFB to GND ......-0.3V to (VIN + 0.3V) SWIN to IN .............................................................-0.3V to +0.3V Current into LX or SWIN .............................................300mARMS Current Out of SW ......................................................300mARMS Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin Thin QFN (derate 16.9mW/°C above +70°C) ...1.349W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V V GENERAL IN, SWIN Voltage Range Operating 3.1 IN Complete Shutdown Threshold VIN falling 2.95 3 3.05 IN Restart Threshold VIN rising 3.51 3.6 3.69 V IN, SWIN Operating Current—All On VLFB = 1.3V 100 125 µA IN Operating Current—All On Except LCD ENLCD = GND 90 110 µA IN Operating Current—MAIN and COR1 On ENLCD = ENC2 = ENSD = GND, LDO loads = 0µA 50 65 µA IN, SWIN Operating Current—Shut Down VSWIN = VIN = 2.9V REF Output Voltage IREF = 0µA to 5µA 2 10 µA 1.235 1.25 1.265 V 3.2175 3.3 3.3825 V 3.093 3.173 3.252 V 3.0100 3.094 3.1755 V 630 900 1200 mA mV LDOs MAIN Output Voltage ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V RS Deassert Threshold for MAIN Rising RS Assert Threshold MAIN Falling MAIN Current Limit MAIN Dropout Voltage (0.7Ω typ) SDIG Output Voltage ILOAD = 1mA 210 310 ILOAD = 500mA 350 525 3.3 3.3825 V 630 825 mA mV ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V SDIG Current Limit SDIG Dropout Voltage (0.85Ω typ) (Note 1) 420 0.80 ILOAD = 200mA 170 300 ILOAD = 400mA 340 600 7 15 µA 0.960 1 1.025 V 250 450 750 mA VSDIG = 5V, ENSD = VIN = GND COR1 Output Voltage ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V 2 3.2175 ILOAD = 1mA SDIG Reverse Leakage Current COR1 Current Limit 1 ILOAD = 300mA _______________________________________________________________________________________ 5-Output Power-Management IC For Low-Cost PDAs (VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER COR2 Output Voltage CONDITIONS ILOAD = 100µA to 20mA, VIN = 3.6V to 5.5V COR2 Current Limit MIN TYP MAX UNITS 1.755 1.8 1.845 V 30 50 100 mA 28 V 210 250 285 mA LCD LX Voltage Range LX Current Limit L1 = 10µH LX On-Resistance Ω 1.7 LX Leakage Current VLX = 28V 2 µA 8 11 14 µs VLFB > 1.1V 0.8 1 1.2 VLFB < 0.8V (soft-start) 3.9 5 6.0 1.23 1.25 1.27 V 5 100 nA 0.01 1 µA 1 1.75 Maximum LX On-Time Minimum LX Off-Time LFB Feedback Threshold LFB Input Bias Current VLFB = 1.3V SW Off Leakage Current SW = GND, VSWIN = 5.5V, ENLCD = GND SW PMOS On-Resistance µs Ω SW PMOS Peak Current Limit 700 mA SW PMOS Ave Current Limit 300 mA 0.13 ms Soft-Start Time CSW = 1µF LOGIC IN AND OUT EN_ Input Low Level VIN = 3.1V to 5.5V EN_ Input High Level VIN = 3.1V to 5.5V EN_ Input Leakage Current RS, Output Low Level Sinking 1mA, VIN = 2.5V RS, Output High Leakage VOUT = 5.5V 0.4 V 0.01 1 µA 0.25 0.4 V 1 µA 1.4 V THERMAL PROTECTION Thermal-Shutdown Temperature Rising temperature +160 °C _______________________________________________________________________________________ 3 MAX1559 ELECTRICAL CHARACTERISTICS (continued) MAX1559 5-Output Power-Management IC For Low-Cost PDAs ELECTRICAL CHARACTERISTICS (VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN MAX UNITS GENERAL IN, SWIN Voltage Range Operating 3.1 5.5 V IN Complete Shutdown Threshold VIN falling 2.95 3.05 V IN Restart Threshold VIN rising 3.51 3.69 V IN, SWIN Operating Current—All On VLFB = 1.3V 125 µA IN Operating Current—All On Except LCD ENLCD = GND 110 µA IN Operating Current—MAIN and COR1 On ENLCD = ENC2 = ENSD = GND, LDO loads = 0µA 65 µA IN, SWIN Operating Current—Shut Down VSWIN = VIN = 2.9V 10 µA 3.3825 V LDOs MAIN Output Voltage ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V RS Deassert Threshold for MAIN Rising RS Assert Threshold MAIN Falling MAIN Current Limit MAIN Dropout Voltage (0.7Ω typ) (Note 1) SDIG Output Voltage 3.2175 3.093 3.252 V 3.0100 3.1755 V 630 1200 mA ILOAD = 300mA 310 ILOAD = 500mA 525 ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V SDIG Current Limit mV 3.2175 3.3825 V 420 825 mA ILOAD = 1mA 800 ILOAD = 200mA 300 ILOAD = 400mA 600 SDIG Reverse Leakage Current VSDIG = 5V, ENSD = VIN = GND 15 µA COR1 Output Voltage ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V 0.96 1.025 V 250 750 mA 1.755 1.845 V 30 100 mA 28 V 200 285 mA 2 µA 8 14 µs VLFB > 1.1V 0.8 1.2 VLFB < 0.8V (soft-start) 3.9 6.0 1.220 1.270 SDIG Dropout Voltage (0.75Ω typ) COR1 Current Limit COR2 Output Voltage ILOAD = 100µA to 20mA, VIN = 3.6V to 5.5V COR2 Current Limit mV LCD LX Voltage Range LX Current Limit L1 = 10µH LX Leakage Current VLX = 28V Maximum LX On-Time Minimum LX Off-Time LFB Feedback Threshold 4 _______________________________________________________________________________________ µs V 5-Output Power-Management IC For Low-Cost PDAs (VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN LFB Input Bias Current VLFB = 1.3V SW Off-Leakage Current SW = GND, VSWIN = 5.5V, ENLCD = GND MAX UNITS 100 nA 1 µA 0.4 V LOGIC IN AND OUT EN_ Input Low Level VIN = 3.1V to 5.5V EN_ Input High Level VIN = 3.1V to 5.5V 1.4 V EN_ Input Leakage Current 1 RS, Output Low Level Sinking 1mA, VIN = 2.5V RS, Output High Leakage VOUT = 5.5V µA 0.4 V 1 µA Note 1: Specification is guaranteed by design, not production tested. Note 2: Specifications to -40°C are guaranteed by design, not production tested. Typical Operating Characteristics (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) 300 200 100 250 200 150 100 100 200 300 ILOAD (mA) 400 500 600 3.00 2.75 2.50 2.25 1.75 0 0 3.25 2.00 50 0 3.50 OUTPUT VOLTAGE (V) 400 MAIN OUTPUT VOLTAGE vs. LOAD CURRENT MAX1559 toc02 MAX1559 toc01 300 DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 500 SDIG DROPOUT VOLTAGE vs. LOAD CURRENT MAX1559 toc03 MAIN DROPOUT VOLTAGE vs. LOAD CURRENT 1.50 0 50 100 150 ILOAD (mA) 200 250 300 0 100 200 300 400 500 600 700 800 900 ILOAD (mA) _______________________________________________________________________________________ 5 MAX1559 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) COR1 OUTPUT VOLTAGE vs. LOAD CURRENT OUTPUT VOLTAGE (V) 3.00 2.75 2.50 2.25 1.0 1.75 OUTPUT VOLTAGE (V) 3.25 2.00 MAX1559 toc05 1.2 MAX1559 toc04 3.50 COR2 OUTPUT VOLTAGE vs. LOAD CURRENT 0.8 MAX1559 toc06 SDIG OUTPUT VOLTAGE vs. LOAD CURRENT OUTPUT VOLTAGE (V) 1.50 1.25 1.00 0.6 2.00 0.75 1.75 0.4 1.50 0 100 200 300 400 500 600 0.50 0 100 ILOAD (mA) 200 300 400 0 10 20 ILOAD (mA) 30 LOAD STEP RESPONSE (COR1) MAX1559 toc07 MAX1559 toc08 0V VMAIN AC-COUPLED 50mV/div 0V VCOR1 AC-COUPLED 20mV/div 0A ILOAD 100mA/div 0A ILOAD 100mA/div 40µs/div 40µs/div INPUT CURRENT vs. INPUT VOLTAGE LCD SWITCH WAVEFORM VIN RISING VIN FALLING 100 MAX1559 toc09 MAX1559 toc10 125 0V VIN AC-COUPLED 20mV/div 0V LX 10V/div 75 50 25 LCD AC-COUPLED 20mV/div 0V 0 0 1 2 3 4 5 2µs/div VIN (V) 6 40 ILOAD (mA) LOAD STEP RESPONSE (MAIN) IIN (µA) MAX1559 5-Output Power-Management IC For Low-Cost PDAs _______________________________________________________________________________________ 50 5-Output Power-Management IC For Low-Cost PDAs LCD EFFICIENCY vs. LOAD CURRENT ENABLE RESPONSE TO LCD MAX1559 toc11 MAX1559 toc12 85 RL = 30Ω CL = 47µF ENSD 5V/div 0V LCD 2V/div LCD BOOST SOFT-START SW TURN-ON SDIG 1V/div 0V 80 EFFICIENCY (%) ENSD 2V/div 0V MAX1559 toc13 ENABLE RESPONSE TO ENSD VLCD = 18V VLCD = 15V MAX1559 Typical Operating Characteristics (continued) (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) 75 70 65 0V 60 200µs/div 0 400µs/div 1 2 3 4 5 ILOAD (mA) LCD OUTPUT VOLTAGE vs. LOAD CURRENT 18.75 OUTPUT VOLTAGE (V) 18.50 18.25 18.00 17.75 MAX1559 toc15 18.75 MAX1559 toc16 19.00 MAX1559 toc14 19.00 OUTPUT VOLTAGE (V) POWER-ON TIMING FOR 3.3V MAIN AND RESET SIGNAL LCD OUTPUT VOLTAGE vs. INPUT VOLTAGE 0V 18.00 17.25 0V 3 4 5 3.5 4.0 IIN (mA) 4.5 5.0 10ms/div 5.5 VIN (V) POWER-ON TIMING FOR 3.3V MAIN AND 1V CORE MAX1559 toc17 3.6V 0V RS EXTERNAL RC SET FOR 10ms DELAY FROM 1V GOOD 0V 17.00 2 COR1 1V/div RS 1V/div 17.75 17.25 1 3.3V MAIN ACTIVATED WHEN VIN RISES TO 3.6V 18.25 17.50 0 2.6V 18.50 17.50 17.00 VIN 1V/div MAIN 1V/div 4V VIN 1V/div MAIN 1V/div COR1 NOT ACTIVATED UNTIL 3.3V IN REGULATION POWER-OFF TIMING FOR 3.3V MAIN, 1V CORE, AND RESET SIGNAL MAX1559 toc18 4V 3.3V 1V COR1 1V/div COR1 DEACTIVATED AND RS LOW WHEN MAIN FALLS TO 3V 3.3V MAIN DEACTIVATED WHEN VIN FALLS TO 3V VIN 1V/div MAIN 1V/div COR1 1V/div 2.4V 0V RS 1V/div RS 1V/div 0V 200µs/div 4ms/div _______________________________________________________________________________________ 7 5-Output Power-Management IC For Low-Cost PDAs MAX1559 Pin Description PIN FUNCTION 1 COR1 2 IN 1V, 250mA LDO Output for CPU Core. COR1 turns off when VIN < 3V or MAIN < 3.1V. 3 SDIG 3.3V, 400mA LDO Output for Secure Digital Card Slot. SDIG has reverse current protection so SDIG can be biased when no power is present at IN. SDIG output turns off when VIN < 3V or when ENSD goes low. 4 ENSD SDIG Enable Input. Drive ENSD low to turn off SDIG and high to turn on. SDIG cannot be activated when VIN < 3V. 5 REF 1.25V Reference. Bypass with 0.1µF to GND. 6 RS Reset Output. RS is an active-low, open-drain output that goes low when VMAIN falls below 3.1V. RS deasserts when VMAIN goes above 3.2V. Connect a 1MΩ pullup resistor from RS to MAIN. Input Voltage to the Device. Bypass to GND with a 1µF capacitor. 7 N.C. Not Connected 8 GND Ground 9 LX LCD Boost Switch. Connect to a boost inductor and Schottky diode. See Figure 1. 10 SW LCD True Shutdown Switch Output. SW is the power source for the boost inductor. SW turns on when ENLCD is high. For best efficiency, bypass SW with 4.7µF to GND. 11 SWIN LCD True Shutdown Switch Input. The SWIN-to-SW switch turns off when ENLCD goes low or when VIN < 3V. Connect SWIN to IN. 12 LFB LCD Feedback Input. Connect LFB to a resistor-divider network between the LCD output and GND. The feedback threshold is 1.25V. 13 ENLCD Enable Input for LCD (Boost Regulator). Drive ENLCD high to activate the LCD boost. Drive ENLCD low to shut down the LCD output. The LCD cannot be activated when VIN < 3V. 14 ENC2 Enable Input for Secondary Core LDO (COR2). Drive ENC2 high to turn on COR2 and low to turn off. COR2 cannot be activated when VIN < 3V. 15 COR2 1.8V, 30mA LDO Output for Secondary Core. COR2 turns off when VIN < 3V or when ENC2 goes low. 16 MAIN 3.3V, 500mA LDO Output for Main Supply. MAIN output turns off when VIN < 3V. Detailed Description Linear Regulators The MAX1559 contains all power blocks and voltage monitors for a small PDA. Power for logic and other subsystems are provided by four LDOs: • MAIN—Provides 3.3V at a guaranteed 500mA with a typical current limit of 900mA. • SDIG—Provides 3.3V at a guaranteed 400mA for secure digital cards with a typical current limit of 630mA. 8 • COR1—1V for CPU core guarantees 250mA and a typical current limit of 450mA. • COR2—1.8V for CODEC core guarantees 30mA and a typical current limit of 50mA. Note that it may not be possible to draw the rated current of MAIN and SDIG at all operating input voltages due to the dropout limitations of those regulators. The typical dropout resistance of the MAIN regulator is 0.7Ω (350mV drop at 500mA), and the typical dropout resistance of the SDIG regulator is 0.85Ω (340mV drop at 400mA). _______________________________________________________________________________________ 5-Output Power-Management IC For Low-Cost PDAs LCD DC-DC Boost In addition to the LDOs, the MAX1559 also includes a low-current, high-voltage DC-DC boost converter for LCD bias. This circuit can output at up to 28V and can be adjusted with either an analog or PWM control signal using external components. SW provides an input-power disconnect for the LCD when ENLCD is low (off). The input-power disconnect function is ideal for applications that require the output voltage to fall to 0V in shutdown (True Shutdown). If True Shutdown is not required, the SW switch can be bypassed by connecting the boost inductor directly to IN and removing the bypass cap on SW (C9 in Figure 1). System Sleep All regulated outputs turn off when VIN falls below 3V. The MAX1559 resumes normal operation when V IN rises above 3.6V. Reset Output ESR and are commonly available in values up to 10µF. X7R and X5R dielectrics are recommended. Note that some ceramic dielectrics, such as Z5U and Y5V, exhibit large capacitance and ESR variation with temperature and require larger than the recommended values to maintain stability over temperature. LCD Boost Output Selecting an Inductor The LCD boost is designed to operate with a wide range of inductor values (4.7µH to 22µH). Smaller inductance values typically offer smaller size for a given series resistance or saturation current. Smaller values make LX switch more frequently for a given load and can reduce efficiency at low load currents. Larger values reduce switching losses due to less frequent switching for a given load, but higher resistance can then reduce efficiency. A 10µH inductor provides a good balance and works well for most applications. The inductor’s saturation current rating should be greater than the peak switching current (250mA); however, it is generally acceptable to bias some inductors into saturation by as much as 20%, although this slightly reduces efficiency. Selecting a Diode Schottky diodes rated at 250mA or more, such as the Motorola MBRS0530 or Nihon EP05Q03L are recommended. The diode reverse-breakdown voltage rating must be greater than the LCD output voltage. Reset (RS) asserts when VMAIN falls below 3.094V. RS is an open-drain, active-low output. Connect a 1MΩ resistor from RS to MAIN. To implement a reset deassertion delay, add a capacitor from RS to GND. An approximate 10ms delay can be generated with 1MΩ and 22nF. This results in a 22ms time constant, but assumes the input threshold of the CPU reset input is approximately 1V and is reached approximately 10ms after RS goes high impedance. Timing for RS, 3.3V MAIN, and 1V COR1 is shown in Figure 3. Selecting Capacitors For most applications, use a small 1µF LCD output capacitor. This typically provides a peak-to-peak output ripple of 30mV. In addition, bypass IN with 1µF and SW with 4.7µF ceramic capacitors. An LCD feed-forward capacitor, connected from the output to FB, improves stability over a wide range of battery voltages. A 10pF capacitor is sufficient for most applications; however, this value is also affected by PC board layout. Applications Information Setting the LCD Voltage Adjust the output voltage by connecting a voltagedivider from the output (VOUT) to FB (Figure 1). Select R2 between 10kΩ and 200kΩ. Calculate R1 with the following equation: LDO Output Capacitors (MAIN, SDIG, COR1, and COR2) Capacitors are required at each output of the MAX1559 for stable operation over the full load and temperature range. See Figure 1 for recommended capacitor values for each output. To reduce noise and improve load transients, large output capacitors at up to 10µF can be used. Surface-mount ceramic capacitors have very low R1 = R2 [(VOUT / VFB) - 1] where VFB = 1.25V and VOUT can range from VIN to 28V. The input bias current of FB is typically only 5nA, which allows large-value resistors to be used. For less _______________________________________________________________________________________ 9 MAX1559 MAIN and COR1 regulators are always on as long as the IC is not in low-voltage shutdown (VIN < 3V). COR2 and SDIG can be turned on and off independently by logic signals at ENC2 and ENSD, respectively, but cannot be activated if VIN < 3V. When SDIG is turned off, reverse current is blocked so the SDIG output can be biased with an external source when no power is present at IN. Leakage current is typically 3µA with 3.3V at SDIG. MAX1559 5-Output Power-Management IC For Low-Cost PDAs AC ADAPTER INPUT 3.5V TO 7V DC MAX1551 BATT 1µF MAX1559 IN C1 1µF 1µF MAIN SWIN SD USB INPUT 3.5V TO 6.0V USB TO MAIN COR1 1µF POK LOW WHEN EITHER USB OR DC IS ABOVE UV AND ABOVE BATT POWER PRESENT (EITHER DC OR USB) PG OFF 3.3V, 400mA C3 SD CARD SLOT 4.7µF 1V, 250mA CPU CORE 1 C4 4.7µF COR2 1.8V, 30mA CORE 2 C5 1µF LCD OFF SWITCH ENSD GND 3.3V, 500mA MAIN POWER C2 4.7µF ON SW ENC2 ENLCD LX C6 4.7µF L1 10µH MURATA LQH3C TO MAIN R1 1.5MΩ LCD BOOST R3 1MΩ C8 47pF LCD 15V C7 1µF LFB RESET OUT C9 22nF RS REF REF C10 0.1µF GND R2 100kΩ CONNECTION FOR PWM-CONTROLLED LCD BIAS Figure 1. Typical Operating Circuit with Charger and External PWM LCD Control than 1% error, the current through R2 should be greater than 100 times the feedback input bias current (IFB). voltage (VDOUT) can be calculated using the following formula: LCD Adjustment The LCD boost output can be digitally adjusted by either a DAC or PWM signal. R (V − VDOUT )R1 VOUT = VREF 1 + 1 + REF R RD 2 DAC Adjustment Adding a DAC and a resistor, RD, to the divider-circuit (Figure 4) provides DAC adjustment of VOUT. Ensure that VOUT(MAX) does not exceed the LCD panel rating. The output voltage (VOUT) as a function of the DAC Using a PWM Signal Many microprocessors have the ability to create PWM outputs. These are digital outputs, based on either 16-bit or 8-bit counters, with a programmable duty cycle. In many applications, they are suitable for adjusting the output of the MAX1559 as seen in Figure 1. 10 ______________________________________________________________________________________ 5-Output Power-Management IC For Low-Cost PDAs MAX1559 MAX1559 IN MAIN LDO CONTROL SWIN RS 3.3V, 500mA RESET OUTPUT REF ENSD OFF ON ENC2 ENLCD LCD OFF SWITCH LDO CONTROL COR1 LDO CONTROL SDIG LDO CONTROL COR2 1V, 250mA 3.3V, 400mA 1.8V, 30mA SW LX LCD BOOST LCD 20V 1mA LFB REF REF BIAS CURRENT GND THSD Figure 2. Functional Diagram The circuit consists of the PWM source, capacitor C10, and resistors RD and RW. To analyze the transfer function of the PWM circuit, it is easiest to first simplify it to its Thevenin equivalent. The Thevenin voltage can be calculated using the following formula: VTHEV = (D ✕ VOH) + (1 - D) ✕ VOL where D is the duty cycle of the PWM signal, VOH is the PWM output high level (often 3.3V), and V OL is the PWM output low level (usually 0V). For CMOS logic, this equation simplifies to: VTHEV = D ✕ VDD ______________________________________________________________________________________ 11 MAX1559 5-Output Power-Management IC For Low-Cost PDAs where VDD is the I/O voltage of the PWM output. The Thevenin impedance is the sum of resistors RW and RD: RTHEV = RD+ RW The output voltage (VOUT) as a function of the PWM average voltage (VTHEV) is: VIN R (V − VTHEV ) × R1 VOUT = VREF × 1+ 1 + REF RTHEV R2 3.3V MAIN When using the PWM adjustment method, RD isolates the capacitor from the feedback loop of the MAX1559. The cutoff frequency of the lowpass filter is defined as: 1V COR1 1 fC = 2 × π × RTHEV The cutoff frequency should be at least 2 decades below the PWM frequency to minimize the induced AC ripple at the output. An important consideration is the turn-on transient created by the initial charge on the filter capacitor C10. This capacitor forms a time constant with RTHEV, which causes the output to initialize at a higher than intended voltage. This overshoot can be minimized by scaling R D as high as possible compared to R1 and R2. Alternately, the µP can briefly keep the LCD disabled until the PWM voltage has had time to stabilize. PC Board Layout and Grounding Careful PC board layout is important for minimizing ground bounce and noise. Keep the MAX1559’s ground pin and the ground leads of the input and output capacitors less than 0.2in (5mm) apart. In addition, keep all connections to FB and LX as short as possible. In particular, external feedback resistors should be as close to FB as possible. To minimize output voltage ripple and to maximize output power and efficiency, use a ground plane and solder GND directly to the ground plane. Refer to the MAX1559 evaluation kit for a layout example. 12 3.3V ACTIVATED WHEN VIN RISES TO 3.6V 3.3V DEACTIVATED WHEN VIN FALLS TO 3.0V COR1 NOT ACTIVATED UNTIL 3.3V IN REGULATION COR1 DEACTIVATED AND RS LOW WHEN MAIN FALLS TO 3V RS OUTPUT RS EXTERNAL RC SET FOR 10ms DELAY FROM 1V GOOD Figure 3. RS and Power-On, Power-Off Timing for 3.3V and 1V Core Thermal Considerations In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed backside pad of the QFN package to a large analog ground plane, preferably on a surface of the board that receives good airflow. Typical applications use multiple ground planes to minimize thermal resistance. Avoid large AC currents through the analog ground plane. ______________________________________________________________________________________ 5-Output Power-Management IC For Low-Cost PDAs MAX1559 VIN FEEDBACK RESISTORS SIMPLIFIED DC-DC CONVERTER R1 AVDD i1 RD VDOUT DAC ERROR AMP i2 iD R2 VOUT (LCD BIAS) CONTROL VREF 1.25V MAX1559 Figure 4. Adjusting the Output Voltage with a DAC COR1 1 IN 2 COR2 ENC2 ENLCD TOP VIEW MAIN Pin Configuration 16 15 14 13 Chip Information PROCESS: BiCMOS TRANSISTOR COUNT: 1872 12 LFB 11 SWIN MAX1559 ENSD 4 9 REF 5 6 7 8 GND 10 SW N.C. 3 RS SDIG LX THIN QFN ______________________________________________________________________________________ 13 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 24L QFN THIN.EPS MAX1559 5-Output Power-Management IC For Low-Cost PDAs PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm 21-0139 A PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm 21-0139 A Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.