White Electronic Designs WEDPS512K32V-XBX 512Kx32 SRAM 3.3V MULTI-CHIP PACKAGE FEATURES Access Times of 12, 15, 17, 20ns Low Power Data Retention 'L' Option Packaging TTL Compatible Inputs and Outputs Fully Static Operation: • 143 PBGA, 16mm x 18mm, 288mm2 Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8 • No clock or refresh required. Three State Output. Commercial, Industrial and Military Temperature Ranges Low Voltage Operation: This product is subject to change without notice. • 3.3V ± 10% Power Supply PIN CONFIGURATION FOR WEDPS512K32V-XBX Top View 1 2 3 4 5 6 7 8 9 10 11 12 A - A2 A1 A0 GND GND VCC VCC A18 A17 A16 GND B CS2# A3 A4 D14 D15 NC CS4# D24 D25 OE# A15 NC C D9 D8 NC D12 D13 GND VCC D26 D27 WE4# D31 D30 D29 D D10 D11 GND GND GND GND VCC VCC VCC VCC D28 E WE2# GND GND GND GND GND VCC VCC VCC VCC VCC NC F GND GND GND GND GND GND VCC VCC VCC VCC VCC VCC G VCC VCC VCC VCC VCC VCC GND GND GND GND GND GND H CS1# VCC VCC VCC VCC VCC GND GND GND GND GND NC J D1 D0 VCC VCC VCC VCC GND GND GND GND D23 D22 K D2 D3 NC D7 D5 VCC GND D17 D16 CS3# D20 D21 L WE1# A6 A5 D6 D4 NC WE3# D19 D18 A14 A13 NC M GND A7 A8 A9 vcc vcc GND GND A10 A11 A12 vcc Pin Description I/O0-31 June 2004 Rev. 5 Block Diagram WE1# CS1# Data Inputs/Outputs A0-18 Address Inputs WE1-4# Write Enables CS1-4# Chip Selects OE# Output Enable VCC Power Supply GND Ground NC Not Connected WE2# CS2# WE3# CS3# WE4# CS4# OE# A0-18 512K X 8 8 I/O0 - 7 1 512K X 8 8 I/O8 - 15 512K X 8 8 I/O16 - 23 512K X 8 8 I/O24 - 31 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX ABSOLUTE MAXIMUM RATINGS Parameter Operating Temperature Storage Temperature Signal Voltage Relative to GND Junction Temperature Supply Voltage Symbol TA TSTG VG TJ VCC Min -55 -65 -0.5 TRUTH TABLE Max +125 +150 4.6 150 4.6 -0.5 Unit °C °C V °C V CS# H L L L Symbol VCC VIH VIL Min 3.0 2.2 -0.3 Max 3.6 VCC + 0.3 +0.8 WE# X H L H Mode Standby Read Write Out Disable Data I/O High Z Data Out Data In High Z Power Standby Active Active Active BGA THERMAL RESISTANCE RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Input High Voltage Input Low Voltage OE# X L X H Parameter Symbol Junction to Ambient (No Airflow) Theta JA Unit V V V Junction to Ball Theta JB Theta JC Junction to Case (Top) Max 16.9 11.3 9.8 Unit °C/W °C/W °C/W Note 1 1 1 NOTE: Refer to Application Note "PBGA Thermal Resistance Correlation" at www.wedc.com in the application notes section for modeling conditions. CAPACITANCE Ta = +25°C Symbol COE CWE CCS CI/O CAD Parameter OE# capacitance WE1-4# capacitance CS1-4# capacitance Data I/O capacitance Address input capacitance Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz Max 30 10 10 10 30 Unit pF pF pF pF pF This parameter is guaranteed by design but not tested. DC CHARACTERISTICS VCC = 3.3V ± 0.3V, -55°C ≤ TA ≤ +125°C Parameter Symbol Conditions Input Leakage Current Output Leakage Current Operating Supply Current (x 32 Mode) Standby Current Output Low Voltage Output High Voltage ILI ILO ICC x 32 ISB VOL VOH VIN = GND to VCC CS# = VIH, OE# = VIH, VOUT = GND to VCC CS# = VIL, OE# = VIH, f = 5MHz, VCC = 3.6V CS# = VIH, OE# = VIH, f = 5MHz, VCC = 3.6V IOL = 4.0mA IOH = -4.0mA Min Units Max 10 10 400 120 0.4 µA µA mA mA V V 2.4 NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V. Contact factory for low power option. DATA RETENTION CHARACTERISTICS (WEDPS512K32LV-XBX only) -55°C ≤ TA ≤ +125°C Parameter Symbol Conditions Data Retention Voltage VCC VCC = 2.19V Data Retention Current ICCDR CS = VCC - 0.2V June 2004 Rev. 5 Min Max 2.19 V 8.0 2 Units mA White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX AC CHARACTERISTICS VCC = 3.3V, -55°C ≤ TA ≤ +125°C Parameter Read Cycle Symbol Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z tRC tAA tOH tACS tOE tCLZ1 tOLZ1 tCHZ1 tOHZ1 -12 Min 12 -15 Max Min 15 -17 Max 12 Min 17 -20 Max 15 0 0 1 0 17 8 1 0 7 7 ns ns ns ns ns ns ns ns ns 20 0 15 8 1 0 Units Max 17 0 12 7 Min 20 20 10 1 0 8 8 8 8 10 10 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS VCC = 3.3V, -55°C ≤ TA ≤ +125°C Parameter Write Cycle Symbol -12 Min Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold Time tWC tCW tAW tDW tWP tAS tAH tOW1 tWHZ1 tDH -15 Max Min 12 10 10 8 10 0 0 2 -17 Max 15 12 12 9 12 0 0 2 7 Min -20 Max 17 12 12 9 14 0 0 3 8 0 0 Min Units Max 20 14 14 10 14 0 0 3 8 0 ns ns ns ns ns ns ns ns ns ns 9 0 1. This parameter is guaranteed by design but not tested. FIGURE 4 – AC TEST CIRCUIT AC Test Conditions Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level Output Timing Reference Level IOL Current Source VZ ≈ 1.5V (Bipolar Supply) D.U.T. Ceff = 50 pf Unit V ns V V Notes: V Z is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω. V Z is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. IOH Current Source June 2004 Rev. 5 Typ VIL = 0, VIH = 3.0 5 1.5 1.5 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX TIMING WAVEFORM - READ CYCLE CS# OE# READ CYCLE 2, (CS# = OE# = VIL, WE# = VIH) READ CYCLE 2 (WE# = VIH) WRITE CYCLE - WE# CONTROLLED CS# WE# WRITE CYCLE 1, WE# CONTROLLED WRITE CYCLE - CS# CONTROLLED CS# WE# WRITE CYCLE 2, CS# CONTROLLED June 2004 Rev. 5 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX PACKAGE 756: 143 BALL GRID ARRAY BOTTOM VIEW 12 11 10 9 8 7 6 5 4 3 2 1 A 16.25 (0.640) MAX B C D 13.97 (0.550) BSC 1.27 (0.050) BSC E F G H J K L M 0.61 (0.024) BSC 1.27 (0.050) BSC 13.97 (0.550) BSC 1.93 (0.076) MAX 18.25 (0.719) MAX ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES June 2004 Rev. 5 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX ORDERING INFORMATION WED P S 512K 32 L V - XX X X WHITE ELECTRONIC DESIGNS CORP. PLASTIC SRAM ORGANIZATION, 512Kx32 User configurable as 1Mx16 or 2Mx8 OPTIONS: L = Low power data retention Low Voltage Supply 3.3V ± 10% ACCESS TIME (ns) PACKAGE TYPE: B = 143 PBGA, 16mm x 18mm, 288mm2 DEVICE GRADE: M = MILITARY SCREENED -55°C TO +125°C I = INDUSTRIAL -40°C TO 85°C C = COMMERCIAL 0°C TO +70°C June 2004 Rev. 5 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WEDPS512K32V-XBX Document Title 512K x 32 SRAM PBGA Multi-Chip Package Revision History Rev # History Release Date Status Rev 0 Initial Release March 2002 Advanced Rev 1 Changes (Pg. 1) March 2002 Advanced May 2002 Advanced May 2002 Advanced January 2003 Final June 2004 Final 1.1 Switch Rows and Columns header position Rev 2 Changes (Pg. 1) 2.1 Switch Rows and Columns header position (Pg. 1) Rev 3 Changes (Pg. 1, 5) 3.1 Remove excess white space from package drawing for to create a consistent accurate style. Rev 4 Changes (Pg. 1, 2, 7) 4.1 Add Thermal Resistance Table 4.2 Change product status to Final Rev 5 Changes (Pg. 1, 2, 6, 7) 5.1 Add low power data retention option June 2004 Rev. 5 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com