19-2972; Rev 0; 9/03 MAX2009/MAX2010 Evaluation Kits Features ♦ Fully Assembled and Tested ♦ Frequency Range 1200MHz to 2500MHz (MAX2009) 500MHz to 1100MHz (MAX2010) ♦ Up to 12dB ACPR Improvement* ♦ Independent Adjustable Gain and Phase Expansion ♦ Low Power Consumption *Performance dependent on amplifier, bias, and modulation. Component Suppliers SUPPLIER Johnson PHONE WEBSITE 507-833-8822 www.johnsoncomponents.com Murata 770-436-1300 www.murata.com Skyworks 781-376-3018 www.alphaind.com TOKO 800-745-8656 www.toko.com Ordering Information TEMP RANGE PIN-PACKAGE MAX2009EVKIT PART -40°C to +85°C 28 Thin QFN-EP* MAX2010EVKIT -40°C to +85°C 28 Thin QFN-EP* *EP = Exposed paddle. MAX2009 Component List DESCRIPTION MAX2010 Component List DESIGNATION QTY DESCRIPTION DESIGNATION QTY C1, C6, C8, C10 4 8.2pF ±0.25pf 50V C0G ceramic capacitors (0402) Murata GRP1555C1H8R2C C1, C2, C3, C10 4 100pF ±5%, 50V C0G ceramic capacitors (0402) Murata GRP1555C1H101J C2, C3 2 1.5pF ±0.1pF, 50V C0G ceramic capacitors (0402) Murata GRP1555C1H1R5B C4, C5 2 0.01µF ±10%, 50V X7R ceramic capacitors (0603) Murata GRM188R71H103K C4, C5 2 0.01µF ±10%, 50V X7R ceramic capacitors (0603) Murata GRM188R71H103K C6, C8 2 15pF ±5%, 50V C0G ceramic capacitors (0402) Murata GRP1555C1H150J C7, C9 2 0.5pF ±0.1pF, 50V C0G ceramic capacitors (0402) Murata GRP1555C1HR50B C7, C9 0 Not installed C11, C12 0 Not installed C11, C12 2 2.2pF ±0.1pF, 50V C0G ceramic capacitors (0402) Murata GRP1555C1H2R2B J1, J2, J3, J4 4 PC board edge mount SMA RF connectors (flat-tab launch) Johnson 142-0741-856 J1, J2, J3, J4 4 PC board edge-mount SMA RF connectors (flat-tab launch) Johnson 142-0741-856 J5 1 2 x 10 header, 0.100in centers Molex 10-89-1201 J5 1 R1, R2, R3 3 1kΩ ±5% resistors (0402) 2 x 10 header, 0.100in centers Molex 10-89-1201 U1 1 MAX2009 28-pin thin QFN-EP Maxim MAX2009ETI-T L1, L2 2 5.6nH ±0.3nH chip inductors (0402) TOKO LL1005-FH5N6S VR1, VR2 2 Hyperabrupt varactor diodes Skyworks SMV1232-079 R1, R2, R3 3 1kΩ ±5% resistors (0402) U1 1 MAX2010 28-pin thin QFN-EP Maxim MAX2010ETI-T VR1, VR2 2 Hyperabrupt varactor diodes Skyworks SMV1232-079 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluate: MAX2009/MAX2010 General Description The MAX2009/MAX2010 evaluation kits (EV kits) simplify the evaluation of the MAX2009 and MAX2010. These kits are fully assembled and tested at the factory. Standard 50Ω SMA connectors are included for all inputs and outputs to facilitate evaluation on the test bench. Each EV kit provides a list of equipment required to evaluate the device, a test procedure, a circuit schematic, a bill of materials (BOM), and artwork for each layer of the PC board. Evaluate: MAX2009/MAX2010 MAX2009/MAX2010 Evaluation Kits Quick Start The MAX2009/MAX2010 EV kits are fully assembled and factory tested. Follow the instructions in the Connections and Setup section for proper device evaluation. Test Equipment Required This section lists the recommended test equipment to verify the operation of the MAX2009/MAX2010. It is intended as a guide only, and substitutions may be possible: • Two DC power supplies capable of delivering +5V and 20mA of continuous current • Four adjustable DC power supplies capable of delivering +5V and 5mA of continuous current • One high-current power supply capable of biasing a preamplifier • One HP 8753D or equivalent network analyzer • One preamplifier with a gain of 25dB in the 500MHz to 1100MHz (MAX2010) or 1200MHz to 2500MHz (MAX2009) frequency range with a minimum output 1dB compression point of 38dBm • One 6dB attenuator • One 3dB high-power attenuator • Two 6dB high-power attenuators Connections and Setup Test Set Calibration 1) Set up the test equipment per Figure 1 with the network analyzer output power disabled. 2) Enable the preamplifier. 3) Set the network analyzer to perform a power sweep from -20dBm to +8dBm at the frequency of interest and enable the output power. For the best results, perform the standard network analyzer calibration with everything except the MAX2009/MAX2010 EV kit. 4) After the calibration, leave the preamplifier connected to port 1 of the network analyzer. Testing the Phase Section—Figure 1 1) With the network analyzer’s power disabled, connect the output attenuator pad of the preamplifier to the SMA labeled PHASE_IN (J1). 2) Connect the SMA labeled PHASE_OUT (J2) to the attenuator pad on port 2 of the network analyzer. 3) With the +5V supply disabled, connect the positive terminal to the header pin labeled VCC_P. Connect the ground terminal to a header pin labeled GND. 2 4) With all adjustable power supplies disabled, set their voltages to the recommended values in Table 1. Connect these supplies to PB_IN, PD_CS1, PD_CS2, and PF_S1*. Connect all ground terminals to the header pins labeled GND. 5) Enable the +5V (VCC_P) power supply first, followed by the adjustable supplies. 6) Enable the output power on the network analyzer. 7) With the recommended settings, the AM-PM response of the phase section should provide a phase expansion breakpoint of approximately 4dBm and a slope of approximately 1.2°/dB. 8) To power down: First disable the network analyzer, preamplifier, adjustable supplies, and then the +5V (VCC_P) supply. Table 1. Phase Section Control Voltages PIN (J5) VOLTAGE (V) PB_IN 0 PD_CS1 0 PD_CS2 0 PF_S1* 5 *Note: PF_S1 is shorted to PF_S2 on layer 4 of the PC board. Testing the Gain Section—Figure 2 1) With the network analyzer’s output power disabled, connect the output attenuator pad of the preamplifier to the SMA labeled GAIN_IN (J3). 2) Connect the SMA labeled GAIN_OUT (J4) to the attenuator pad on port 2 of the network analyzer. 3) With the +5V supply disabled, connect the positive terminal to the header pin labeled VCC_G. Connect the ground terminal to a header pin labeled GND. 4) With all adjustable power supplies disabled, set their voltages to the recommended values in Table 2. Connect these supplies to G_BP, G_FS, and G_CS. Connect all ground terminals to the header pins labeled GND. 5) Enable the +5V (VCC_G) power supply first, followed by the adjustable supplies. 6) Enable the output power on the network analyzer. 7) With the recommended settings, the AM-AM response of the gain section should provide a gain expansion breakpoint of approximately 5dBm and a slope of approximately 0.5dB/dB. 8) To power down: First disable the network analyzer, preamplifier, adjustable supplies, and then the +5V (VCC_G) supply. _______________________________________________________________________________________ MAX2009/MAX2010 Evaluation Kits PIN (J5) VOLTAGE (V) G_BP 1.2 G_FS 5 G_CS 1.0 Detailed Description The following sections describe the tuning methodology best implemented with a class A amplifier. Other classes of operation may require significantly different settings. Supply Decoupling Capacitors Capacitors C4 and C5 are 0.01µF (±10%) and are used for minimizing low-frequency noise on the supply. External Matching Components The MAX2009 external matching networks at the input and output of the phase and gain sections consist of C1, C11, C10, C12, C9, C8, C6, C7, along with some high-impedance transmission lines. The MAX2010 matching consists of C1, C11, L1, L2, C10, C12, C9, C8, C6, and C7. Phase-Tuning Section Varactors VR1 and VR2 provide fine tuning of the phase-expansion slope. Resistors R1 and R2 provide a high-impedance method to inject control voltage on the varactors. Capacitors C2 and C3 are coupling capacitors that also offset the series parasitic inductance of the chip and PC board. If phase-slope fine tuning is not required in the user’s application, then only C2 and C3 to ground are necessary. Gain and Phase Controls The MAX2009/MAX2010 controls can provide real-time software-controlled distortion corrections as well as setand-forget tuning by setting the expansion starting point (breakpoint) and the rate of expansion (slope). The gain and phase breakpoints are adjustable over a 20dB input power range. The phase expansion slope is variable from 0.3°/dB to 2.0°/dB and can be adjusted for a maximum of 24° of phase expansion. The gain expansion slope is variable from 0.1dB/dB to 0.6dB/dB and can be adjusted for a maximum of 7dB gain expansion. Phase-Expansion Breakpoint The PB_IN input voltage range of 0V to VCC corresponds to a breakpoint input power range of 3.7dBm to 23dBm. In order to achieve optimal performance, the phase-expansion breakpoint of the MAX2009/ MAX2010 must be set to equal the phase compression point of the PA. Control pin PBRAW should be shorted to the PBEXP output pin for most applications. Driving PBRAW directly allows for additional control such as obtaining phase compression for some and/or all the input power sweep. Resistor R3 allows the option of driving PBRAW with a low-impedance voltage, which overrides the PBEXP output voltage. Phase-Expansion Slope The phase-expansion slope of the MAX2009/MAX2010 is controlled by the PF_S1, PF_S2, PD_CS1, and PD_CS2 pins. Most applications require PF_S1 and PF_S2 to be driven identically, and therefore they are shorted on layer 4 of the PC board. The phase-expansion slope of the MAX2009/MAX2010 must also be adjusted to equal the opposite slope of the PA’s phase-compression curve. Gain-Expansion Breakpoint The G_BP input voltage range of 0.5V to 5.0V corresponds to a breakpoint input power range of -3dBm to 23dBm. In order to achieve the optimal performance, the gain-expansion breakpoint of the MAX2009/ MAX2010 must be set to equal the gaincompression point of the PA. The G_BP control has a minimal effect on the small-signal gain when operated from 0.5V to 5.0V. Gain-Expansion Slope Both G_CS and G_FS pins have an input voltage range of 0V to VCC, corresponding to a slope of approximately 0.1dB/dB to 0.6dB/dB. The slope is set to maximum when VGCS = 0V and VGFS = +5V, and the slope is at its minimum when VGCS = +5V and VGFS = 0V. In addition to properly setting the breakpoint, the gain-expansion slope of the MAX2009/MAX2010 must also be adjusted in order to compensate for the PA’s gain compression. The slope should be set using the following equation: MAX20XX_SLOPE = −PA _ SLOPE 1 + PA _ SLOPE where: MAX20XX_SLOPE = MAX2009/MAX2010 gain section’s slope in dB/dB. PA_SLOPE = PA’s gain slope in dB/dB, a negative number for compressive behavior. Unlike with the G_BP pin, modifying the gain-expansion slope bias on the G_CS pin causes a change in the part’s insertion loss and noise figure. For example, a smaller slope caused by G_CS results in a better insertion loss and lower noise figure. _______________________________________________________________________________________ 3 Evaluate: MAX2009/MAX2010 Table 2. Gain Section Control Voltages Modifying the EV Kit placement of components on the PC board. The package’s exposed paddle (EP) dissipates heat from the device and provides a low-impedance electrical connection. The EP must be solder attached to a PC board ground pad. This ground pad should be connected to the lower ground plane using multiple ground vias. The MAX2009/MAX2010 PC boards use a 3 x 3 grid of 0.012in diameter plated through holes. The MAX2009 layout uses high-impedance lines on the input and output paths of the gain section to aid in matching. In an actual application, matching capacitors C7, C9, C11, and C12 could be replaced with a microstrip equivalent solution to reduce component count. In order to provide increased tuning range, the ground plane under the varactor control section has been removed. The MAX2009/MAX2010 EV kits are constructed on FR4 with the top dielectric thickness of 0.015in. The external varactors on the EV kit can be replaced with fixed capacitors if dynamic tuning of the fine phaseexpansion slope through PF_S1 and PF_S2 is not required. A closely matched minimum effective capacitance of 2pF to 6pF must be presented at these pins. Component pads for external filtering components are included for pins PB_IN, PB_RAW, G_BP, G_CS, and G_FS. Pins PF_S1 and PF_S2 are shorted together on the EV kit. If independent control is required, disconnect the trace connecting these two pins on the bottom side of the PC board (pins 19 and 20 of J5). Layout Considerations The MAX2009/MAX2010 EV kits can serve as guides to board layout. Pay close attention to thermal design and NETWORK ANALYZER (AG 8753E) +5V POWER SUPPLY (AG E3631A) S21 5 / Ref180 V 6dB HIGH POWER MARKER 1 160° mA 6dB HIGH POWER START -20.0 dBm STOP 8.0 dBm J2 PHASE_OUT U1 +5V POWER SUPPLY (AG E3631A) MAX2009/ MAX2010 V PB_IN PD_CS2 VCC_P J1 PHASE_IN PF_S2 3dB HIGH GND VCC POWER PD_CS1 6dB PF_S1 Evaluate: MAX2009/MAX2010 MAX2009/MAX2010 Evaluation Kits +5V POWER SUPPLY (AG E3631A) 1 20 2 J5 V mA Figure 1. Testing the Phase Section 4 _______________________________________________________________________________________ mA MAX2009/MAX2010 Evaluation Kits Evaluate: MAX2009/MAX2010 +5V POWER SUPPLY (AG E3631A) V mA GND VCC NETWORK ANALYZER (AG 8753E) 3dB HIGH POWER S21 2 / Ref-7 MARKER 1 -13dB V mA J3 GAIN_IN U1 +5V POWER SUPPLY (AG E3631A) START -20.0 dBm STOP 8.0 dBm MAX2009/ MAX2010 V mA G_FS +5V POWER SUPPLY (AG E3631A) 1 20 6dB G_CS VCC_G G_BP J4 6dB HIGH POWER GAIN_OUT 6dB HIGH POWER 2 J5 Figure 2. Testing the Gain Section _______________________________________________________________________________________ 5 W = 10 mil L = 160 mil J4 GAIN_OUT C6 28 GND* GND* C10 J2 PHASE_OUT C12 OUTP GND* GND* GBP GFS GCS 1 J5 21 2 20 3 19 U1 4 18 MAX2009 5 17 6 16 EXPOSED PADDLE 7 8 J1 PHASE_IN 22 9 15 10 11 12 13 14 VCCG GND* G_CS C5 C2 PBEXP R3 VCC_P GND* PD_CS2 PD_CS1 VCCP C4 C3 VR2 Figure 3. MAX2009 EV Kit Schematic 6 PF_S2 20 PF_S1 R2 VR1 PB_RAW PB_IN PBIN R1 *INTERNALLY CONNECTED TO EXPOSED PADDLE. PC BOARD DIELECTRIC FR4. RF LAYER DIELECTRIC THICKNESS = 15 mils. 2 VCC_G C1 C11 1 G_FS G_BP PBRAW PDCS2 C9 23 PDCS1 ING 24 PFS2 C8 25 PFS1 W = 10 mil L = 160 mil J3 GAIN_IN 26 GND* GND* 27 INP GND* GND* GND* OUTG C7 GND* Evaluate: MAX2009/MAX2010 MAX2009/MAX2010 Evaluation Kits _______________________________________________________________________________________ MAX2009/MAX2010 Evaluation Kits 28 C10 L2 OUTP C12 GND* GND* GBP GFS U1 4 18 MAX2010 5 17 6 16 EXPOSED PADDLE 7 GND* C1 GCS 19 8 J1 PHASE_IN J5 3 9 15 10 11 12 13 14 PDCS2 GND* 22 20 PDCS1 GND* 23 2 PFS2 C9 24 21 PFS1 ING 25 GND* C8 J3 GAIN_IN 26 1 INP GND* 27 GND* GND* OUTG C7 GND* J2 PHASE_OUT Evaluate: MAX2009/MAX2010 C6 J4 GAIN_OUT VCCG GND* G_CS C5 1 2 G_FS G_BP PBRAW PBEXP VCC_G R3 PB_RAW PB_IN PBIN VCC_P GND* PD_CS2 PD_CS1 VCCP C4 PF_S2 20 PF_S1 L1 C2 C3 R2 C11 R1 *INTERNALLY CONNECTED TO EXPOSED PADDLE. PC BOARD DIELECTRIC FR4. RF LAYER DIELECTRIC THICKNESS = 15 mils. VR1 VR2 Figure 4. MAX2010 EV Kit Schematic _______________________________________________________________________________________ 7 Evaluate: MAX2009/MAX2010 MAX2009/MAX2010 Evaluation Kits 1.0" Figure 5. MAX2009 EV Kit PC Board Layout—Top Silkscreen 1.0" Figure 7. MAX2009 EV Kit PC Board Layout—Top Layer Metal 8 1.0" Figure 6. MAX2009 EV Kit PC Board Layout—Top Soldermask 1.0" Figure 8. MAX2009 EV Kit PC Board Layout—Inner Layer 2 (GND) _______________________________________________________________________________________ MAX2009/MAX2010 Evaluation Kits Evaluate: MAX2009/MAX2010 1.0" 1.0" Figure 9. MAX2009 EV Kit PC Board Layout—Inner Layer 3 (Routes) 1.0" Figure 10. MAX2009 EV Kit PC Board Layout—Bottom Layer Metal 1.0" Figure 11. MAX2009 EV Kit PC Board Layout—Bottom Soldermask Figure 12. MAX2009 EV Kit PC Board Layout—Bottom Silkscreen _______________________________________________________________________________________ 9 Evaluate: MAX2009/MAX2010 MAX2009/MAX2010 Evaluation Kits 1.0" Figure 13. MAX2010 EV Kit PC Board Layout—Top Silkscreen 1.0" Figure 15. MAX2010 EV Kit PC Board Layout—Top Layer Metal 10 1.0" Figure 14. MAX2010 EV Kit PC Board Layout—Top Soldermask 1.0" Figure 16. MAX2010 EV Kit PC Board Layout—Inner Layer 2 (GND) ______________________________________________________________________________________ MAX2009/MAX2010 Evaluation Kits 1.0" Figure 17. MAX2010 EV Kit PC Board Layout—Inner Layer 3 (Routes) 1.0" Figure 18. MAX2010 EV Kit PC Board Layout—Bottom Layer Metal 1.0" Figure 19. MAX2010 EV Kit PC Board Layout—Bottom Soldermask Figure 20. MAX2010 EV Kit PC Board Layout—Bottom Silkscreen Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. Evaluate: MAX2009/MAX2010 1.0"