MAXIM MAX5186

19-1581; Rev 0; 12/99
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
The MAX5186/MAX5189 are designed to provide a high
level of signal integrity for the least amount of power dissipation. Both DACs operate from a single supply voltage
of +2.7V to +3.3V. Additionally, these DACs have three
modes of operation: normal, low-power standby, and
complete shutdown, which provides the lowest possible
power dissipation with a 1µA (max) shutdown current. A
fast wake-up time (0.5µs) from standby mode to full DAC
operation allows power conservation by activating the
DACs only when required.
The MAX5186/MAX5189 are packaged in a 28-pin
QSOP and are specified for the extended (-40°C to
+85°C) temperature range. For higher resolution, dual
10-bit versions, refer to the MAX5180/MAX5183 data
sheet.
Features
♦ +2.7V to +3.3V Single-Supply Operation
♦ Wide Spurious-Free Dynamic Range: 70dB
at fOUT = 2.2MHz
♦ Fully Differential Outputs for Each DAC
♦ ±0.5% FSR Gain Mismatch
♦ ±0.15° Phase Mismatch
♦ Low-Current Standby or Full Shutdown Modes
♦ Internal +1.2V, Low-Noise Bandgap Reference
♦ Small 28-Pin QSOP Package
Ordering Information
PART
MAX5186BEEI
MAX5189BEEI
TEMP. RANGE
PIN-PACKAGE
-40°C to +85°C
-40°C to +85°C
28 QSOP
28 QSOP
Pin Configuration
TOP VIEW
Applications
Signal Reconstruction of I and Q
Transmit Signals
Digital Signal Processing
Arbitrary Waveform Generation (AWG)
Imaging Applications
CREF1 1
28 CREF2
OUT1P 2
27 OUT2P
OUT1N 3
26 OUT2N
AGND 4
25 REFO
AVDD 5
DACEN 6
24 REFR
MAX5186
MAX5189
23 DGND
PD 7
22 DVDD
CS 8
21 D7
CLK 9
20 D6
N.C. 10
19 D5
REN 11
18 D4
DGND 12
17 D3
DGND 13
16 D2
D0 14
15 D1
QSOP
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
MAX5186/MAX5189
General Description
The MAX5186 contains two 8-bit, simultaneous-update,
current-output digital-to-analog converters (DACs)
designed for superior performance in communications
systems requiring analog signal reconstruction with low
distortion and low-power operation. The MAX5189 provides equal specifications, with on-chip precision resistors for voltage output operation. The MAX5186/
MAX5189 are designed for a 10pVs glitch operation to
minimize unwanted spurious signal components at the
output. An on-board +1.2V bandgap circuit provides a
well-regulated, low-noise reference that can be disabled for external reference operation.
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
ABSOLUTE MAXIMUM RATINGS
AVDD, DVDD to AGND, DGND ................................ -0.3V to +6V
Digital Input to DGND.............................................. -0.3V to +6V
OUT1P, OUT1N, OUT2P, OUT2N, CREF1,
CREF2 to AGND .................................................. -0.3V to +6V
VREF to AGND ......................................................... -0.3V to +6V
AGND to DGND................................................... -0.3V to +0.3V
AVDD to DVDD .................................................................... ±3.3V
Maximum Current into Any Pin........................................... 50mA
Continuous Power Dissipation (TA = +70°C)
28-Pin QSOP (derate 9.00mW/°C above +70°C) ....... 725mW
Operating Temperature Ranges
MAX518_BEEI................................................. -40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = +3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400Ω differential output, CL = 5pF, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC PERFORMANCE
Resolution
N
8
Integral Nonlinearity
INL
-1
±0.25
+1
LSB
Differential Nonlinearity
DNL
Guaranteed monotonic
-1
±0.25
+1
LSB
MAX5186
-1
+1
MAX5189
-4
+4
(Note 1)
-20
Zero-Scale Error
Full-Scale Error
Bits
±4
+20
LSB
LSB
DYNAMIC PERFORMANCE
Output Settling Time
To ±0.5LSB error band
Glitch Impulse
Spurious-Free Dynamic Range
to Nyquist
SFDR
Total Harmonic Distortion
to Nyquist
THD
Signal-to-Noise-Ratio to Nyquist
SNR
fOUT = 550kHz, fCLK = 40MHz
fOUT = 2.2MHz, fCLK = 40MHz
25
ns
10
pVs
72
57
fOUT = 550kHz, fCLK = 40MHz
-70
fOUT = 2.2MHz, fCLK = 40MHz
-68
fOUT = 550kHz, fCLK = 40MHz
fOUT = 2.2MHz, fCLK = 40MHz
dBc
70
-63
52
46
dB
dB
52
DAC-to-DAC Output Isolation
fOUT = 2.2MHz
-60
dB
Clock and Data Feedthrough
All 0s to all 1s
50
nVs
10
pA/√Hz
Output Noise
Gain Mismatch Between DAC
Outputs
fOUT = 2.2MHz
±0.5
Phase Mismatch Between DAC
Outputs
fOUT = 2.2MHz
±0.15
2
_______________________________________________________________________________________
±1
LSB
degrees
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
(AVDD = DVDD = +3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400Ω differential output, CL = 5pF, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG OUTPUT
Full-Scale Output Voltage
VFS
400
Voltage Compliance of Output
Output Leakage Current
mV
-0.3
0.8
V
DACEN = 0, MAX5186 only
-1
1
µA
0.5
1.5
mA
Full-Scale Output Current
IFS
MAX5186 only
DAC External Output Resistor
Load
RL
MAX5186 only
1
Ω
400
REFERENCE
Output Voltage Range
VREF
1.12
1.2
1.28
V
Output Voltage Temperature
Drift
TCVREF
50
ppm/°C
Reference Output Drive
Capability
IREFOUT
10
µA
0.5
mV/V
8
mA/mA
Reference Supply Rejection
Current Gain (IFS / IREF)
POWER REQUIREMENTS
Analog Power-Supply Voltage
AVDD
Analog Supply Current
IAVDD
Digital Power-Supply Voltage
DVDD
Digital Supply Current
IDVDD
Standby Current
Shutdown Current
2.7
PD = 0, DACEN = 1, digital inputs at 0 or DVDD
2.7
2.7
3.3
V
5.0
mA
3.3
V
PD = 0, DACEN = 1, digital inputs at 0 or DVDD
4.2
5.0
mA
ISTANDBY
PD = 0, DACEN = 0, digital inputs at 0 or DVDD
1.0
1.5
mA
ISHDN
PD = 1, DACEN = X, digital inputs at 0 or DVDD
(X = don’t care)
0.5
1
µA
LOGIC INPUTS AND OUTPUTS
Digital Input Voltage High
VIH
Digital Input Voltage Low
VIL
Digital Input Current
IIN
Digital Input Capacitance
CIN
2
V
VIN = 0 or DVDD
10
0.8
V
±1
µA
pF
TIMING CHARACTERISTICS
DAC1 DATA to CLK Rise Setup
Time
tDS1
10
ns
DAC2 DATA to CLK Fall Setup
Time
tDS2
10
ns
DAC1 CLK Rise to DATA Hold
Time
tDH1
0
ns
DAC2 CLK Fall to DATA Hold
Time
tDH2
0
ns
_______________________________________________________________________________________
3
MAX5186/MAX5189
ELECTRICAL CHARACTERISTICS (continued)
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400Ω differential output, CL = 5pF, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
CS Fall to CLK Rise Time
CS Fall to CLK Fall Time
TYP
MAX
UNITS
5
ns
5
ns
DACEN Rise Time to VOUT
0.5
µs
PD Fall Time to VOUT
50
µs
Clock Period
tCLK
25
ns
Clock High Time
tCH
10
ns
Clock Low Time
tCL
10
ns
Note 1: Excludes reference and reference resistor (MAX5189) tolerance.
4
_______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
0.075
0.100
0.050
DNL (LSB)
0.050
0.025
0
-0.025
0
2.53
MAX5186
MAX5189
2.51
2.49
2.47
-0.050
-0.025
-0.050
2.45
-0.075
32
64
96
128 160 192 224 256
0
32
64
96
2.5
128 160 192 224 256
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
ANALOG SUPPLY CURRENT
vs. TEMPERATURE
DIGITAL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
DIGITAL SUPPLY CURRENT
vs. TEMPERATURE
3.0
MAX5189
MAX5186
2.0
1.5
MAX5186
6
MAX5189
4
2
35
60
85
2.5
3.0
TEMPERATURE (°C)
3.5
4.0
4.5
5.0
STANDBY CURRENT vs. SUPPLY VOLTAGE
590
580
MAX5189
570
560
MAX5186/9toc08
590
MAX5186
580
570
MAX5189
560
5.0
5.5
10
35
60
85
0.80
0.75
0.70
MAX5189
0.65
MAX5186
0.60
0.55
0.50
0.45
540
SUPPLY VOLTAGE (V)
-15
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
550
4.5
-40
STANDBY CURRENT vs. TEMPERATURE
STANDBY CURRENT (µA)
MAX5186
4.0
1
TEMPERATURE (°C)
600
MAX5186/9toc07
600
3.5
MAX5186
2
SUPPLY VOLTAGE (V)
610
3.0
3
5.5
SHUITDOWN CURRENT (µA)
10
MAX5189
4
0
0
-15
MAX5186/9toc06
8
5
5.5
MAX5186/9toc09
2.5
10
DIGITAL SUPPLY CURRENT (mA)
MAX5186/9toc04
3.5
2.5
3.5
INPUT CODE
4.0
-40
3.0
INPUT CODE
MAX5186/9toc05
0
ANALOG SUPPLY CURRENT (mA)
0.025
DIGITAL SUPPLY CURRENT (mA)
INL (LSB)
0.075
2.55
SUPPLY CURRENT (mA)
0.125
MAX5186/9toc02
0.100
MAX5186/9toc01
0.150
STANDBY CURRENT (µA)
ANALOG SUPPLY CURRENT
vs. SUPPLY VOLTAGE
DIFFERENTIAL NONLINEARITY
vs. INPUT CODE
MAX5186/9toc03
INTEGRAL NONLINEARITY
vs. INPUT CODE
-40
-15
10
35
TEMPERATURE (°C)
60
85
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
MAX5186/MAX5189
Typical Operating Characteristics
(AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.)
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
1.26
MAX5189
1.25
MAX5186
1.24
1.27
1.26
MAX5189
1.25
MAX5186
1.23
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2
0
-40
-15
10
35
60
85
0
100
200
300
400
TEMPERATURE (°C)
REFERENCE CURRENT (µA)
DYNAMIC RESPONSE RISE TIME
DYNAMIC RESPONSE FALL TIME
SETTLING TIME
MAX5186/9toc15
MAX5186toc14
OUT_P
150mV/
div
OUT_P
150mV/
div
OUT_N
100mV/
div
OUT_N
150mV/
div
OUT_N
150mV/
div
OUT_P
100mV/
div
MAX5186/9toc17
0
-10
-20
-30
-40
-50
-60
-40
-50
-60
dBc
-30
-70
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
4
6
8
10 12 14 16 18 20
OUTPUT FREQUENCY (MHz)
fOUT = 2.2MHz
fCLK = 40MHz
0
2
4
6
8
SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK FREQUENCY
10 12 14 16 18 20
OUTPUT FREQUENCY (MHz)
100
MAX5186/9toc19
FFT PLOT, DAC2
SPURIOUS-FREE DYNAMIC RANGE (dBc)
FFT PLOT, DAC1
MAX5186/9toc18
50ns/div
-20
2
12.5ns/div
50ns/div
fOUT = 2.2MHz
fCLK = 40MHz
500
MAX5186/9toc16
SUPPLY VOLTAGE (V)
0
-10
0
3
1
1.24
1.23
6
OUTPUT CURRENT (mA)
1.27
4
MAX5186/9toc12
MAX5186/9toc11
1.28
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
1.28
OUTPUT CURRENT
vs. REFERENCE CURRENT
MAX5186/9toc13
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
dBc
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
90
80
DAC2
70
DAC1
60
50
40
10 15 20 25 30 35 40 45 50 55 60
CLOCK FREQUENCY (MHz)
_______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT
FREQUENCY AND CLOCK FREQUENCY, DAC2
78
78
fCLK = 60MHz
fCLK = 20MHz
68
SFDR (dBc)
72
70
72
70
fCLK = 50MHz
fCLK = 10MHz
68
66
64
fCLK = 10MHz
fCLK = 50MHz
68
fCLK = 30MHz
62
fCLK = 30MHz
60
66
66
500 700 900 1100 1300 1500 1700 1900 2100 2300
500 700 900 1100 1300 1500 1700 1900 2100 2300
OUTPUT FREQUENCY (kHz)
OUTPUT FREQUENCY (kHz)
1.0
1.25
1.5
MULTITONE
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY
0
MAX5186/9toc23
62.0
0.75
FULL-SCALE OUTPUT CURRENT (mA)
SIGNAL-TO-NOISE + DISTORTION
vs. OUTPUT FREQUENCY
62.5
0.5
MAX5186/9toc24
70
fCLK = 20MHz
fCLK = 40MHz
74
72
-10
-20
-30
61.5
SFDR (dBc)
-40
SINAD (dB)
SFDR (dBc)
74
fCLK = 60MHz
76
SFDR (dBc)
76
74
MAX5186/89-26
fCLK = 40MHz
SPURIOUS-FREE DYNAMIC RANGE
vs. FULL-SCALE OUTPUT CURRENT
MAX5186/9toc21
MAX5186/9toc20
SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT
FREQUENCY AND CLOCK FREQUENCY, DAC1
DAC2
61.0
DAC1
60.5
-50
-60
-70
-80
-90
-100
-110
60.0
-120
0
500
1000
1500
2000
OUTPUT FREQUENCY (kHz)
2500
0
2.5
5
7.5
10
12.5 15 17.5
OUTPUT FREQUENCY (MHz)
_______________________________________________________________________________________
7
MAX5186/MAX5189
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.)
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
MAX5186/MAX5189
Pin Description
8
PIN
NAME
FUNCTION
1
CREF1
Reference Bias Bypass, DAC1
2
OUT1P
Positive Analog Output, DAC1. Current output for MAX5186; voltage output for MAX5189.
3
OUT1N
Negative Analog Output, DAC1. Current output for MAX5186; voltage output for MAX5189.
4
AGND
Analog Ground
5
AVDD
Analog Positive Supply, +2.7V to +3.3V
6
DACEN
7
PD
Power-Down Select
0: Enter DAC standby mode (DACEN = DGND) or power-up DAC (DACEN = DVDD).
1: Enter shutdown mode.
8
CS
Active-Low Chip Select
9
CLK
Clock input
10
N.C.
No Connect. Do not connect to this pin.
11
REN
Active-Low Reference Enable. Connect to DGND to activate on-chip +1.2V reference.
12
DGND
Digital Ground
13
DGND
Digital Ground
14
D0
Data Bit D0 (LSB)
15–20
D1–D6
Data Bits D1–D6
21
D7
22
DVDD
Digital Supply, +2.7V to +3.3V
23
DGND
Digital Ground
24
REFR
Reference Input
25
REFO
Reference Output
26
OUT2N
Negative Analog Output, DAC2. Current output for MAX5186; voltage output for MAX5189.
27
OUT2P
Positive Analog Output, DAC2. Current output for MAX5186; voltage output for MAX5189.
28
CREF2
Reference Bias Bypass, DAC2
DAC Enable, Digital Input
0: Enter DAC standby mode with PD = DGND.
1: Power-up DAC with PD = DGND.
X: Enter shutdown mode with PD = DVDD (X = don’t care).
Data Bit D7 (MSB)
_______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
The MAX5186/MAX5189 are dual, 8-bit digital-to-analog converters (DACs) capable of operating with clock
speeds up to 40MHz. Each of these dual converters
consists of separate input and DAC registers, followed
by a current source array capable of generating up to
1.5mA full-scale output current (Figure 1). An integrated +1.2V voltage reference and control amplifier determine the data converters’ full-scale output currents/
voltages. Careful reference design ensures close gain
matching and excellent drift characteristics. The
MAX5189’s voltage output operation features matched
400Ω on-chip resistors that convert the current array
current into a voltage.
Internal Reference and
Control Amplifier
The MAX5186/MAX5189 provide an integrated
50ppm/°C, +1.2V, low-noise bandgap reference that
can be disabled and overridden by an external reference voltage. REFO serves either as an external reference input or an integrated reference output. If REN is
connected to DGND, the internal reference is selected
and REFO provides a +1.2V output. Due to its limited
10µA output drive capability, REFO must be buffered
with an external amplifier if heavier loading is required.
The MAX5186/MAX5189 also employ a control amplifier
designed to simultaneously regulate the full-scale output current (IFS) for both outputs of the devices. The
output current is calculated as follows:
IFS = 8 · IREF
where I REF is the reference output current (I REF =
VREFO/RSET) and IFS is the full-scale output current.
R SET is the reference resistor that determines the
amplifier’s output current on the MAX5186 (Figure 2).
This current is mirrored into the current source array
where it is equally distributed between matched current
segments and summed to valid output current readings
for the DACs.
The MAX5189 converts each output current (DAC1 and
DAC2) into an output voltage (VOUT1, VOUT2) with two
internal, ground-referenced 400Ω load resistors. Using
the internal +1.2V reference voltage, the MAX5189’s
integrated reference output-current resistor (RSET =
9.6kΩ) sets IREF to 125µA and IFS to 1mA.
External Reference
To disable the MAX5186/MAX5189’s internal reference,
connect REN to DVDD. A temperature-stable, external
reference may now be applied to drive the REFO pin to
set the full-scale output (Figure 3). Choose a reference
capable of supplying at least 150µA to drive the bias
circuit that generates the cascode current for the current array. For improved accuracy and drift performance, choose a fixed output voltage reference such
as the +1.2V, 25ppm/°C MAX6520 bandgap reference.
Standby Mode
To enter the lower power standby mode, connect digital inputs PD and DACEN to DGND. In standby, both
the reference and the control amplifier are active with
the current array inactive. To exit this condition, DACEN
must be pulled high with PD held at DGND. Both the
MAX5186/MAX5189 typically require 50µs to wake up
and let both outputs and reference settle.
Shutdown Mode
For lowest power consumption, the MAX5186/MAX5189
provide a power-down mode in which the reference,
control amplifier, and current array are inactive and the
DACs’ supply current is reduced to 1µA. To enter this
mode, connect PD to DVDD. To return to active mode,
connect PD to DGND and DACEN to DVDD. About 50µs
are required for the parts to leave shutdown mode and
settle to their outputs’ values prior to shutdown. Table 1
lists the power-down mode selection.
Timing Information
Both DAC cells residing in the MAX5186/MAX5189
write to their outputs simultaneously (Figure 4). The
input latch of the first DAC (DAC1) is loaded after the
clock signal transitions high. When the clock signal
transitions low, the input latch of the second DAC
(DAC2) is loaded. The contents of both input latches
are simultaneously shifted to the DAC registers, and
their outputs update at the rising edge of the next
clock.
Outputs
The MAX5186 outputs are designed to supply full-scale
output currents of 1mA into 400Ω loads in parallel with
a capacitive load of 5pF. The MAX5189 features integrated 400Ω resistors that restore the array currents to
proportional, differential voltages of 400mV. These differential output voltages can then be used to drive a
balun transformer or a low-distortion, high-speed operational amplifier to convert the differential voltage into a
single-ended voltage.
_______________________________________________________________________________________
9
MAX5186/MAX5189
Detailed Description
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
REN
AVDD
AGND
CS
DACEN
PD
1.2V REF
REFO
CREF1
CURRENTSOURCE ARRAY
CREF2
REFR
OUT1P
OUT1N
OUT2N
OUT2N
DAC1 SWITCHES
9.6k*
DAC2 SWITCHES
OUTPUT
LATCHES
OUTPUT
LATCHES
MSB
DECODE
CLK
400Ω*
MSB
DECODE
INPUT
LATCHES
INPUT
LATCHES
MAX5186
MAX5189
DVDD
*INTERNAL 400Ω AND 9.6kΩ
RESISTORS FOR MAX5189 ONLY.
400Ω* 400Ω* 400Ω*
DGND
D7–D0
Figure 1. Functional Diagram
Applications Information
Static and Dynamic
Performance Definitions
Integral Nonlinearity
Integral nonlinearity (INL) (Figure 5a) is the deviation of
the values on an actual transfer function from either a
best-straight-line fit (closest approximation to the actual
transfer curve) or a line drawn between the endpoints
of the transfer function once offset and gain errors have
been nullified. For a DAC, the deviations are measured
every single step.
Differential Nonlinearity
Differential nonlinearity (DNL) (Figure 5b) is the difference between an actual step height and the ideal value
of 1LSB. A DNL error specification of less than 1LSB
guarantees no missing codes and a monotonic transfer
function.
10
Offset Error
Offset error (Figure 5c) is the difference between the
ideal and the actual offset point. For a DAC, the offset
point is the step value when the digital input is zero.
This error affects all codes by the same amount and
can usually be compensated by trimming.
Gain Error
Gain error (Figure 5d) is the difference between the
ideal and the actual full-scale output voltage on the
transfer curve after nullifying the offset error. This error
alters the slope of the transfer function and corresponds to the same percentage error in each step.
Settling Time
Settling time is the amount of time required from the start
of a transition until the DAC output settles its new output
value to within the converter’s specified accuracy.
______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
MAX5186/MAX5189
OPTIONAL EXTERNAL BUFFER
FOR HEAVIER LOADS
REN
DGND
+1.2V
BANDGAP
REFERENCE
MAX4040
REFO
CCOMP*
REFR
CURRENTSOURCE ARRAY
IREF
IFS
AGND
RSET**
9.6k
RSET
MAX5186
MAX5189
AGND
V
IREF = REF
RSET
*COMPENSATION CAPACITOR (CCOMP = 100nF)
**9.6kΩ REFERENCE CURRENT-SET RESISTOR
INTERNAL TO MAX5189 ONLY. USE EXTERNAL
RSET FOR MAX5186.
Figure 2. Setting IFS with the Internal +1.2V Reference and the Control Amplifier
DVDD
10µF
0.1µF
DGND
REN
+1.2V
BANDGAP
REFERENCE
AVDD
EXTERNAL
+1.2V
REFERENCE
REFO
CURRENTSOURCE ARRAY
REFR
IFS
MAX6520
AGND
RSET
AGND
9.6k*
MAX5186
MAX5189
*9.6kΩ REFERENCE CURRENT-SET RESISTOR
INTERNAL TO MAX5189 ONLY. USE EXTERNAL
RSET FOR MAX5186.
Figure 3. MAX5186/MAX5189 with External Reference
______________________________________________________________________________________
11
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
Table 1. Power-Down Mode Selection
PD
(POWER-DOWN SELECT)
DACEN (DAC
ENABLE)
POWER-DOWN
MODE
0
0
Standby
0
1
Wake-Up
1
X
Shutdown
OUTPUT STATE
MAX5186
High-Z
MAX5189
AGND
Last state prior to standby mode
MAX5186
High-Z
MAX5189
AGND
X = Don’t care
tCLK
tCL
tCH
CLK
D0–D7
DAC1
tDS1
DAC2
tDS2
DAC1
DAC2
tDH1
tDH1
DAC1
DAC2
OUT1
N-1
N
N+1
OUT2
N-1
N
N+1
Figure 4. Timing Diagram
Digital Feedthrough
Digital feedthrough is the noise generated on a DAC’s
output when any digital input transitions. Proper board
layout and grounding will significantly reduce this
noise, but there will always be some feedthrough
caused by the DAC itself.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fundamental itself. This is expressed as:


(V22 + V32 + V42 + V52 )


THD = 20 ⋅ log


V1


12
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion
component.
Differential to Single-Ended Conversion
The MAX4108 low-distortion, high-input bandwidth
amplifier may be used to generate a voltage from the
array current output of the MAX5186. The differential
voltage across OUT1P (or OUT2P) and OUT1N (or
OUT2N) is converted into a single-ended voltage by
designing an appropriate operational amplifier configuration (Figure 6).
______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
MAX5186/MAX5189
7
6
ANALOG OUTPUT VALUE
ANALOG OUTPUT VALUE
6
5
4
AT STEP
011 (1/2 LSB )
3
2
AT STEP
001 (1/4 LSB )
1
1 LSB
5
DIFFERENTIAL LINEARITY
ERROR (-1/4 LSB)
4
3
1 LSB
2
DIFFERENTIAL
LINEARITY ERROR (+1/4 LSB)
1
0
0
000
001
010
011
100
101
110
000
111
001
Figure 5a. Integral Nonlinearity
IDEAL OFFSET
POINT
0
000
001
OFFSET ERROR
(+1 1/4 LSB)
ANALOG OUTPUT VALUE
ANALOG OUTPUT VALUE
IDEAL DIAGRAM
1
100
101
IDEAL FULL-SCALE OUTPUT
7
2
ACTUAL
OFFSET
POINT
011
Figure 5b. Differential Nonlinearity
ACTUAL
DIAGRAM
3
010
DIGITAL INPUT CODE
DIGITAL INPUT CODE
GAIN ERROR
(-1 1/4 LSB)
6
IDEAL DIAGRAM
ACTUAL
FULL-SCALE
OUTPUT
5
4
0
010
011
000 100
Figure 5c. Offset Error
I/Q Reconstruction in a QAM Application
The MAX5186/MAX5189’s low distortion supports analog reconstruction of in-phase (I) and quadrature (Q)
carrier components typically used in quadrature amplitude modulation (QAM) architectures where I and Q
data are interleaved on a common data bus. A QAM
signal is both amplitude and phase modulated, created
by summing two independently modulated carriers of
identical frequency but different phase (90° phase difference).
In a typical QAM application (Figure 7), the modulation
occurs in the digital domain and the MAX5186/
101
110
111
DIGITAL INPUT CODE
DIGITAL INPUT CODE
Figure 5d. Gain Error
MAX5189’s dual DACs may be used to reconstruct the
analog I and Q components.
The I/Q reconstruction system is completed by a quadrature modulator that combines the reconstructed I and
Q components with in-phase and quadrature carrier
frequencies and then sums both outputs to provide the
QAM signal.
Grounding and Power-Supply Decoupling
Grounding and power-supply decoupling strongly influence the MAX5186/MAX5189’s performance. Unwanted
digital crosstalk may couple through the input, refer-
______________________________________________________________________________________
13
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
ence, power-supply, and ground connections, which
may affect dynamic specifications like signal-to-noise
ratio or SFDR. In addition, electromagnetic interference
(EMI) can either couple into or be generated by the
MAX5186/MAX5189. Therefore, grounding and powersupply decoupling guidelines for high-speed, high-frequency applications should be closely followed.
First, a multilayer printed circuit (PC) board with separate ground and power-supply planes is recommended. High-speed signals should be run on controlled
impedance lines directly above the ground plane.
Since the MAX5186/MAX5189 have separate analog
and digital ground buses (AGND and DGND, respectively), the PC board should also have separate analog
and digital ground sections with only one point con-
necting the two. Digital signals should run above the
digital ground plane, and analog signals should run
above the analog ground plane. Digital signals should
be kept far away from the sensitive analog reference
and clock input.
Both devices have two power-supply inputs: analog
VDD (AVDD) and digital VDD (DVDD). Each AVDD input
should be decoupled with parallel 10µF and 0.1µF
ceramic-chip capacitors. These capacitors should be
as close to the pin as possible, and their opposite ends
should be as close to the ground plane as possible.
The DVDD pins should also have separate 10µF and
0.1µF capacitors adjacent to their respective pins. Try
to minimize analog load capacitance for proper operation. For best performance, it is recommended to
+3V
+
AVDD AVDD
+3V
10µF
0.1µF
+
0.1µF
10µF
0.1µF
0.1µF
AVDD
DVDD
CREF1
402Ω
CREF2
+5V
402Ω
CLK
OUT1P
OUTPUT 1
400Ω*
D0–D7
MAX5186
MAX5189
REFO
402Ω
-5V
MAX4108
OUT1N
0.1µF
402Ω
400Ω*
REFR
402Ω
RSET**
402Ω
+5V
OUT2P
OUTPUT 2
400Ω*
402Ω
DGND
REN
OUT2N
AGND
-5V
MAX4108
402Ω
400Ω*
**MAX5186 ONLY
*400Ω RESISTORS INTERNAL TO MAX5189 ONLY.
Figure 6. Differential to Single-Ended Conversion Using a Low-Distortion Amplifier
14
______________________________________________________________________________________
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
+3V
Chip Information
TRANSISTOR COUNT: 9464
SUBSTRATE CONNECTED TO AGND
+3V
+3V
I COMPONENT
DAC1
DIGITAL
SIGNAL
PROCESSOR
BP
FILTER
CARRIER
FREQUENCY
MAX5186
MAX5189
Q COMPONENT
DAC2
0°
90°
Σ
IF
BP
FILTER
MAX2452
QUADRATURE
MODULATOR
Figure 7. Using the MAX5186/MAX5189 for I/Q Signal Reconstruction
______________________________________________________________________________________
15
MAX5186/MAX5189
bypass CREF1 and CREF2 with low-ESR 0.1µF capacitors to AVDD.
The power-supply voltages should also be decoupled
with large tantalum or electrolytic capacitors at the
point they enter the PC board. Ferrite beads with additional decoupling capacitors forming a pi network can
also improve performance.
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
QSOP.EPS
MAX5186/MAX5189
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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is a registered trademark of Maxim Integrated Products.